On 14 November 2017 at 09:12, Noralf Trønnes wrote:
> The introduction of: drm/framebuffer: Add framebuffer debugfs file
> broke vgem. That patch assumed that all drivers had initialized the
> dev->mode_config.fb_lock mutex which happens in drm_mode_config_init().
> vgem doesn't need to call drm_m
On Mon, Nov 13, 2017 at 11:34:53PM +, Lionel Landwerlin wrote:
> ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
>
> Store the frequency in kHz and drop 64bit divisions.
>
> v2: Use div64_u64 (Matthew)
>
> v3: store f
On Mon, Nov 13, 2017 at 11:34:52PM +, Lionel Landwerlin wrote:
> This replaces accesses to the reg field of the i915_reg_t structure
> with the i915_mmio_reg_offset() inline function.
>
> Suggested-by: Chris Wilson
> Signed-off-by: Lionel Landwerlin
Reviewed-by: Ewelina Musial
> ---
> driv
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Tuesday, October 17, 2017 10:37 PM
> To: Zhang, Tina ; zhen...@linux.intel.com; Lv, Zhiyuan
> ; Wang, Zhi A ; Tian, Kevin
> ; dan...@ffwll.ch
> Cc: Zhang, Tina ; intel-gfx@lists.freedesktop.org;
> intel-
== Series Details ==
Series: drm/i915: Fix function name in comment
URL : https://patchwork.freedesktop.org/series/33751/
State : success
== Summary ==
Test kms_setmode:
Subgroup basic:
pass -> FAIL (shard-hsw) fdo#99912
Test gem_exec_suspend:
Subgro
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
URL : https://patchwork.freedesktop.org/series/33463/
State : success
== Summary ==
Test kms_flip:
Subgroup plain-flip-ts-check-interruptible:
fail -> PASS (shard
== Series Details ==
Series: drm/i915: Fix function name in comment
URL : https://patchwork.freedesktop.org/series/33751/
State : success
== Summary ==
Series 33751v1 drm/i915: Fix function name in comment
https://patchwork.freedesktop.org/api/1.0/series/33751/revisions/1/mbox/
Test chamelium
== Series Details ==
Series: drm/i915: some perf cleanups (& fixes!) (rev2)
URL : https://patchwork.freedesktop.org/series/33736/
State : success
== Summary ==
Test kms_busy:
Subgroup extended-modeset-hang-oldfb-with-reset-render-a:
pass -> DMESG-WARN (shard-hsw)
Commit 78597996370c (drm/i915/bxt: Fix PPS lost state after suspend
breaking eDP link training) renamed the function to
intel_power_sequencer_reset() but forgot to update comment.
Cc: Imre Deak
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertio
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
URL : https://patchwork.freedesktop.org/series/33463/
State : success
== Summary ==
Series 33463v4 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1
== Series Details ==
Series: drm/i915: some perf cleanups (& fixes!) (rev2)
URL : https://patchwork.freedesktop.org/series/33736/
State : success
== Summary ==
Series 33736v2 drm/i915: some perf cleanups (& fixes!)
https://patchwork.freedesktop.org/api/1.0/series/33736/revisions/2/mbox/
Test
== Series Details ==
Series: drm/debugfs: Fix framebuffer debugfs file init
URL : https://patchwork.freedesktop.org/series/33747/
State : warning
== Summary ==
Series 33747v1 drm/debugfs: Fix framebuffer debugfs file init
https://patchwork.freedesktop.org/api/1.0/series/33747/revisions/1/mbox/
Now that we have this stored in the device info, we can drop it from perf
part of the driver.
Note that this requires to init perf after we've computed the frequency,
hence why we move i915_perf_init() from i915_driver_init_early() to after
intel_device_info_runtime_init().
v2: Use div_u64 (Chris
This replaces accesses to the reg field of the i915_reg_t structure
with the i915_mmio_reg_offset() inline function.
Suggested-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 39 ---
1 file changed, 24 insertions(+), 1
Some sensible changes pointed by Chris, Matt & Ville.
Thanks!
Lionel Landwerlin (4):
drm/i915/perf: replace .reg accesses with i915_mmio_reg_offset
drm/i915: fix 64bit divide
drm/i915/perf: reuse timestamp frequency from device info
drm/i915/cnl: only divide up base frequency with crystal
We apply this logic to Gen9 as well. We didn't notice this issue as
most part we've encountered so far only use the crystal as source for
their timestamp registers.
Fixes: dab9178333 ("drm/i915: expose command stream timestamp frequency to
userspace")
Signed-off-by: Lionel Landwerlin
---
driver
ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
Store the frequency in kHz and drop 64bit divisions.
v2: Use div64_u64 (Matthew)
v3: store frequency in kHz to avoid 64bit divs (Chris/Ville)
Fixes: dab9178333 ("drm/i915: ex
The introduction of: drm/framebuffer: Add framebuffer debugfs file
broke vgem. That patch assumed that all drivers had initialized the
dev->mode_config.fb_lock mutex which happens in drm_mode_config_init().
vgem doesn't need to call drm_mode_config_init().
Fix this by only creating the framebuffer
== Series Details ==
Series: drm/i915/glk: Refactor handling of PLANE_COLOR_CTL for GLK+ (rev5)
URL : https://patchwork.freedesktop.org/series/33087/
State : success
== Summary ==
Test kms_flip:
Subgroup plain-flip-ts-check-interruptible:
fail -> PASS (shard
== Series Details ==
Series: drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk (rev4)
URL : https://patchwork.freedesktop.org/series/33463/
State : failure
== Summary ==
Series 33463v4 drm/i915: Display WA #1185 WaDisableDARBFClkGating:cnl, glk
https://patchwork.freedesktop.org/api/1
== Series Details ==
Series: drm/i915/glk: Refactor handling of PLANE_COLOR_CTL for GLK+ (rev5)
URL : https://patchwork.freedesktop.org/series/33087/
State : success
== Summary ==
Series 33087v5 drm/i915/glk: Refactor handling of PLANE_COLOR_CTL for GLK+
https://patchwork.freedesktop.org/api/1
Hi Ville,
On Thu, Nov 9, 2017 at 8:58 AM, Ville Syrjälä
wrote:
> On Thu, Nov 09, 2017 at 08:02:40AM -0800, Lucas De Marchi wrote:
>> On Thu, Nov 9, 2017 at 5:11 AM, Ville Syrjälä
>> wrote:
>> > On Thu, Nov 09, 2017 at 02:58:04AM -0800, Lucas De Marchi wrote:
>> >> Wa Display #1183 was recently a
On Mon, Nov 13, 2017 at 09:03:34PM +, Chris Wilson wrote:
> Quoting Ville Syrjala (2017-11-13 15:32:14)
> > From: Ville Syrjälä
> >
> > Previously I was under the impression that the scanline counter
> > reads 0 when the pipe is off. Turns out that's not correct, and
> > instead the scanline
Quoting Ville Syrjälä (2017-11-13 20:53:39)
> On Mon, Nov 13, 2017 at 07:03:30PM +, Matthew Auld wrote:
> > On 13 November 2017 at 18:18, Lionel Landwerlin
> > > diff --git a/drivers/gpu/drm/i915/i915_perf.c
> > > b/drivers/gpu/drm/i915/i915_perf.c
> > > index 00be015e01df..292ad3e2c307 100644
Quoting Ville Syrjala (2017-11-13 15:32:15)
> From: Ville Syrjälä
>
> We should make sure the pipe has fully started when we enable it from
> the i830 "power well". Otherwise theoretically i830 could also hit
> problems with vblank timestamps jumping around (since we skip the
> wait during modese
Quoting Ville Syrjala (2017-11-13 15:32:14)
> From: Ville Syrjälä
>
> Previously I was under the impression that the scanline counter
> reads 0 when the pipe is off. Turns out that's not correct, and
> instead the scanline counter simply stops when the pipe stops, and
> it retains it's last value
On Mon, Nov 13, 2017 at 08:46:10PM +, Ville Syrjälä wrote:
> On Mon, Nov 13, 2017 at 11:01:31AM -0800, Rodrigo Vivi wrote:
> > On Mon, Nov 13, 2017 at 02:50:28PM +, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Moving the init_clock_gating() call from intel_modeset_init_hw()
Lionel Landwerlin writes:
> On 10/11/17 21:26, Eric Anholt wrote:
>> Tested by dropping garbage in my libdrm's headers and rebuilding.
>>
>> Signed-off-by: Eric Anholt
>> ---
>> lib/Makefile.am | 5 -
>> meson.build | 2 +-
>> tests/Makefile.am | 1 +
>> 3 files changed, 6 inser
On Mon, Nov 13, 2017 at 07:03:30PM +, Matthew Auld wrote:
> On 13 November 2017 at 18:18, Lionel Landwerlin
> wrote:
> > Now that we have this stored in the device info, we can drop it from perf
> > part of the driver.
> >
> > Note that this requires to init perf after we've computed the frequ
On Mon, Nov 13, 2017 at 06:44:47PM +, Matthew Auld wrote:
> On 13 November 2017 at 18:19, Lionel Landwerlin
> wrote:
> > ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
> > ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
> >
> > We can also drop an if() as we divide by
On Mon, Nov 13, 2017 at 11:01:31AM -0800, Rodrigo Vivi wrote:
> On Mon, Nov 13, 2017 at 02:50:28PM +, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Moving the init_clock_gating() call from intel_modeset_init_hw() to
> > intel_modeset_gem_init() had an unintended effect of not applying
== Series Details ==
Series: drm/i915: some perf cleanups (& fixes!)
URL : https://patchwork.freedesktop.org/series/33736/
State : success
== Summary ==
Test drv_module_reload:
Subgroup basic-reload:
pass -> DMESG-WARN (shard-hsw) fdo#102707
fdo#102707 https://bu
== Series Details ==
Series: series starting with [1/2] drm/i915: Clear per-engine fault register as
early as possible (rev2)
URL : https://patchwork.freedesktop.org/series/33649/
State : success
== Summary ==
Test kms_setmode:
Subgroup basic:
pass -> FAIL
tree: git://anongit.freedesktop.org/drm-intel drm-intel-next-queued
head: dab91783338bd3dd42638f89b5f7e34c57773207
commit: dab91783338bd3dd42638f89b5f7e34c57773207 [6/6] drm/i915: expose command
stream timestamp frequency to userspace
config: i386-randconfig-s0-201746 (attached as .config)
com
Hi Dave,
Here's the previous PR plus the rockchip fix that snuck in.
drm-misc-fixes-2017-11-13:
Driver Changes:
- qxl: Use a shadow bo as primary and blit to it to fix flicker (Gerd)
- rockchip: Convert psr spinlock to mutex (Emil)
Cc: Emil Renner Berthing
Cc: Gerd Hoffmann
Cheers, Sean
Th
== Series Details ==
Series: drm/edid: Infoframe cleanups and fixes
URL : https://patchwork.freedesktop.org/series/33730/
State : success
== Summary ==
Test kms_atomic_transition:
Subgroup plane-all-modeset-transition-fencing:
pass -> DMESG-WARN (shard-hsw) fdo#10
On 13 November 2017 at 18:18, Lionel Landwerlin
wrote:
> Now that we have this stored in the device info, we can drop it from perf
> part of the driver.
>
> Note that this requires to init perf after we've computed the frequency,
> hence why we move i915_perf_init() from i915_driver_init_early() t
On Mon, Nov 13, 2017 at 02:50:28PM +, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Moving the init_clock_gating() call from intel_modeset_init_hw() to
> intel_modeset_gem_init() had an unintended effect of not applying
> some workarounds on resume. This, for example, cause some kind of
> co
== Series Details ==
Series: drm/i915: some perf cleanups (& fixes!)
URL : https://patchwork.freedesktop.org/series/33736/
State : success
== Summary ==
Series 33736v1 drm/i915: some perf cleanups (& fixes!)
https://patchwork.freedesktop.org/api/1.0/series/33736/revisions/1/mbox/
Test chameli
On Mon, Nov 13, 2017 at 06:30:47PM +, Jose Abreu wrote:
>
>
> On 13-11-2017 17:04, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > If the user mode would specify an aspect ratio other than 4:3 or 16:9
> > we now silently ignore it. Maybe a better apporoach is to return an
> > error? Let
Quoting Patchwork (2017-11-13 18:13:01)
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915: Clear per-engine fault register
> as early as possible (rev2)
> URL : https://patchwork.freedesktop.org/series/33649/
> State : success
More MTA fun, so I'll plonk my Reviewed-by her
On Fri, Nov 10, 2017 at 07:47:46PM +, Sripada, Radhakrishna wrote:
>
>
> > -Original Message-
> > From: Vivi, Rodrigo
> > Sent: Thursday, November 9, 2017 1:25 PM
> > To: Sripada, Radhakrishna
> > Cc: intel-gfx@lists.freedesktop.org; Zanoni, Paulo R
> >
> > Subject: Re: [Intel-gfx]
On Mon, Nov 13, 2017 at 06:13:37PM +, Jose Abreu wrote:
> Hi Ville,
>
> On 13-11-2017 17:04, Ville Syrjala wrote:
> >
> > + if (to_match->picture_aspect_ratio)
> > + match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
> > +
> >
>
> Maybe "if (to_match->picture_aspect_ratio !=
> HDMI_PIC
On 13/11/17 18:44, Matthew Auld wrote:
On 13 November 2017 at 18:19, Lionel Landwerlin
wrote:
ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
We can also drop an if() as we divide by (value + 1) only if value is
not 0.
F
On Sat, Nov 11, 2017 at 09:43:44AM +, Sharma, Shashank wrote:
> Regards
>
> Shashank
>
>
> On 11/11/2017 3:56 AM, Rodrigo Vivi wrote:
> > Starting on GLK we support HDMI 2.0. So this patch only
> > extend the work Shashank has made to GLK to CNL.
> >
> > Cc: Paulo Zanoni
> > Cc: Shashank S
On Sat, Nov 11, 2017 at 09:47:40AM +, Sharma, Shashank wrote:
> I am still waiting for the dmesg logs, Rodrigo :P
>
> I am pretty sure that you would have picked up if there is a general
> problem, wit the modeset or HDMI.
yep... my bad... sorry...
We will provide that soon.
>
> I just want
On Sun, Nov 12, 2017 at 11:29:28PM +, Mike Lothian wrote:
> Hi
>
> You will need a HDMI 2 cable
Yes, I wonder already if that was the case...
So we have a new HDMI cable type? a high-higher-speed?
Or the regular high speed should be enough?
Anyways we are trying to get a "certified" hdmi 2.0
On 13 November 2017 at 18:19, Lionel Landwerlin
wrote:
> ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
> ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
>
> We can also drop an if() as we divide by (value + 1) only if value is
> not 0.
>
> Fixes: dab9178333 ("drm/i915: e
== Series Details ==
Series: drm/i915/glk: Refactor handling of PLANE_COLOR_CTL for GLK+ (rev5)
URL : https://patchwork.freedesktop.org/series/33087/
State : warning
== Summary ==
Series 33087v5 drm/i915/glk: Refactor handling of PLANE_COLOR_CTL for GLK+
https://patchwork.freedesktop.org/api/1
On 13-11-2017 17:04, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> AVI infoframe can only carry none, 4:3, or 16:9 picture aspect
> ratios. Return an error if the user asked for something different.
>
> Cc: Shashank Sharma
> Cc: "Lin, Jia"
> Cc: Akashdeep Sharma
> Cc: Jim Bride
> Cc: Jose A
On 13-11-2017 17:04, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> If the user mode would specify an aspect ratio other than 4:3 or 16:9
> we now silently ignore it. Maybe a better apporoach is to return an
> error? Let's try that.
>
> Also we must be careful that we don't try to send illegal p
tree: git://anongit.freedesktop.org/drm-intel drm-intel-next-queued
head: dab91783338bd3dd42638f89b5f7e34c57773207
commit: dab91783338bd3dd42638f89b5f7e34c57773207 [6/6] drm/i915: expose command
stream timestamp frequency to userspace
config: i386-defconfig (attached as .config)
compiler: gcc-
Hi Ville,
On 13-11-2017 17:04, Ville Syrjala wrote:
>
> + if (to_match->picture_aspect_ratio)
> + match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
> +
>
Maybe "if (to_match->picture_aspect_ratio !=
HDMI_PICTURE_ASPECT_NONE && to_match->picture_aspect_ratio !=
HDMI_PICTURE_ASPECT_RESE
On Mon, Nov 13, 2017 at 02:06:28PM +, David Weinehall wrote:
> On Fri, Nov 10, 2017 at 11:53:58AM -0800, Rodrigo Vivi wrote:
> > On Fri, Nov 10, 2017 at 02:29:29PM +, David Weinehall wrote:
> > > GEN6_RC_VIDEO_FREQ is deprecated for >= gen10;
> > > don't try to program it.
> > >
> > > Sign
Now that we have this stored in the device info, we can drop it from perf
part of the driver.
Note that this requires to init perf after we've computed the frequency,
hence why we move i915_perf_init() from i915_driver_init_early() to after
intel_device_info_runtime_init().
v2: Use udiv_u64 (Chri
ERROR: "__udivdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/i915/i915.ko] undefined!
We can also drop an if() as we divide by (value + 1) only if value is
not 0.
Fixes: dab9178333 ("drm/i915: expose command stream timestamp frequency to
userspace")
Reported-by
We apply this logic to Gen9 as well. We didn't notice this issue as
most part we've encountered so far only use the crystal as source for
their timestamp registers.
Fixes: dab9178333 ("drm/i915: expose command stream timestamp frequency to
userspace")
Signed-off-by: Lionel Landwerlin
---
driver
Another round of issues reported mostly by Matthew.
Thanks,
Lionel Landwerlin (4):
drm/i915/perf: reuse timestamp frequency from device info
drm/i915/perf: replace .reg accesses with i915_mmio_reg_offset
drm/i915: fix 64bit divide
drm/i915/cnl: only divide up base frequency with crystal s
This replaces accesses to the reg field of the i915_reg_t structure
with the i915_mmio_reg_offset() inline function.
Suggested-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 39 ---
1 file changed, 24 insertions(+), 1
== Series Details ==
Series: series starting with [1/2] drm/i915: Clear per-engine fault register as
early as possible (rev2)
URL : https://patchwork.freedesktop.org/series/33649/
State : success
== Summary ==
Series 33649v2 series starting with [1/2] drm/i915: Clear per-engine fault
registe
Since GLK, some plane configuration settings have moved to the
PLANE_COLOR_CTL register. Refactor handling of the register to work like
PLANE_CTL. This also allows us to fix the set/read of the plane Alpha
Mode for GLK+.
v2: Adjust ordering of platform checks to be newest->oldest, drop
redundant c
== Series Details ==
Series: drm/edid: Infoframe cleanups and fixes
URL : https://patchwork.freedesktop.org/series/33730/
State : success
== Summary ==
Series 33730v1 drm/edid: Infoframe cleanups and fixes
https://patchwork.freedesktop.org/api/1.0/series/33730/revisions/1/mbox/
Test chamelium
== Series Details ==
Series: series starting with [1/2] drm/atomic-helper: always track connector
commits, too (rev3)
URL : https://patchwork.freedesktop.org/series/33591/
State : success
== Summary ==
Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> IN
Until Haswell/Baytrail, the hardware used to have a per engine fault
register (e.g. 0x4094 - render fault register, 0x4194 - media fault
register and so on). But since Broadwell, all these registers were
combined into a singe one and the engine id stored in bits 14:12.
Not only we should not been
== Series Details ==
Series: drm/i915: some perf cleanups
URL : https://patchwork.freedesktop.org/series/33729/
State : failure
== Summary ==
Series 33729v1 drm/i915: some perf cleanups
https://patchwork.freedesktop.org/api/1.0/series/33729/revisions/1/mbox/
Test chamelium:
Subgroup d
On Fri, Nov 10, 2017 at 02:02:45PM +0100, Daniel Vetter wrote:
> On Fri, Nov 10, 2017 at 12:34:56PM +0100, Maarten Lankhorst wrote:
> > Some parameters use CHECK_BOOLL, but should really use
> > CHECK_BOOL_INCOMPLETE. We cannot currently check whether
> > the inherited infoframes and audio are set
On Fri, Nov 10, 2017 at 01:57:06PM +0100, Daniel Vetter wrote:
> On Fri, Nov 10, 2017 at 12:34:54PM +0100, Maarten Lankhorst wrote:
> > The flag just tells us IPS can be enabled, if the primary plane
> > is not enabled it means IPS might not be. This never triggered
> > in CI because we don't have
On Fri, Nov 10, 2017 at 12:35:00PM +0100, Maarten Lankhorst wrote:
> Changes since v1:
> - Only pass crtc_state, not crtc.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_color.c | 4 ++--
> drivers/gpu/drm/i915/intel_display.c | 25 ++
On Fri, Nov 10, 2017 at 12:34:59PM +0100, Maarten Lankhorst wrote:
> IPS can only be enabled if the primary plane is visible, so
> first make sure sw state matches hw state by waiting for hw_done.
>
> After this pass crtc_state to intel_dp_sink_crc() so that can be used,
> instead of using legacy
From: Ville Syrjälä
AVI infoframe can only carry none, 4:3, or 16:9 picture aspect
ratios. Return an error if the user asked for something different.
Cc: Shashank Sharma
Cc: "Lin, Jia"
Cc: Akashdeep Sharma
Cc: Jim Bride
Cc: Jose Abreu
Cc: Daniel Vetter
Cc: Emil Velikov
Cc: Thierry Reding
From: Ville Syrjälä
To make sure the infoframe unpack functions don't end up examining
stack garbage or oopsing, let's pass in the size of the buffer.
Cc: Thierry Reding
Cc: Hans Verkuil
Cc: linux-me...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/media/i2c/adv7511.c | 2 +-
dr
From: Ville Syrjälä
If the user mode would specify an aspect ratio other than 4:3 or 16:9
we now silently ignore it. Maybe a better apporoach is to return an
error? Let's try that.
Also we must be careful that we don't try to send illegal picture
aspect in the infoframe as it's only capable of s
From: Ville Syrjälä
The unpack functions just read from the passed in buffer,
so make it const.
Cc: Thierry Reding
Cc: Hans Verkuil
Cc: linux-me...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/video/hdmi.c | 23 ---
include/linux/hdmi.h | 3 ++-
2 files chang
From: Ville Syrjälä
Use drm_mode_equal_no_clocks_no_stereo() in
drm_match_hdmi_mode_clock_tolerance() for consistency as we
also use it in drm_match_hdmi_mode() and the cea mode matching
functions.
This doesn't actually change anything since the input mode
comes from detailed timings and we matc
From: Ville Syrjälä
Appedix F of HDMI 2.0 says that some HDMI sink may fail to switch from
3D to 2D mode in a timely fashion if the source simply stops sending the
HDMI infoframe. The suggested workaround is to keep sending the
infoframe even when strictly not necessary (ie. no VIC and no S3D).
H
From: Ville Syrjälä
Fix up a bunch of bad indentation and insconsistent comments
in edid_cea_modes[].
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_edid.c | 84 +++---
1 file changed, 42 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm
From: Ville Syrjälä
Make mode matching less confusing by allowing the caller to specify
which parts of the modes should match via some flags.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_modes.c | 134 ++--
include/drm/drm_modes.h | 9 +++
From: Ville Syrjälä
commit 6dffd431e229 ("drm: Add aspect ratio parsing in DRM layer")
cause us to not send out any VICs in the AVI infoframes. That commit
was since reverted, but if and when we add aspect ratio handing back
we need to be more careful.
Let's handle this by considering the aspect
From: Ville Syrjälä
This series tries to fix some issues with HDMI infoframes. In particular
we can currently send a bogus picture aspect ratio in the infoframe. I
included stuff to to make the infoframe unpakc more robust, evne though
we don't (yet) use it in drm. Additionally I included my earl
From: Ville Syrjälä
HDMI 2.0 Appendix F suggest that we should keep sending the infoframe
when switching from 3D to 2D mode, even if the infoframe isn't strictly
necessary (ie. not needed to transmit the VIC or stereo information).
This is a workaround against some sinks that fail to realize that
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix vblank timestamp/frame counter
jumps on gen2
URL : https://patchwork.freedesktop.org/series/33723/
State : success
== Summary ==
Test vgem_basic:
Subgroup debugfs:
dmesg-fail -> INCOMPLETE (shard-hsw
On 11/12/2017 09:22 AM, Michal Wajdeczko wrote:
On Sat, 11 Nov 2017 01:06:38 +0100, Sujaritha Sundaresan
wrote:
Placing the call to intel_guc_init after i915_gem_contexts_init,
based on the dependency within i915_gem_init.
Will move the function if required, depending on the review
comment
== Series Details ==
Series: series starting with [1/2] drm/atomic-helper: always track connector
commits, too (rev3)
URL : https://patchwork.freedesktop.org/series/33591/
State : success
== Summary ==
Series 33591v3 series starting with [1/2] drm/atomic-helper: always track
connector commit
Now that we have this stored in the device info, we can drop it from perf
part of the driver.
Note that this requires to init perf after we've computed the frequency,
hence why we move i915_perf_init() from i915_driver_init_early() to after
intel_device_info_runtime_init().
Signed-off-by: Lionel
This series contains a resend of the last patch that didn't get a
reviewed-by in https://patchwork.freedesktop.org/series/33631/ and
also a suggestion by Chris.
Cheers,
Lionel Landwerlin (2):
drm/i915/perf: reuse timestamp frequency from device info
drm/i915/perf: replace .reg accesses with i
This replaces accesses to the reg field of the i915_reg_t structure
with the i915_mmio_reg_offset() inline function.
Suggested-by: Chris Wilson
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_perf.c | 39 ---
1 file changed, 24 insertions(+), 1
On Sat, Nov 11, 2017 at 10:03:36AM +, Chris Wilson wrote:
> gem_workarounds reports that the SLICE_UNIT_LEVEL_CLKGATE write isn't
> sticking. Commit 0a60797a0efb ("drm/i915: Implement
> ReadHitWriteOnlyDisable.") presumes that SLICE_UNIT_LEVEL_CLKGATE is a
> masked register in the context image
== Series Details ==
Series: drm/i915: Fix init_clock_gating for resume
URL : https://patchwork.freedesktop.org/series/33718/
State : success
== Summary ==
Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS (shard-hsw) fdo#102707
Test vgem_basic
== Series Details ==
Series: series starting with [1/2] drm/i915: Fix vblank timestamp/frame counter
jumps on gen2
URL : https://patchwork.freedesktop.org/series/33723/
State : success
== Summary ==
Series 33723v1 series starting with [1/2] drm/i915: Fix vblank timestamp/frame
counter jumps
From: Daniel Vetter
Two bits:
- check actual atomic state, the legacy stuff can only be looked at
from within the atomic_commit_tail function, since it's only
protected by ordering and not by any locks.
- Make sure we don't wreak the work an ongoing nonblocking commit is
doing.
v2: We nee
From: Ville Syrjälä
We should make sure the pipe has fully started when we enable it from
the i830 "power well". Otherwise theoretically i830 could also hit
problems with vblank timestamps jumping around (since we skip the
wait during modeset on i830). Additionally moving planes between the
pipes
From: Ville Syrjälä
Previously I was under the impression that the scanline counter
reads 0 when the pipe is off. Turns out that's not correct, and
instead the scanline counter simply stops when the pipe stops, and
it retains it's last value until the pipe starts up again, at which
point the scan
Quoting Lionel Landwerlin (2017-11-13 15:19:28)
> On 10/11/17 21:00, Chris Wilson wrote:
> > Quoting Lionel Landwerlin (2017-11-10 19:08:45)
> >> @@ -3528,7 +3502,7 @@ void i915_perf_init(struct drm_i915_private
> >> *dev_priv)
> >> spin_lock_init(&dev_priv->perf.oa.oa_buffer.ptr_
== Series Details ==
Series: series starting with [v3,01/11] drm/i915: Update watermark state
correctly in sanitize_watermarks (rev2)
URL : https://patchwork.freedesktop.org/series/33595/
State : failure
== Summary ==
Series 33595 revision 2 was fully merged or fully failed: no git log
_
== Series Details ==
Series: drm/i915: Fix init_clock_gating for resume
URL : https://patchwork.freedesktop.org/series/33718/
State : success
== Summary ==
Series 33718v1 drm/i915: Fix init_clock_gating for resume
https://patchwork.freedesktop.org/api/1.0/series/33718/revisions/1/mbox/
Test c
On 10/11/17 21:00, Chris Wilson wrote:
Quoting Lionel Landwerlin (2017-11-10 19:08:45)
@@ -3528,7 +3502,7 @@ void i915_perf_init(struct drm_i915_private *dev_priv)
spin_lock_init(&dev_priv->perf.oa.oa_buffer.ptr_lock);
oa_sample_rate_hard_limit =
-
== Series Details ==
Series: drm/i915: Put all non-blocking modesets onto an ordered wq
URL : https://patchwork.freedesktop.org/series/33712/
State : warning
== Summary ==
Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS (shard-hsw) fdo#102707
== Series Details ==
Series: series starting with [v3,01/11] drm/i915: Update watermark state
correctly in sanitize_watermarks (rev2)
URL : https://patchwork.freedesktop.org/series/33595/
State : failure
== Summary ==
Series 33595 revision 2 was fully merged or fully failed: no git log
_
From: Ville Syrjälä
Moving the init_clock_gating() call from intel_modeset_init_hw() to
intel_modeset_gem_init() had an unintended effect of not applying
some workarounds on resume. This, for example, cause some kind of
corruption to appear at the top of my IVB Thinkpad X1 Carbon LVDS
screen afte
On Mon, Nov 13, 2017 at 03:40:43PM +0100, Maarten Lankhorst wrote:
> The firmware may have set up the pipe correctly, but the FIFO
> underrun and CRC interrupts are likely not enabled.
>
> This resulted in debugfs_test.read_all_entries failing on haswell,
> because of a timeout when reading the cr
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