[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Remove redundant intel_autoenable_gt_powersave() (rev3)

2017-11-11 Thread Patchwork
== Series Details == Series: drm/i915: Remove redundant intel_autoenable_gt_powersave() (rev3) URL : https://patchwork.freedesktop.org/series/33641/ State : warning == Summary == Series 33641v3 drm/i915: Remove redundant intel_autoenable_gt_powersave() https://patchwork.freedesktop.org/api/1.0

[Intel-gfx] [CI] drm/i915: Remove redundant intel_autoenable_gt_powersave()

2017-11-11 Thread Chris Wilson
Now that we always execute a context switch upon module load, there is no need to queue a delayed task for doing so. The purpose of the delayed task is to enable GT powersaving, for which we need the HW state to be valid (i.e. having loaded a context and initialised basic state). We used to defer t

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Remove redundant intel_autoenable_gt_powersave() (rev2)

2017-11-11 Thread Patchwork
== Series Details == Series: drm/i915: Remove redundant intel_autoenable_gt_powersave() (rev2) URL : https://patchwork.freedesktop.org/series/33641/ State : failure == Summary == Series 33641v2 drm/i915: Remove redundant intel_autoenable_gt_powersave() https://patchwork.freedesktop.org/api/1.0

[Intel-gfx] [CI] drm/i915: Remove redundant intel_autoenable_gt_powersave()

2017-11-11 Thread Chris Wilson
Now that we always execute a context switch upon module load, there is no need to queue a delayed task for doing so. The purpose of the delayed task is to enable GT powersaving, for which we need the HW state to be valid (i.e. having loaded a context and initialised basic state). We used to defer t

Re: [Intel-gfx] [PATCH v3 01/11] drm/i915: Update watermark state correctly in sanitize_watermarks

2017-11-11 Thread Maarten Lankhorst
Op 10-11-17 om 16:28 schreef Ville Syrjälä: > On Fri, Nov 10, 2017 at 12:34:53PM +0100, Maarten Lankhorst wrote: >> We no longer use intel_crtc->wm.active for watermarks any more, >> which was incorrect. But this uncovered a bug in sanitize_watermarks(), >> which meant that we wrote the correct wat

Re: [Intel-gfx] [PATCH v2] drm: gem_cma_helper.c: Allow importing of contiguous scatterlists with nents > 1

2017-11-11 Thread Laurent Pinchart
Hi Liviu, Thank you for the patch. On Friday, 10 November 2017 15:33:10 EET Liviu Dudau wrote: > drm_gem_cma_prime_import_sg_table() will fail if the number of entries > in the sg_table > 1. However, you can have a device that uses an IOMMU > engine and can map a discontiguous buffer with multipl

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Unify SLICE_UNIT_LEVEL_CLKGATE w/a for cnl

2017-11-11 Thread Patchwork
== Series Details == Series: drm/i915: Unify SLICE_UNIT_LEVEL_CLKGATE w/a for cnl URL : https://patchwork.freedesktop.org/series/33659/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 Test drv_module_reload:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Unify SLICE_UNIT_LEVEL_CLKGATE w/a for cnl

2017-11-11 Thread Patchwork
== Series Details == Series: drm/i915: Unify SLICE_UNIT_LEVEL_CLKGATE w/a for cnl URL : https://patchwork.freedesktop.org/series/33659/ State : success == Summary == Series 33659v1 drm/i915: Unify SLICE_UNIT_LEVEL_CLKGATE w/a for cnl https://patchwork.freedesktop.org/api/1.0/series/33659/revis

[Intel-gfx] [PATCH] drm/i915: Unify SLICE_UNIT_LEVEL_CLKGATE w/a for cnl

2017-11-11 Thread Chris Wilson
gem_workarounds reports that the SLICE_UNIT_LEVEL_CLKGATE write isn't sticking. Commit 0a60797a0efb ("drm/i915: Implement ReadHitWriteOnlyDisable.") presumes that SLICE_UNIT_LEVEL_CLKGATE is a masked register in the context image, but commit 90007bca6162 ("drm/i915/cnl: Introduce initial Cannonlake

Re: [Intel-gfx] [PATCH 1/1] drm/i915/cnl: Extend HDMI 2.0 support to CNL.

2017-11-11 Thread Sharma, Shashank
I am still waiting for the dmesg logs, Rodrigo :P I am pretty sure that you would have picked up if there is a general problem, wit the modeset or HDMI. I just want to check what is following from the mode and monitor combination during blankout: - is the mode YCBCR420 ? - is scrambling en

Re: [Intel-gfx] [PATCH 1/1] drm/i915/cnl: Extend HDMI 2.0 support to CNL.

2017-11-11 Thread Sharma, Shashank
Regards Shashank On 11/11/2017 3:56 AM, Rodrigo Vivi wrote: Starting on GLK we support HDMI 2.0. So this patch only extend the work Shashank has made to GLK to CNL. Cc: Paulo Zanoni Cc: Shashank Sharma Cc: Manasi Navare Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_hdmi.c |