[Intel-gfx] ✓ Fi.CI.IGT: success for lib/igt_gt: Allow non-default contexts to hang non-render rings (rev7)

2017-10-13 Thread Patchwork
== Series Details == Series: lib/igt_gt: Allow non-default contexts to hang non-render rings (rev7) URL : https://patchwork.freedesktop.org/series/31693/ State : success == Summary == Test gem_exec_schedule: Subgroup preempt-other-bsd1: incomplete -> SKIP (shard-h

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] lib/sw_sync: Cleanup up error message for sw_sync_timeline_inc()

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [1/2] lib/sw_sync: Cleanup up error message for sw_sync_timeline_inc() URL : https://patchwork.freedesktop.org/series/31934/ State : success == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shar

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev6)

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev6) URL : https://patchwork.freedesktop.org/series/30384/ State : failure == Summary == Test kms_flip: Subgroup basic-flip-vs-wf_vblank: pass -> FAIL (shard-hsw)

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Plane assert/readout cleanups etc. (rev4)

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Plane assert/readout cleanups etc. (rev4) URL : https://patchwork.freedesktop.org/series/31758/ State : failure == Summary == Test perf: Subgroup oa-exponents: pass -> FAIL (shard-hsw) Test kms_setmode: Subgroup

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Use bdw_ddi_translations_fdi for Broadwell

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Use bdw_ddi_translations_fdi for Broadwell URL : https://patchwork.freedesktop.org/series/31939/ State : warning == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 Test kms_flip:

[Intel-gfx] ✓ Fi.CI.IGT: success for locking/lockdep: Don't bunch up all flush_workqueue callers into a single completion cross-release context

2017-10-13 Thread Patchwork
== Series Details == Series: locking/lockdep: Don't bunch up all flush_workqueue callers into a single completion cross-release context URL : https://patchwork.freedesktop.org/series/31937/ State : success == Summary == shard-hswtotal:2553 pass:1441 dwarn:1 dfail:0 fail:8 skip:1

Re: [Intel-gfx] [PATCH v3 01/22] drm/i915: Use a mask when applying WaProgramL3SqcReg1Default

2017-10-13 Thread Michel Thierry
On 10/13/2017 2:28 PM, Chris Wilson wrote: Quoting Oscar Mateo (2017-10-13 21:53:55) Otherwise we are blasting other bits in GEN8_L3SQCREG1 that might be important (although we probably aren't at the moment because 0 seems to be the default for all the other bits). Fixes: 050fc46 ("drm/i915:bxt

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Cleaner DDI DP vs. HDMI split

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Cleaner DDI DP vs. HDMI split URL : https://patchwork.freedesktop.org/series/31652/ State : failure == Summary == Test kms_flip: Subgroup wf_vblank-vs-dpms-interruptible: pass -> DMESG-WARN (shard-hsw) fdo#102614 Test kms_cur

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/9] drm/i915: Refactor testing obj->mm.pages (rev3)

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915: Refactor testing obj->mm.pages (rev3) URL : https://patchwork.freedesktop.org/series/31959/ State : failure == Summary == Series 31959v3 series starting with [1/9] drm/i915: Refactor testing obj->mm.pages https://patchwork.fre

[Intel-gfx] [PATCH v3] drm/i915: Move dev_priv->mm.[un]bound_list to its own lock

2017-10-13 Thread Chris Wilson
Remove the struct_mutex requirement around dev_priv->mm.bound_list and dev_priv->mm.unbound_list by giving it its own spinlock. This reduces one more requirement for struct_mutex and in the process gives us slightly more accurate unbound_list tracking, which should improve the shrinker - but the dr

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Plane assert/readout cleanups etc. (rev2)

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Plane assert/readout cleanups etc. (rev2) URL : https://patchwork.freedesktop.org/series/31758/ State : warning == Summary == Test kms_atomic_transition: Subgroup plane-all-transition: pass -> DMESG-WARN (shard-hsw) S

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/9] drm/i915: Refactor testing obj->mm.pages (rev2)

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915: Refactor testing obj->mm.pages (rev2) URL : https://patchwork.freedesktop.org/series/31959/ State : failure == Summary == Series 31959v2 series starting with [1/9] drm/i915: Refactor testing obj->mm.pages https://patchwork.fre

[Intel-gfx] [PATCH v2] drm/i915: Move dev_priv->mm.[un]bound_list to its own lock

2017-10-13 Thread Chris Wilson
Remove the struct_mutex requirement around dev_priv->mm.bound_list and dev_priv->mm.unbound_list by giving it its own spinlock. This reduces one more requirement for struct_mutex and in the process gives us slightly more accurate unbound_list tracking, which should improve the shrinker - but the dr

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/9] drm/i915: Refactor testing obj->mm.pages

2017-10-13 Thread Chris Wilson
Quoting Patchwork (2017-10-13 22:46:12) > == Series Details == > > Series: series starting with [1/9] drm/i915: Refactor testing obj->mm.pages > URL : https://patchwork.freedesktop.org/series/31959/ > State : warning > > == Summary == > > Series 31959v1 series starting with [1/9] drm/i915: Ref

[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/gem_workarounds: Test all types of workarounds (rev2)

2017-10-13 Thread Patchwork
== Series Details == Series: igt/gem_workarounds: Test all types of workarounds (rev2) URL : https://patchwork.freedesktop.org/series/31612/ State : failure == Summary == IGT patchset tested on top of latest successful build 58616272b23efce1e62a3ee0d37e13de6ffc012f igt/gem_eio: Check hang/eio

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] lib: Move __gem_context_create to common ioctl wrapper library.

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] lib: Move __gem_context_create to common ioctl wrapper library. URL : https://patchwork.freedesktop.org/series/31960/ State : failure == Summary == Series 31960 revision 1 was fully merged or fully failed: no git log

[Intel-gfx] ✗ Fi.CI.BAT: failure for Refactor HW workaround code (rev3)

2017-10-13 Thread Patchwork
== Series Details == Series: Refactor HW workaround code (rev3) URL : https://patchwork.freedesktop.org/series/31611/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CHK includ

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/9] drm/i915: Refactor testing obj->mm.pages

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/i915: Refactor testing obj->mm.pages URL : https://patchwork.freedesktop.org/series/31959/ State : warning == Summary == Series 31959v1 series starting with [1/9] drm/i915: Refactor testing obj->mm.pages https://patchwork.freedesktop

Re: [Intel-gfx] [PATCH v3 01/22] drm/i915: Use a mask when applying WaProgramL3SqcReg1Default

2017-10-13 Thread Chris Wilson
Quoting Oscar Mateo (2017-10-13 21:53:55) > Otherwise we are blasting other bits in GEN8_L3SQCREG1 that might be important > (although we probably aren't at the moment because 0 seems to be the default > for all the other bits). > > Fixes: 050fc46 ("drm/i915:bxt: implement WaProgramL3SqcReg1Defaul

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Properly lock the engine timeline in debugfs i915_gem_request

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Properly lock the engine timeline in debugfs i915_gem_request URL : https://patchwork.freedesktop.org/series/31958/ State : success == Summary == Series 31958v1 series starting with [1/2] drm/i915: Properly lock the engine tim

Re: [Intel-gfx] [PATCH i-g-t v2 2/2] tests/gem_reset_stats: Add client ban test

2017-10-13 Thread Chris Wilson
Quoting Antonio Argenziano (2017-10-13 21:49:29) > A client that submits 'bad' contexts will be banned eventually while > other clients are not affected. Add a test for this. > > v2 > - Do not use a fixed number of contexts to ban client (Chris) > > Signed-off-by: Antonio Argenziano > >

Re: [Intel-gfx] [PATCH i-g-t v2 1/2] lib: Move __gem_context_create to common ioctl wrapper library.

2017-10-13 Thread Chris Wilson
Quoting Antonio Argenziano (2017-10-13 21:49:28) > static void gem_require_context(int fd) > { > - igt_require(__gem_context_create(fd)); > + uint32_t ctx_id = 0; > + __gem_context_create(fd, &ctx_id); > + igt_require(ctx_id); Still that leaks. uint32_t has_contexts = 0;

[Intel-gfx] [PATCH i-g-t v3] igt/gem_workarounds: Test all types of workarounds

2017-10-13 Thread Oscar Mateo
Apart from context based workarounds, we can now also test for global MMIO and whitelisting ones. Do take into account that this test does not guarantee that all known WAs for a given platform are applied. It only checks that the WAs the kernel does know about are correctly applied (e.g. they didn

[Intel-gfx] [PATCH v3 18/22] drm/i915/skl: Move GT and Display workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
To their rightful place inside intel_workarounds.c Signed-off-by: Oscar Mateo Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 15 +-- drivers/gpu/drm/i915/intel_workarounds.c | 6 ++ 2 files changed, 7 inse

[Intel-gfx] [PATCH v3 13/22] drm/i915/gen9: Remove Gen9 WAs with no effect

2017-10-13 Thread Oscar Mateo
GEN8_CONFIG0 (0xD00) is a protected by a lock (bit 31) which is set by the BIOS, so there is no way we can enable the three chicken bits mandated by the WA (the BIOS should be doing it instead). v2: Rebased Signed-off-by: Oscar Mateo Cc: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH v3 11/22] drm/i915/cnl: Move GT and Display workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
To their rightful place inside intel_workarounds.c Signed-off-by: Oscar Mateo Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 32 +--- drivers/gpu/drm/i915/intel_workarounds.c | 26 ++

[Intel-gfx] [PATCH v3 22/22] drm/i915: Document the i915_workarounds file

2017-10-13 Thread Oscar Mateo
Does what it says on the tin (plus a few fixes in some old comments). v2: Include display WAs as a separate category. Signed-off-by: Oscar Mateo Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 4 +-- drivers/gpu/drm/i915/intel_workarounds.

[Intel-gfx] [PATCH v3 08/22] drm/i915: Create a new category of display WAs

2017-10-13 Thread Oscar Mateo
Display workarounds do not need to be re-applied on a GPU reset (this is, in Ville's words: "at the very least wasted effort [...] and could even be actively harmful in case we end up clobbering something the current display configuration depends on"). Therefore, they have to be applied in a differ

[Intel-gfx] [PATCH v3 20/22] drm/i915/bdw: Move GT and Display workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
To their rightful place inside intel_workarounds.c TODO: Notice that we are leaving WaProgramL3SqcReg1Default (and the associated WaTempDisableDOPClkGating) behind because it requires extra careful reviewing. We'll deal with it in a separate patch. TODO2: Decide what to do with lpt_init_clock_gat

[Intel-gfx] [PATCH v3 17/22] drm/i915/bxt: Move GT and Display workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
To their rightful place inside intel_workarounds.c Signed-off-by: Oscar Mateo Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 26 ++ drivers/gpu/drm/i915/intel_workarounds.c | 15 +++ 2 f

[Intel-gfx] [PATCH v3 06/22] drm/i915: Save all GT WAs and apply them at a later time

2017-10-13 Thread Oscar Mateo
By doing this, we can dump these workarounds in debugfs for validation (which, at the moment, we are only able to do for the contexts WAs). v2: - Wrong macro used for MMIO set bit masked - Improved naming - Rebased v3: - GT instead of MMIO (Chris, Mika) - Leave L3_PRIO_CREDITS_MASK for

[Intel-gfx] [PATCH v3 21/22] drm/i915: Move WaProgramL3SqcReg1Default to the workarounds file

2017-10-13 Thread Oscar Mateo
This means moving WaTempDisableDOPClkGating as well. Notice that BXT implements a similar WA to WaProgramL3SqcReg1Default but, according to the BSpec, it does not require WaTempDisableDOPClkGating. Signed-off-by: Oscar Mateo Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjäl

[Intel-gfx] [PATCH v3 02/22] drm/i915: No need for RING_MAX_NONPRIV_SLOTS space

2017-10-13 Thread Oscar Mateo
Now that we write RING_FORCE_TO_NONPRIV registers directly to hardware, [commit 32ced39 ("drm/i915: Transform whitelisting WAs into a simple reg write")] there is no need to save space for them in the list of context workarounds. v2: Refer to previous commit in commit message (Michel) Signed-off-

[Intel-gfx] [PATCH v3 12/22] drm/i915/gen9: Move GT and Display workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
To their rightful place inside intel_workarounds.c Signed-off-by: Oscar Mateo Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 51 -- drivers/gpu/drm/i915/intel_workarounds.c | 54

[Intel-gfx] [PATCH v3 19/22] drm/i915/chv: Move GT and Display workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
To their rightful place inside intel_workarounds.c TODO: Notice that we are leaving WaProgramL3SqcReg1Default (and the associated WaTempDisableDOPClkGating) behind because it requires extra careful reviewing. We'll deal with it in a separate patch. Signed-off-by: Oscar Mateo Cc: Rodrigo Vivi Cc

[Intel-gfx] [PATCH v3 09/22] drm/i915: Print all workaround types correctly in debugfs

2017-10-13 Thread Oscar Mateo
Let's try to make sure that all WAs are applied correctly and survive resumes, resets, etc... (with some help from a companion i-g-t patch). v2: - Rebased - Print display WAs as well (Ville) Signed-off-by: Oscar Mateo Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/d

[Intel-gfx] [PATCH v3 14/22] drm/i915/cfl: Move GT and Display workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
To their rightful place inside intel_workarounds.c Signed-off-by: Oscar Mateo Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 23 +-- drivers/gpu/drm/i915/intel_workarounds.c | 9 + 2 files chan

[Intel-gfx] [PATCH v3 05/22] drm/i915: Rename saved workarounds to make it explicit that they are context WAs

2017-10-13 Thread Oscar Mateo
Some WAs touch registers that get saved/restored together with the logical context. Make this very explicit by renaming a few things in the code. v2: - Improved naming - Rebased v3: Also rename I915_MAX_CTX_WA_REGS Signed-off-by: Oscar Mateo Cc: Chris Wilson Cc: Mika Kuoppala --- driver

[Intel-gfx] [PATCH v3 10/22] drm/i915: Move WA BB stuff to the workarounds file as well

2017-10-13 Thread Oscar Mateo
Since we are trying to put all WA stuff together, do not forget about the BB WAs. Signed-off-by: Oscar Mateo Cc: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/intel_lrc.c | 253 +- drivers/gpu/drm/i915/intel_workarounds.c | 254 +++

[Intel-gfx] [PATCH v3 15/22] drm/i915/glk: Move GT and Display workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
To their rightful place inside intel_workarounds.c Signed-off-by: Oscar Mateo Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 33 ++-- drivers/gpu/drm/i915/intel_workarounds.c | 17 ++

[Intel-gfx] [PATCH v3 01/22] drm/i915: Use a mask when applying WaProgramL3SqcReg1Default

2017-10-13 Thread Oscar Mateo
Otherwise we are blasting other bits in GEN8_L3SQCREG1 that might be important (although we probably aren't at the moment because 0 seems to be the default for all the other bits). Fixes: 050fc46 ("drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerf") Fixes: 450174f ("drm/i915/chv: Tune L3 SQ

[Intel-gfx] [PATCH v3 16/22] drm/i915/kbl: Move GT and Display workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
To their rightful place inside intel_workarounds.c Signed-off-by: Oscar Mateo Cc: Rodrigo Vivi Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 21 + drivers/gpu/drm/i915/intel_workarounds.c | 11 +++ 2 files chan

[Intel-gfx] [PATCH v3 04/22] drm/i915: Split out functions for different kinds of workarounds

2017-10-13 Thread Oscar Mateo
There are different kind of workarounds (those that modify registers that live in the context image, those that modify global registers, those that whitelist registers, etc...) and they have different requirements in terms of where they are applied and how. Also, by splitting them apart, it should

[Intel-gfx] [PATCH v3 00/22] Refactor HW workaround code

2017-10-13 Thread Oscar Mateo
Main difference with v2 is the split into GT and Display workarounds (suggested by Ville). Because that makes review even more important (which WA goes where?) I have split the movement of WAs from init_clock_gating into separate patches (one per GEN). Currently, deciding how/where to apply new wo

[Intel-gfx] [PATCH v3 03/22] drm/i915: Move a bunch of workaround-related code to its own file

2017-10-13 Thread Oscar Mateo
This has grown to be a sizable amount of code, so move it to its own file before we try to refactor anything. For the moment, we are leaving behind the WA BB code and the WAs that get applied (incorrectly) in init_clock_gating, but we will deal with it later. v2: Use intel_ prefix for code that de

[Intel-gfx] [PATCH v3 07/22] drm/i915: Save all Whitelist WAs and apply them at a later time

2017-10-13 Thread Oscar Mateo
Same as we have been doing for other types, this allow us to dump the whole list of workarounds to debugs, for validation purposes. v2: - Improved naming - Rebased Signed-off-by: Oscar Mateo Cc: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/i915_debugfs.c | 2 +- drivers/

Re: [Intel-gfx] [PATCH 04/11] drm/i915: Move workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
On 10/11/2017 11:29 AM, Chris Wilson wrote: Quoting Oscar Mateo (2017-10-11 19:15:14) I'm not sure why some WAs have historically been applied in init_clock_gating and some others in the engine setup (GT vs. display? context vs. global registers?) but it does not look like the best place to ap

Re: [Intel-gfx] [PATCH 08/11] drm/i915: Print all workaround types correctly in debugfs

2017-10-13 Thread Oscar Mateo
On 10/11/2017 11:41 AM, Chris Wilson wrote: Quoting Oscar Mateo (2017-10-11 19:15:18) Let's try to make sure that all WAs are applied correctly and survive resumes, resets, etc... (with some help from a companion i-g-t patch). Signed-off-by: Oscar Mateo Cc: Chris Wilson Cc: Mika Kuoppala -

[Intel-gfx] [PATCH i-g-t v2 2/2] tests/gem_reset_stats: Add client ban test

2017-10-13 Thread Antonio Argenziano
A client that submits 'bad' contexts will be banned eventually while other clients are not affected. Add a test for this. v2 - Do not use a fixed number of contexts to ban client (Chris) Signed-off-by: Antonio Argenziano Cc: Michel Thierry Cc: Chris Wilson --- tests/gem_reset_stats.c

Re: [Intel-gfx] [PATCH 06/11] drm/i915: Save all MMIO WAs and apply them at a later time

2017-10-13 Thread Oscar Mateo
On 10/12/2017 03:35 AM, Joonas Lahtinen wrote: On Wed, 2017-10-11 at 11:15 -0700, Oscar Mateo wrote: By doing this, we can dump these workarounds in debugfs for validation (which, at the moment, we are only able to do for the contexts WAs). v2: - Wrong macro used for MMIO set bit masked

[Intel-gfx] [PATCH i-g-t v2 1/2] lib: Move __gem_context_create to common ioctl wrapper library.

2017-10-13 Thread Antonio Argenziano
This patch adds a context creation ioctl wrapper that returns the error for the caller to consume. Multiple tests that implemented this already, have been changed to use the new library function. v2: - Add gem_require_contexts() to check for contexts support (Chris) Signed-off-by: Antonio

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use bdw_ddi_translations_fdi for Broadwell

2017-10-13 Thread Chris Wilson
Quoting Patchwork (2017-10-13 18:42:57) > == Series Details == > > Series: drm/i915: Use bdw_ddi_translations_fdi for Broadwell > URL : https://patchwork.freedesktop.org/series/31939/ > State : success > > == Summary == > > Series 31939v1 drm/i915: Use bdw_ddi_translations_fdi for Broadwell >

Re: [Intel-gfx] [PATCH 04/11] drm/i915: Move workarounds from init_clock_gating

2017-10-13 Thread Oscar Mateo
On 10/11/2017 11:35 AM, Ville Syrjälä wrote: On Wed, Oct 11, 2017 at 11:15:14AM -0700, Oscar Mateo wrote: I'm not sure why some WAs have historically been applied in init_clock_gating and some others in the engine setup (GT vs. display? context vs. global registers?) but it does not look like

Re: [Intel-gfx] [PATCH v2] igt/gem_workarounds: Test all types of workarounds

2017-10-13 Thread Oscar Mateo
On 10/12/2017 05:40 AM, Petri Latvala wrote: On Wed, Oct 11, 2017 at 11:15:40AM -0700, Oscar Mateo wrote: Apart from context based workarounds, we can now also test for global MMIO and whitelisting ones. Do take into account that this test does not guarantee that all known WAs for a given pla

[Intel-gfx] [PATCH 8/9] drm/i915: Only free the oldest stale object before a fresh allocation

2017-10-13 Thread Chris Wilson
Inspired by Tvrtko's critique of the reaping of the stale contexts before allocating a new one, also limit the freed object reaping to the oldest stale object before allocating a fresh object. Unlike contexts, objects may have radically different sizes of backing storage, but similar to contexts, w

[Intel-gfx] [PATCH 7/9] drm/i915: Set our shrinker->batch to 4096 (~16MiB)

2017-10-13 Thread Chris Wilson
Prefer to defer activating our GEM shrinker until we have a few megabytes to free; or we have accumulated sufficient mempressure by deferring the reclaim to force a shrink. The intent is that because our objects may typically be large, we are too effective at shrinking and are not rewarded for free

[Intel-gfx] [PATCH 1/9] drm/i915: Refactor testing obj->mm.pages

2017-10-13 Thread Chris Wilson
Since we occasionally stuff an error pointer into obj->mm.pages for a semi-permanent or even permanent failure, we have to be more careful and not just test against NULL when deciding if the object has a complete set of its concurrent pages. Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtine

[Intel-gfx] [PATCH 3/9] drm/i915: Drop debugfs/i915_gem_pin_display

2017-10-13 Thread Chris Wilson
It has now lost its meaning (it shows more than just pin_display), I do not believe that we are using in preference to the complete listing from i915_gem_gtt, or the listing from i915_gem_framebuffer, or the listing of active display objects in i915_display_info. Signed-off-by: Chris Wilson ---

[Intel-gfx] [PATCH 9/9] drm/i915: Trim struct_mutex hold duration for i915_gem_free_objects

2017-10-13 Thread Chris Wilson
We free objects in bulk after they wait for their RCU grace period. Currently, we take struct_mutex and unbind all the objects. This can lead to a long lock duration during which time those objects have their pages unfreeable (i.e. the shrinker is prevented from reaping those pages). If we only pro

[Intel-gfx] [PATCH 4/9] drm/i915: Remove walk over obj->vma_list for the shrinker

2017-10-13 Thread Chris Wilson
In the next patch, we want to reduce the lock coverage within the shrinker, and one of the dangerous walks we have is over obj->vma_list. We are only walking the obj->vma_list in order to check whether it has been permanently pinned by HW access, typically via use on the scanout. But we have a coup

[Intel-gfx] [PATCH 5/9] drm/i915: Move dev_priv->mm.[un]bound_list to its own lock

2017-10-13 Thread Chris Wilson
Remove the struct_mutex requirement around dev_priv->mm.bound_list and dev_priv->mm.unbound_list by giving it its own spinlock. This reduces one more requirement for struct_mutex and in the process gives us slightly more accurate unbound_list tracking, which should improve the shrinker - but the dr

[Intel-gfx] [PATCH 2/9] drm/i915: Rename obj->pin_display to obj->pin_global

2017-10-13 Thread Chris Wilson
In the next patch, we want to extend use of the global pin counter for semi-permanent pinning of context/ring objects. Given that we plan to extend the usage to encompass a disparate set of objects, we want a name that reflects both and should entail less confusion. Signed-off-by: Chris Wilson --

[Intel-gfx] [PATCH 6/9] drm/i915: Wire up shrinkctl->nr_scanned

2017-10-13 Thread Chris Wilson
shrink_slab() allows us to report back the number of objects we successfully scanned (out of the target shrinkctl->nr_to_scan). As report the number of pages owned by each GEM object as a separate item to the shrinker, we cannot precisely control the number of shrinker objects we scan on each pass;

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Properly lock the engine timeline in debugfs i915_gem_request

2017-10-13 Thread Chris Wilson
Quoting jeff.mc...@intel.com (2017-10-13 21:10:32) > From: Jeff McGee > > We are racing with updates to the timeline. This can cause an inconsistent > snapshot to be dumped, or even worse a NULL pointer dereference. So no one's being using this, lets delete it. If the execution list is useful i

[Intel-gfx] [PATCH 1/2] drm/i915: Properly lock the engine timeline in debugfs i915_gem_request

2017-10-13 Thread jeff . mcgee
From: Jeff McGee We are racing with updates to the timeline. This can cause an inconsistent snapshot to be dumped, or even worse a NULL pointer dereference. Signed-off-by: Jeff McGee --- drivers/gpu/drm/i915/i915_debugfs.c | 27 ++- 1 file changed, 10 insertions(+), 17

[Intel-gfx] [PATCH 2/2] drm/i915: Include current seqno in debugfs i915_gem_request

2017-10-13 Thread jeff . mcgee
From: Jeff McGee Debugfs i915_gem_request lists the entire queue of requests on the engine timeline. This will include requests that are complete but not yet removed from the timeline. So let's include in this snapshot the current seqno to help separate completed from pending. Signed-off-by: Jef

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Remove mostly duplicated video DIP handling from PSR code

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Remove mostly duplicated video DIP handling from PSR code URL : https://patchwork.freedesktop.org/series/31954/ State : warning == Summary == Series 31954v1 drm/i915: Remove mostly duplicated video DIP handling from PSR code https://patchwork.freedesktop

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Keep the rings stopped until they have been re-initialized

2017-10-13 Thread Chris Wilson
Quoting Patchwork (2017-10-13 20:53:49) > == Series Details == > > Series: series starting with [1/2] drm/i915: Keep the rings stopped until > they have been re-initialized > URL : https://patchwork.freedesktop.org/series/31915/ > State : failure > > == Summary == > > Test gem_eio: >

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Keep the rings stopped until they have been re-initialized

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Keep the rings stopped until they have been re-initialized URL : https://patchwork.freedesktop.org/series/31915/ State : failure == Summary == Test gem_eio: Subgroup in-flight-suspend: dmesg-warn -> PASS

[Intel-gfx] ✓ Fi.CI.BAT: success for lib/igt_gt: Allow non-default contexts to hang non-render rings (rev7)

2017-10-13 Thread Patchwork
== Series Details == Series: lib/igt_gt: Allow non-default contexts to hang non-render rings (rev7) URL : https://patchwork.freedesktop.org/series/31693/ State : success == Summary == IGT patchset tested on top of latest successful build 58616272b23efce1e62a3ee0d37e13de6ffc012f igt/gem_eio: Ch

[Intel-gfx] [PATCH v2] drm/i915: Remove mostly duplicated video DIP handling from PSR code

2017-10-13 Thread Ville Syrjala
From: Ville Syrjälä Now that the infoframe hooks are part of the intel_dig_port, we can use the normal .write_infoframe() hook to update the VSC SDP. We do need to deal with the size difference between the VSC DIP and the others though. Another minor snag is that the compiler will complain to us

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Disable -Woverride-init

2017-10-13 Thread Chris Wilson
Quoting Ville Syrjälä (2017-10-13 17:47:25) > On Fri, Oct 13, 2017 at 05:08:29PM +0100, Chris Wilson wrote: > > We commonly use an inheritance style approach to device parameters, > > where later generations inherit the defaults from earlier generations > > and then override settings that change. F

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] lib/sw_sync: Cleanup up error message for sw_sync_timeline_inc()

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [1/2] lib/sw_sync: Cleanup up error message for sw_sync_timeline_inc() URL : https://patchwork.freedesktop.org/series/31934/ State : success == Summary == IGT patchset tested on top of latest successful build 58616272b23efce1e62a3ee0d37e13de6f

[Intel-gfx] ✗ Fi.CI.BAT: warning for tests/pm_backlight: Enable connected output to allow tests to succeed, v2. (rev2)

2017-10-13 Thread Patchwork
== Series Details == Series: tests/pm_backlight: Enable connected output to allow tests to succeed, v2. (rev2) URL : https://patchwork.freedesktop.org/series/31924/ State : warning == Summary == IGT patchset tested on top of latest successful build 58616272b23efce1e62a3ee0d37e13de6ffc012f igt

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Cleaner DDI DP vs. HDMI split

2017-10-13 Thread Jani Nikula
On Fri, 13 Oct 2017, Ville Syrjälä wrote: > On Fri, Oct 13, 2017 at 05:03:39PM -, Patchwork wrote: >> == Series Details == >> >> Series: drm/i915: Cleaner DDI DP vs. HDMI split >> URL : https://patchwork.freedesktop.org/series/31652/ >> State : success >> >> == Summary == >> >> Series 316

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev6)

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev6) URL : https://patchwork.freedesktop.org/series/30384/ State : success == Summary == Series 30384v6 drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector https://patchwork.freedesktop.o

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Cleaner DDI DP vs. HDMI split

2017-10-13 Thread Ville Syrjälä
On Fri, Oct 13, 2017 at 05:03:39PM -, Patchwork wrote: > == Series Details == > > Series: drm/i915: Cleaner DDI DP vs. HDMI split > URL : https://patchwork.freedesktop.org/series/31652/ > State : success > > == Summary == > > Series 31652v1 drm/i915: Cleaner DDI DP vs. HDMI split > https:/

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Split intel_enable_ddi() into DP and HDMI variants

2017-10-13 Thread Ville Syrjälä
On Fri, Oct 13, 2017 at 05:20:47PM +0300, Jani Nikula wrote: > On Wed, 11 Oct 2017, Jani Nikula wrote: > > On Tue, 10 Oct 2017, Ville Syrjala wrote: > >> From: Ville Syrjälä > >> > >> Untangle intel_enable_ddi() by splitting it into DP and HDMI specific > >> variants. > >> > >> v2: Keep using in

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Plane assert/readout cleanups etc. (rev4)

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Plane assert/readout cleanups etc. (rev4) URL : https://patchwork.freedesktop.org/series/31758/ State : success == Summary == Series 31758v4 drm/i915: Plane assert/readout cleanups etc. https://patchwork.freedesktop.org/api/1.0/series/31758/revisions/4/mb

[Intel-gfx] [PATCH v5] drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector

2017-10-13 Thread James Ausmus
Make intel_dp_add_mst_connector handle error returns from the drm_ calls. Add intel_connector_free to support cleanup on the error path. v2: Rename new function to avoid confusion, and simplify error paths (Ville) v3: Indentation fixup, style fixes (Ville) v4: Clarify usage of intel_connector_fr

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use bdw_ddi_translations_fdi for Broadwell

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Use bdw_ddi_translations_fdi for Broadwell URL : https://patchwork.freedesktop.org/series/31939/ State : success == Summary == Series 31939v1 drm/i915: Use bdw_ddi_translations_fdi for Broadwell https://patchwork.freedesktop.org/api/1.0/series/31939/revis

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Disable -Woverride-init

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Disable -Woverride-init URL : https://patchwork.freedesktop.org/series/31942/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/uts

[Intel-gfx] [PATCH v4 03/10] drm/i915: s/enum plane/enum i9xx_plane_id/

2017-10-13 Thread Ville Syrjala
From: Ville Syrjälä Rename enum plane to enum i9xx_plane_id to make it clear that it only applies to pre-SKL platforms. enum i9xx_plane_id is a global identifier, whereas enum plane_id is per-pipe. We need the old global identifier to index the primary plane (and the pre-g4x sprite C if we ever

[Intel-gfx] [PATCH v3 01/10] drm/i915: Add .get_hw_state() method for planes

2017-10-13 Thread Ville Syrjala
From: Ville Syrjälä Add a .get_hw_state() method for planes, returning true or false depending on whether the plane is enabled. Use it to rewrite the plane enabled/disabled asserts in platform agnostic fashion. We do lose the pre-gen4 plane<->pipe mapping checks, but since we're supposed sanitiz

[Intel-gfx] ✓ Fi.CI.BAT: success for locking/lockdep: Don't bunch up all flush_workqueue callers into a single completion cross-release context

2017-10-13 Thread Patchwork
== Series Details == Series: locking/lockdep: Don't bunch up all flush_workqueue callers into a single completion cross-release context URL : https://patchwork.freedesktop.org/series/31937/ State : success == Summary == Series 31937v1 locking/lockdep: Don't bunch up all flush_workqueue caller

[Intel-gfx] [PATCH i-g-t v7] lib/igt_gt: Allow non-default contexts to hang non-render rings

2017-10-13 Thread Vinay Belgaumkar
This limitation does not exist in latest kernel. It was removed by this patch- commit f7978a0c581a8a840a28306f8da43e06e7fef3bf v2: Added commit id that removes the limitation(Chris Wilson) V3: Generic way to find if kernel supports this instead of hardcoding gens(Chris Wilson) v4: Optimize the i

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Parse DSI backlight/cabc ports.

2017-10-13 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Parse DSI backlight/cabc ports. URL : https://patchwork.freedesktop.org/series/31914/ State : success == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 Test km

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Cleaner DDI DP vs. HDMI split

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Cleaner DDI DP vs. HDMI split URL : https://patchwork.freedesktop.org/series/31652/ State : success == Summary == Series 31652v1 drm/i915: Cleaner DDI DP vs. HDMI split https://patchwork.freedesktop.org/api/1.0/series/31652/revisions/1/mbox/ Test kms_pip

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Plane assert/readout cleanups etc. (rev2)

2017-10-13 Thread Ville Syrjälä
On Fri, Oct 13, 2017 at 04:24:45PM -, Patchwork wrote: > == Series Details == > > Series: drm/i915: Plane assert/readout cleanups etc. (rev2) > URL : https://patchwork.freedesktop.org/series/31758/ > State : warning > > == Summary == > > Series 31758v2 drm/i915: Plane assert/readout cleanu

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add -Wunused-const-variable to our build

2017-10-13 Thread Ville Syrjälä
On Fri, Oct 13, 2017 at 05:08:30PM +0100, Chris Wilson wrote: > Recently this warning caught a regression that had been lurking for 6 > months, so it seems to be justified! > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/Makefile | 1 + > 1 file changed, 1 insertion(+) > > diff --g

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Disable -Woverride-init

2017-10-13 Thread Ville Syrjälä
On Fri, Oct 13, 2017 at 05:08:29PM +0100, Chris Wilson wrote: > We commonly use an inheritance style approach to device parameters, > where later generations inherit the defaults from earlier generations > and then override settings that change. For example, in i915_pci.c > BDW_FEATURES pulls in HS

[Intel-gfx] ✗ Fi.CI.BAT: failure for HAX: Do not restore mode through fbcon (rev2)

2017-10-13 Thread Patchwork
== Series Details == Series: HAX: Do not restore mode through fbcon (rev2) URL : https://patchwork.freedesktop.org/series/31893/ State : failure == Summary == Series 31893v2 HAX: Do not restore mode through fbcon https://patchwork.freedesktop.org/api/1.0/series/31893/revisions/2/mbox/ Test ch

Re: [Intel-gfx] [PATCH i-g-t 0/4] Move imported bo pread/pwrite tests

2017-10-13 Thread Daniele Ceraolo Spurio
On 12/10/17 15:39, Chris Wilson wrote: Quoting Daniele Ceraolo Spurio (2017-10-12 23:30:40) We already had coverage in prime_vgem.c, but since we're testing pread/pwrite ioctl it makes more sense to have it in the corresponding test binaries Redundancy is not an issue (sometimes it is a virt

Re: [Intel-gfx] [PATCH i-g-t 1/8] lib/igt_dummyload: add igt_cork

2017-10-13 Thread Daniele Ceraolo Spurio
On 13/10/17 01:31, Chris Wilson wrote: Quoting Chris Wilson (2017-10-12 23:57:38) Quoting Daniele Ceraolo Spurio (2017-10-12 23:27:27) +igt_cork_t *igt_cork_new(int fd); _new does not imply plugged. +void igt_cork_signal(igt_cork_t *cork); When have you signaled a cork? +void igt_cork

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Plane assert/readout cleanups etc. (rev2)

2017-10-13 Thread Patchwork
== Series Details == Series: drm/i915: Plane assert/readout cleanups etc. (rev2) URL : https://patchwork.freedesktop.org/series/31758/ State : warning == Summary == Series 31758v2 drm/i915: Plane assert/readout cleanups etc. https://patchwork.freedesktop.org/api/1.0/series/31758/revisions/2/mb

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Disable -Woverride-init

2017-10-13 Thread Michal Wajdeczko
On Fri, 13 Oct 2017 18:08:29 +0200, Chris Wilson wrote: We commonly use an inheritance style approach to device parameters, where later generations inherit the defaults from earlier generations and then override settings that change. For example, in i915_pci.c BDW_FEATURES pulls in HSW_FEATUR

[Intel-gfx] [PATCH 1/2] drm/i915: Disable -Woverride-init

2017-10-13 Thread Chris Wilson
We commonly use an inheritance style approach to device parameters, where later generations inherit the defaults from earlier generations and then override settings that change. For example, in i915_pci.c BDW_FEATURES pulls in HSW_FEATURES, makes a few changes for 48bit contexts and then individual

[Intel-gfx] [PATCH 2/2] drm/i915: Add -Wunused-const-variable to our build

2017-10-13 Thread Chris Wilson
Recently this warning caught a regression that had been lurking for 6 months, so it seems to be justified! Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 0bb6e42

Re: [Intel-gfx] [PATCH] drm/i915: Use bdw_ddi_translations_fdi for Broadwell

2017-10-13 Thread Ville Syrjälä
On Fri, Oct 13, 2017 at 04:47:35PM +0100, Chris Wilson wrote: > The compiler warns: > > drivers/gpu/drm/i915/intel_ddi.c:118:35: warning: > ‘bdw_ddi_translations_fdi’ defined but not used > > Lo and behold, if we look at intel_ddi_get_buf_trans_fdi(), it uses > hsw_ddi_translations_fdi[] f

Re: [Intel-gfx] [PATCH] drm/i915: Use bdw_ddi_translations_fdi for Broadwell

2017-10-13 Thread Chris Wilson
Quoting Chris Wilson (2017-10-13 16:47:35) > The compiler warns: > > drivers/gpu/drm/i915/intel_ddi.c:118:35: warning: > ‘bdw_ddi_translations_fdi’ defined but not used > > Lo and behold, if we look at intel_ddi_get_buf_trans_fdi(), it uses > hsw_ddi_translations_fdi[] for both Haswell a

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