[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp: DPCD register defines for link status within ESI field (rev2)

2017-09-13 Thread Patchwork
== Series Details == Series: drm/dp: DPCD register defines for link status within ESI field (rev2) URL : https://patchwork.freedesktop.org/series/30321/ State : success == Summary == Series 30321v2 drm/dp: DPCD register defines for link status within ESI field https://patchwork.freedesktop.org

[Intel-gfx] [PATCH v2] drm/dp: DPCD register defines for link status within ESI field

2017-09-13 Thread Dhinakaran Pandiyan
Link status is available in the ESI field on devices with DPCD r1.2 or higher. DP spec also says "An MST upstream device shall use this field instead of the Link/Sink Device Status field registers, starting from DPCD Address 00200h." v2: Prefixed DP_ (Jani) Rewrote commment to stay within 80 c

Re: [Intel-gfx] [PATCH] drm/dp: DPCD register defines for link

2017-09-13 Thread Pandiyan, Dhinakaran
On Thu, 2017-09-14 at 09:00 +0300, Jani Nikula wrote: > On Wed, 13 Sep 2017, Dhinakaran Pandiyan > wrote: > > Link status is available in the ESI field on devices with DPCD r1.2 or > > higher. DP spec also says "An MST upstream device shall use this field > > instead of the Link/Sink Device Statu

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/2] drm/i915/gvt: Change log function of kvmgt to common ones

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [v3,1/2] drm/i915/gvt: Change log function of kvmgt to common ones URL : https://patchwork.freedesktop.org/series/30325/ State : success == Summary == Test gem_eio: Subgroup in-flight: fail -> PASS (shard-hs

Re: [Intel-gfx] [PATCH] drm/dp: DPCD register defines for link status within ESI field

2017-09-13 Thread Jani Nikula
On Wed, 13 Sep 2017, Dhinakaran Pandiyan wrote: > Link status is available in the ESI field on devices with DPCD r1.2 or > higher. DP spec also says "An MST upstream device shall use this field > instead of the Link/Sink Device Status field registers, starting from DPCD > Address 00200h." > > Cc:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/mst: Use MST sideband message transactions for dpms control

2017-09-13 Thread Patchwork
== Series Details == Series: drm/i915/mst: Use MST sideband message transactions for dpms control URL : https://patchwork.freedesktop.org/series/30314/ State : success == Summary == Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 Test ge

Re: [Intel-gfx] [PATCH 1/3] drm/i915: dspaddr_offset doesn't need to be more than local variable

2017-09-13 Thread kbuild test robot
Hi Juha-Pekka, [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.13 next-20170914] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Juha-Pekka-Heikkila/drm-i915-Skyl

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915/gvt: Change log function of kvmgt to common ones

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [v3,1/2] drm/i915/gvt: Change log function of kvmgt to common ones URL : https://patchwork.freedesktop.org/series/30325/ State : success == Summary == Series 30325v1 series starting with [v3,1/2] drm/i915/gvt: Change log function of kvmgt to

[Intel-gfx] [PATCH v3 1/2] drm/i915/gvt: Change log function of kvmgt to common ones

2017-09-13 Thread Shuo Liu
This can remove the dependence of i915 module if we change gvt_dbg_* to function in i915 module. Signed-off-by: Shuo Liu --- drivers/gpu/drm/i915/gvt/kvmgt.c | 55 ++-- 1 file changed, 36 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/kv

[Intel-gfx] [PATCH v3 2/2] drm/i915: Add debug_gvt to classify GVT-g log messages

2017-09-13 Thread Shuo Liu
Add a silimar log mechanism as like drm. Classify GVT-g log messages as different categories by differnt log functions. Signed-off-by: Shuo Liu --- drivers/gpu/drm/i915/Kconfig | 8 +++ drivers/gpu/drm/i915/gvt/Makefile | 1 + drivers/gpu/drm/i915/gvt/debug.c | 24

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/prime_busy: Declare the hang tests expect to cause GPU hangs

2017-09-13 Thread Patchwork
== Series Details == Series: igt/prime_busy: Declare the hang tests expect to cause GPU hangs URL : https://patchwork.freedesktop.org/series/30290/ State : success == Summary == Test drv_module_reload: Subgroup basic-reload-inject: pass -> DMESG-WARN (shard-hsw) f

[Intel-gfx] ✓ Fi.CI.IGT: success for IGT Testcases for i915 DAPC feature (rev2)

2017-09-13 Thread Patchwork
== Series Details == Series: IGT Testcases for i915 DAPC feature (rev2) URL : https://patchwork.freedesktop.org/series/29940/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 fdo#99912 https://bugs.freedeskt

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/dp: DPCD register defines for link status within ESI field

2017-09-13 Thread Patchwork
== Series Details == Series: drm/dp: DPCD register defines for link status within ESI field URL : https://patchwork.freedesktop.org/series/30321/ State : warning == Summary == Series 30321v1 drm/dp: DPCD register defines for link status within ESI field https://patchwork.freedesktop.org/api/1.

Re: [Intel-gfx] [PATCH 6/6] intel_aubdump: Add --no-exec command option

2017-09-13 Thread Jordan Justen
On 2017-09-13 18:11:00, Jordan Justen wrote: > In some cases it is preferable to not send exec commands to the > kernel, but to otherwise record the exec command into the AUB file. > > For example, when using the --device override option, it might be best > to avoid passing the EXEC ioctls through

[Intel-gfx] [PATCH 2/6] meson: Install libigt.so

2017-09-13 Thread Jordan Justen
Signed-off-by: Jordan Justen --- lib/meson.build | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/meson.build b/lib/meson.build index b78e42dc..0d379d90 100644 --- a/lib/meson.build +++ b/lib/meson.build @@ -170,6 +170,7 @@ lib_igt_build = shared_library('igt', ['dummy.c'], link_

[Intel-gfx] [PATCH 3/6] meson: Install libintel_aubdump.so

2017-09-13 Thread Jordan Justen
Signed-off-by: Jordan Justen --- tools/meson.build | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/meson.build b/tools/meson.build index d2d4410e..91c58760 100644 --- a/tools/meson.build +++ b/tools/meson.build @@ -54,6 +54,7 @@ foreach prog : tools_progs

[Intel-gfx] [PATCH 5/6] meson: Process intel_aubdump.in into intel_aubdump

2017-09-13 Thread Jordan Justen
Signed-off-by: Jordan Justen --- tools/meson.build | 7 +++ 1 file changed, 7 insertions(+) diff --git a/tools/meson.build b/tools/meson.build index 91c58760..20b63cce 100644 --- a/tools/meson.build +++ b/tools/meson.build @@ -57,4 +57,11 @@ endforeach shared_library('intel_aubdump', 'aubdu

[Intel-gfx] [PATCH 4/6] intel_aubdump.in: Set executable permissions (for meson build)

2017-09-13 Thread Jordan Justen
Meson detects if an input file is executable, and copies that to the output file. Signed-off-by: Jordan Justen --- tools/intel_aubdump.in | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100644 => 100755 tools/intel_aubdump.in diff --git a/tools/intel_aubdump.in b/tools/intel_a

[Intel-gfx] [PATCH 6/6] intel_aubdump: Add --no-exec command option

2017-09-13 Thread Jordan Justen
In some cases it is preferable to not send exec commands to the kernel, but to otherwise record the exec command into the AUB file. For example, when using the --device override option, it might be best to avoid passing the EXEC ioctls through to the kernel. Signed-off-by: Jordan Justen --- too

[Intel-gfx] [PATCH 1/6] intel_aubdump: Rename intel_aubdump.so to libintel_aubdump.so

2017-09-13 Thread Jordan Justen
The meson shared_library function appears to hard code prefixing the library name with 'lib'. Signed-off-by: Jordan Justen --- tools/Makefile.am | 2 +- tools/intel_aubdump.in | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/Makefile.am b/tools/Makefile.am index

[Intel-gfx] [PATCH] drm/dp: DPCD register defines for link status within ESI field

2017-09-13 Thread Dhinakaran Pandiyan
Link status is available in the ESI field on devices with DPCD r1.2 or higher. DP spec also says "An MST upstream device shall use this field instead of the Link/Sink Device Status field registers, starting from DPCD Address 00200h." Cc: Jani Nikula Signed-off-by: Dhinakaran Pandiyan --- includ

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Some DPLL crtc->state/config cleanups etc.

2017-09-13 Thread Patchwork
== Series Details == Series: drm/i915: Some DPLL crtc->state/config cleanups etc. URL : https://patchwork.freedesktop.org/series/30300/ State : failure == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 Test drv_missed_irq:

Re: [Intel-gfx] [PATCH 1/9] drm/i915/mst: Debug log connector name in destroy_connector()

2017-09-13 Thread Ausmus, James
On Tue, Sep 12, 2017 at 4:57 PM, Dhinakaran Pandiyan wrote: > Print connector name in destroy_connect() and this doesn't add any extra > lines to dmesg. The debug macro has been moved before the unregister > call so that we don't lose the connector name and id. > > Signed-off-by: Dhinakaran Pandiy

Re: [Intel-gfx] [RFC] drm/i915/firmware: Load GuC and HuC firmware using async work.

2017-09-13 Thread Rodrigo Vivi
On Wed, Aug 16, 2017 at 5:41 PM, Joseph Garvey wrote: > The DMC firmware is currently being loaded using async work. what would be the advantage? why do we need to load asynchronously? > We can do the same for the GuC and HuC firmware. Also wait for > the work to finish before the firmware trans

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Stop ring before doing readiness check

2017-09-13 Thread Patchwork
== Series Details == Series: drm/i915: Stop ring before doing readiness check URL : https://patchwork.freedesktop.org/series/30298/ State : failure == Summary == Test kms_cursor_legacy: Subgroup cursorA-vs-flipA-atomic-transitions: pass -> FAIL (shard-hsw) T

Re: [Intel-gfx] [PATCH v2] drm/i915: Disable DRRS when PSR is enabled

2017-09-13 Thread Sripada, Radhakrishna
> -Original Message- > From: Nikula, Jani > Sent: Tuesday, September 12, 2017 7:18 AM > To: Pandiyan, Dhinakaran ; Sripada, > Radhakrishna > Cc: intel-gfx@lists.freedesktop.org; Vivi, Rodrigo ; > nicholas.stom...@gmail.com > Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: Disable DRRS when

Re: [Intel-gfx] [PATCH 03/12] drm/i915: Switch over to the LLC/eLLC hotspot avoidance hash mode for CCS

2017-09-13 Thread Ben Widawsky
On 17-08-24 22:10:51, Ville Syrjälä wrote: From: Ville Syrjälä Use the LLC/eLLC hotspot avoidance mode for CCS on LLC machines. This is reported to give better performance. Testing has indicated that we don't need to enforce any massive 2 or 4 MiB alignment for all compressed resources even th

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] drm/i915/lrc: Clarify the format of the context image (rev2)

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915/lrc: Clarify the format of the context image (rev2) URL : https://patchwork.freedesktop.org/series/30269/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hs

Re: [Intel-gfx] [RFC 04/10] drm/i915: Expose a PMU interface for perf queries

2017-09-13 Thread Rogozhkin, Dmitry V
On Tue, 2017-08-29 at 21:21 +0200, Peter Zijlstra wrote: > On Tue, Aug 29, 2017 at 07:16:31PM +, Rogozhkin, Dmitry V wrote: > > > Pretty strict, people tend to get fairly upset every time we leak stuff. > > > In fact Debian and Android carry a perf_event_paranoid patch that > > > default disabl

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] igt: Remove Android support

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [1/2] igt: Remove Android support URL : https://patchwork.freedesktop.org/series/30276/ State : success == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252 +1 fdo#102252 https://b

[Intel-gfx] ✓ Fi.CI.IGT: success for i915 PMU and engine busy stats (rev7)

2017-09-13 Thread Patchwork
== Series Details == Series: i915 PMU and engine busy stats (rev7) URL : https://patchwork.freedesktop.org/series/27488/ State : success == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 Test kms_setmode: Subgroup basic:

Re: [Intel-gfx] [PATCH 5/9] drm/i915/dp: Remove intel_dp->is_mst check in intel_dp_check_mst_status

2017-09-13 Thread Pandiyan, Dhinakaran
On Wed, 2017-09-13 at 16:31 +0300, Ville Syrjälä wrote: > On Tue, Sep 12, 2017 at 04:57:26PM -0700, Dhinakaran Pandiyan wrote: > > There is just only one caller now, which already checks for > > intel_dp->is_mst. So, remove this and fix some braces while at it. > > Hmm. So this depends on the subt

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mst: Use MST sideband message transactions for dpms control

2017-09-13 Thread Patchwork
== Series Details == Series: drm/i915/mst: Use MST sideband message transactions for dpms control URL : https://patchwork.freedesktop.org/series/30314/ State : success == Summary == Series 30314v1 drm/i915/mst: Use MST sideband message transactions for dpms control https://patchwork.freedeskt

Re: [Intel-gfx] [PATCH 4/9] drm/i915/dp: Avoid more dpcd transactions after resume failure

2017-09-13 Thread Pandiyan, Dhinakaran
On Wed, 2017-09-13 at 16:24 +0300, Ville Syrjälä wrote: > On Tue, Sep 12, 2017 at 04:57:25PM -0700, Dhinakaran Pandiyan wrote: > > drm_dp_mst_topology_mgr_resume() fails if there are dpcd failures, so > > there's no need to try that again in _check_mst_status() > > That commit message somehow does

Re: [Intel-gfx] [PATCH 5/9] drm/i915/dp: Remove intel_dp->is_mst check in intel_dp_check_mst_status

2017-09-13 Thread Pandiyan, Dhinakaran
On Wed, 2017-09-13 at 12:32 +0300, Jani Nikula wrote: > On Tue, 12 Sep 2017, Dhinakaran Pandiyan > wrote: > > There is just only one caller now, which already checks for > > intel_dp->is_mst. So, remove this and fix some braces while at it. > > > > Signed-off-by: Dhinakaran Pandiyan > > --- >

[Intel-gfx] [PATCH v2] drm/i915/mst: Use MST sideband message transactions for dpms control

2017-09-13 Thread Dhinakaran Pandiyan
Use the POWER_DOWN_PHY and POWER_UP_PHY sideband message transactions to set power states for downstream sinks. Apart from giving us the ability to set power state for individual sinks, this fixes the below test for me. $ xrandr --display :0 --output DP-2-2-8 --off $ xrandr --display :0 --output D

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] igt/gem_eio: inflight wedged requires long plugging

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] igt/gem_eio: inflight wedged requires long plugging URL : https://patchwork.freedesktop.org/series/30275/ State : failure == Summary == Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#1022

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915: Trim gen8_irq_handler

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Trim gen8_irq_handler URL : https://patchwork.freedesktop.org/series/30311/ State : warning == Summary == Series 30311v1 series starting with [1/3] drm/i915: Trim gen8_irq_handler https://patchwork.freedesktop.org/api/1.0/series

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK URL : https://patchwork.freedesktop.org/series/30291/ State : success == Summary == Test kms_plane: Subgroup plane-panning-bottom-right-suspend-pipe-C-planes: skip -> PAS

[Intel-gfx] [PATCH 3/3] drm/i915: Skip pipestats for GT operations in chv/vlv irq handler

2017-09-13 Thread Chris Wilson
When handling context-switch interrupts, we are very latency sensitive; every unnecessary mmio (uncached) read contributes toward a large decrease in request throughput. An example is gem_exec_whisper, which ping-pongs between the engines, where avoiding the pipe underflow checking reduces the runt

[Intel-gfx] [PATCH 1/3] drm/i915: Trim gen8_irq_handler

2017-09-13 Thread Chris Wilson
The goal here is to trim an excess posting read and keep the predicates tight (reusing the same predicate throughout for GT ack/handling). add/remove: 0/0 grow/shrink: 2/1 up/down: 26/-30 (-4) function old new delta gen8_gt_irq_handler

[Intel-gfx] [PATCH 2/3] drm/i915: Remove the extraneous irqreturn_t from gen8 sub handlers

2017-09-13 Thread Chris Wilson
We know whether or not the irq was intended for us by simpling inspecting the GEN8_MASTER_IRQ. If that wasn't signaled, the irq was spurious and that is when, and only when, we should report to the core that we didn't handle the irq. add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-52 (-52) function

Re: [Intel-gfx] [PATCH v16 1/4] drm/i915: Introduce private PAT management

2017-09-13 Thread Wang, Zhi A
Sorry. :) Too much stuffs comes together... -Original Message- From: Joonas Lahtinen [mailto:joonas.lahti...@linux.intel.com] Sent: Wednesday, September 13, 2017 3:07 PM To: Wang, Zhi A ; intel-gfx@lists.freedesktop.org; intel-gvt-...@lists.freedesktop.org Cc: ch...@chris-wilson.co.uk; z

Re: [Intel-gfx] [PATCH v10 5/5] drm/i915/selftests: Introduce live tests of private PAT management

2017-09-13 Thread kbuild test robot
Hi Zhi, [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20170913] [cannot apply to v4.13] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Zhi-Wang/drm-i915

Re: [Intel-gfx] [PATCH] drm/i915: Enable scanline read for gen9 dsi

2017-09-13 Thread Ville Syrjälä
On Wed, Sep 13, 2017 at 08:24:38AM +, Shankar, Uma wrote: > > > >-Original Message- > >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > >Sent: Tuesday, September 12, 2017 8:36 PM > >To: Shankar, Uma > >Cc: intel-gfx@lists.freedesktop.org; Srinivas, Vidya > > > >Subject:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Squelch smatch warning for statement with no effect

2017-09-13 Thread Patchwork
== Series Details == Series: drm/i915: Squelch smatch warning for statement with no effect URL : https://patchwork.freedesktop.org/series/30280/ State : success == Summary == Test kms_plane: Subgroup plane-panning-bottom-right-suspend-pipe-C-planes: skip -> PASS

Re: [Intel-gfx] [PATCH 6/6] drm/i915/execlists: Read the context-status HEAD from the HWSP

2017-09-13 Thread Chris Wilson
Quoting Mika Kuoppala (2017-09-13 15:12:42) > Chris Wilson writes: > > > The engine also provides a mirror of the CSB write pointer in the HWSP, > > but not of our read pointer. To take advantage of this we need to > > remember where we read up to on the last interrupt and continue off from > > t

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Shrink active_crtcs and active_pipes_changed to u8

2017-09-13 Thread Ville Syrjälä
On Wed, Sep 13, 2017 at 03:49:10PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2017-09-13 15:08:59) > > From: Ville Syrjälä > > > > We only have three pipes, so 8 bits is more than sufficient to track > > which is active. Also start using BIT() when populating them. > > > > Signed-off-by

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/gem_linear_blits: Compute GTT size using 4G limit (rev2)

2017-09-13 Thread Patchwork
== Series Details == Series: igt/gem_linear_blits: Compute GTT size using 4G limit (rev2) URL : https://patchwork.freedesktop.org/series/30216/ State : success == Summary == Test kms_plane: Subgroup plane-panning-bottom-right-suspend-pipe-C-planes: skip -> PASS

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Unset legacy_cursor_update early in intel_atomic_commit

2017-09-13 Thread Patchwork
== Series Details == Series: drm/i915: Unset legacy_cursor_update early in intel_atomic_commit URL : https://patchwork.freedesktop.org/series/30273/ State : success == Summary == Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#102252 Test gem_eio:

Re: [Intel-gfx] [PATCH 0/8] drm/fb-helper: Use drm_file to get a dumb framebuffer

2017-09-13 Thread Noralf Trønnes
Den 13.09.2017 07.09, skrev Laurent Pinchart: Hi Noralf, Thank you for the patches. On Monday, 11 September 2017 17:31:54 EEST Noralf Trønnes wrote: Hi, I want to start out by saying that this patchset is low priority for me and if no one has interest or time to review this, that is just fin

Re: [Intel-gfx] [PATCH 3/8] drm/i915: Eliminate crtc->config from VLV/CHV DPLL functions

2017-09-13 Thread Ville Syrjälä
On Wed, Sep 13, 2017 at 03:40:40PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2017-09-13 15:08:55) > > From: Ville Syrjälä > > > > Use the passed in crtc state rather than crtc->config when configuring > > the DPLL on VLV/CHV. > > > > Signed-off-by: Ville Syrjälä > > --- > > drivers/g

Re: [Intel-gfx] [PATCH 4/8] drm/i915: Pass crtc state to i9xx_enable_pll()

2017-09-13 Thread Ville Syrjälä
On Wed, Sep 13, 2017 at 03:41:46PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2017-09-13 15:08:56) > > From: Ville Syrjälä > > > > Pass the crtc state to i9xx_enable_pll() and use it rather than > > crtc->config. > > > > Signed-off-by: Ville Syrjälä > Reviewed-by: Chris Wilson > > (m

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/prime_busy: Declare the hang tests expect to cause GPU hangs

2017-09-13 Thread Patchwork
== Series Details == Series: igt/prime_busy: Declare the hang tests expect to cause GPU hangs URL : https://patchwork.freedesktop.org/series/30290/ State : success == Summary == IGT patchset tested on top of latest successful build c718ba805208e55d675defe9b2a66852e2ae038c lib/igt_kmod: Allow s

[Intel-gfx] ✓ Fi.CI.BAT: success for IGT Testcases for i915 DAPC feature (rev2)

2017-09-13 Thread Patchwork
== Series Details == Series: IGT Testcases for i915 DAPC feature (rev2) URL : https://patchwork.freedesktop.org/series/29940/ State : success == Summary == IGT patchset tested on top of latest successful build c718ba805208e55d675defe9b2a66852e2ae038c lib/igt_kmod: Allow specifying libkmod con

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Eliminate crtc->state usage from DVO pipe tracking

2017-09-13 Thread Chris Wilson
Quoting Ville Syrjala (2017-09-13 15:09:00) > From: Ville Syrjälä > > Change the DVO pipe tracking to maintain a bitmask in the top level > state, just as we do for active_crtcs. This gets rid of the ugly > intel_num_dvo_pipes() and its crtc->state and crtc->config usage. > > Signed-off-by: Vill

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Shrink active_crtcs and active_pipes_changed to u8

2017-09-13 Thread Chris Wilson
Quoting Ville Syrjala (2017-09-13 15:08:59) > From: Ville Syrjälä > > We only have three pipes, so 8 bits is more than sufficient to track > which is active. Also start using BIT() when populating them. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/i915_drv.h | 2 +- > dr

Re: [Intel-gfx] [PATCH 5/8] drm/i915: Nuke the bogus kernel doc for i9xx_disable_pll()

2017-09-13 Thread Chris Wilson
Quoting Ville Syrjala (2017-09-13 15:08:57) > From: Ville Syrjälä > > Signed-off-by: Ville Syrjälä Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 4/8] drm/i915: Pass crtc state to i9xx_enable_pll()

2017-09-13 Thread Chris Wilson
Quoting Ville Syrjala (2017-09-13 15:08:56) > From: Ville Syrjälä > > Pass the crtc state to i9xx_enable_pll() and use it rather than > crtc->config. > > Signed-off-by: Ville Syrjälä Reviewed-by: Chris Wilson (mutters something about consistency in crtc_state vs pipe_config) -Chris __

Re: [Intel-gfx] [PATCH 3/8] drm/i915: Eliminate crtc->config from VLV/CHV DPLL functions

2017-09-13 Thread Chris Wilson
Quoting Ville Syrjala (2017-09-13 15:08:55) > From: Ville Syrjälä > > Use the passed in crtc state rather than crtc->config when configuring > the DPLL on VLV/CHV. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/intel_display.c | 14 +++--- > 1 file changed, 7 insertions(

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Some DPLL crtc->state/config cleanups etc.

2017-09-13 Thread Patchwork
== Series Details == Series: drm/i915: Some DPLL crtc->state/config cleanups etc. URL : https://patchwork.freedesktop.org/series/30300/ State : success == Summary == Series 30300v1 drm/i915: Some DPLL crtc->state/config cleanups etc. https://patchwork.freedesktop.org/api/1.0/series/30300/revis

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Parametrize CBR_DPLLBMD_PIPE defines

2017-09-13 Thread Chris Wilson
Quoting Ville Syrjala (2017-09-13 15:08:54) > From: Ville Syrjälä > > Apply a bit of polish by parametrizing the CBR_DPLLBMD_PIPE defines. > > Signed-off-by: Ville Syrjälä Reviewed-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +-- > drivers/gpu/drm/i915/intel_display.c |

Re: [Intel-gfx] [PATCH] drm/i915: Clear local engine-needs-reset bit if in progress elsewhere

2017-09-13 Thread Jeff McGee
On Wed, Sep 06, 2017 at 10:57:20PM +0100, Chris Wilson wrote: > Quoting Jeff McGee (2017-08-29 18:01:47) > > On Tue, Aug 29, 2017 at 04:17:46PM +0100, Chris Wilson wrote: > > > Quoting Jeff McGee (2017-08-29 16:04:17) > > > > On Tue, Aug 29, 2017 at 10:07:18AM +0100, Chris Wilson wrote: > > > > > Q

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Stop ring before doing readiness check

2017-09-13 Thread Patchwork
== Series Details == Series: drm/i915: Stop ring before doing readiness check URL : https://patchwork.freedesktop.org/series/30298/ State : success == Summary == Series 30298v1 drm/i915: Stop ring before doing readiness check https://patchwork.freedesktop.org/api/1.0/series/30298/revisions/1/m

Re: [Intel-gfx] [PATCH] drm/i915: Stop ring before doing readiness check

2017-09-13 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2017-09-13 15:01:17) >> Evidence indicates that even if the hardware happily >> tells us to proceed with reset, it really isn't ready. >> Resetting a freely running batchbuffer after we have >> got ack for readiness, still can cause a system hang. > >

Re: [Intel-gfx] [PATCH 6/6] drm/i915/execlists: Read the context-status HEAD from the HWSP

2017-09-13 Thread Mika Kuoppala
Chris Wilson writes: > The engine also provides a mirror of the CSB write pointer in the HWSP, > but not of our read pointer. To take advantage of this we need to > remember where we read up to on the last interrupt and continue off from > there. This poses a problem following a reset, as we don'

Re: [Intel-gfx] [PATCH] drm/i915: Stop ring before doing readiness check

2017-09-13 Thread Ville Syrjälä
On Wed, Sep 13, 2017 at 03:08:06PM +0100, Chris Wilson wrote: > Quoting Mika Kuoppala (2017-09-13 15:01:17) > > Evidence indicates that even if the hardware happily > > tells us to proceed with reset, it really isn't ready. > > Resetting a freely running batchbuffer after we have > > got ack for re

[Intel-gfx] [PATCH 1/8] drm/i915: Set output_types to EDP for vlv/chv DPLL forcing

2017-09-13 Thread Ville Syrjala
From: Ville Syrjälä When we enable the DPLL for the PPS kick, let's tell the DPLL code we're dealing with an eDP output. This shouldn't really matter, but it's more consistent with the way the DPLL is configured when we're actually enabling the eDP port for real. Signed-off-by: Ville Syrjälä --

[Intel-gfx] [PATCH 5/8] drm/i915: Nuke the bogus kernel doc for i9xx_disable_pll()

2017-09-13 Thread Ville Syrjala
From: Ville Syrjälä Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 9 - 1 file changed, 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 140649f5b018..262f871c0fae 100644 --- a/drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH 6/8] drm/i915: Add for_each_oldnew_intel_crtc_in_state()

2017-09-13 Thread Ville Syrjala
From: Ville Syrjälä Add for_each_oldnew_intel_crtc_in_state() and use it in intel_modeset_checks() to let is play with the intel_ types rather than the drm_ types. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h | 8 drivers/gpu/drm/i915/intel_display.c | 12 +++

[Intel-gfx] [PATCH 7/8] drm/i915: Shrink active_crtcs and active_pipes_changed to u8

2017-09-13 Thread Ville Syrjala
From: Ville Syrjälä We only have three pipes, so 8 bits is more than sufficient to track which is active. Also start using BIT() when populating them. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_display.c | 10 +- drivers/gp

[Intel-gfx] [PATCH 8/8] drm/i915: Eliminate crtc->state usage from DVO pipe tracking

2017-09-13 Thread Ville Syrjala
From: Ville Syrjälä Change the DVO pipe tracking to maintain a bitmask in the top level state, just as we do for active_crtcs. This gets rid of the ugly intel_num_dvo_pipes() and its crtc->state and crtc->config usage. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h | 2

[Intel-gfx] [PATCH 3/8] drm/i915: Eliminate crtc->config from VLV/CHV DPLL functions

2017-09-13 Thread Ville Syrjala
From: Ville Syrjälä Use the passed in crtc state rather than crtc->config when configuring the DPLL on VLV/CHV. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_di

[Intel-gfx] [PATCH 2/8] drm/i915: Parametrize CBR_DPLLBMD_PIPE defines

2017-09-13 Thread Ville Syrjala
From: Ville Syrjälä Apply a bit of polish by parametrizing the CBR_DPLLBMD_PIPE defines. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_reg.h | 3 +-- drivers/gpu/drm/i915/intel_display.c | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i9

[Intel-gfx] [PATCH 4/8] drm/i915: Pass crtc state to i9xx_enable_pll()

2017-09-13 Thread Ville Syrjala
From: Ville Syrjälä Pass the crtc state to i9xx_enable_pll() and use it rather than crtc->config. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/g

[Intel-gfx] [PATCH 0/8] drm/i915: Some DPLL crtc->state/config cleanups etc.

2017-09-13 Thread Ville Syrjala
From: Ville Syrjälä This series nukes some crtc->config and crtc->state uses from the DPLL code. And I tossed in a few other random DPLL things I had lying around. Ville Syrjälä (8): drm/i915: Set output_types to EDP for vlv/chv DPLL forcing drm/i915: Parametrize CBR_DPLLBMD_PIPE defines d

Re: [Intel-gfx] [PATCH] drm/i915: Stop ring before doing readiness check

2017-09-13 Thread Chris Wilson
Quoting Mika Kuoppala (2017-09-13 15:01:17) > Evidence indicates that even if the hardware happily > tells us to proceed with reset, it really isn't ready. > Resetting a freely running batchbuffer after we have > got ack for readiness, still can cause a system hang. Hmm, so we see it on early gen

Re: [Intel-gfx] [PATCH v7] drm/i915/execlists: Read the context-status buffer from the HWSP

2017-09-13 Thread Mika Kuoppala
Chris Wilson writes: > The engine provides a mirror of the CSB in the HWSP. If we use the > cacheable reads from the HWSP, we can shave off a few mmio reads per > context-switch interrupt (which are quite frequent!). Just removing a > couple of mmio is not enough to actually reduce any latency, b

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/lrc: Clarify the format of the context image (rev2)

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915/lrc: Clarify the format of the context image (rev2) URL : https://patchwork.freedesktop.org/series/30269/ State : success == Summary == Series 30269v2 series starting with [1/6] drm/i915/lrc: Clarify the format of the context i

Re: [Intel-gfx] [PATCH] drm/i915: Unset legacy_cursor_update early in intel_atomic_commit

2017-09-13 Thread Ville Syrjälä
On Wed, Sep 13, 2017 at 11:25:54AM +0200, Maarten Lankhorst wrote: > Commit b44d5c0c105a ("drm/i915: Always wait for flip_done, v2.") removed > the call to wait_for_vblanks and replaced it with flip_done. > > Unfortunately legacy_cursor_update was unset too late, and the > replacement call drm_ato

[Intel-gfx] [PATCH] drm/i915: Stop ring before doing readiness check

2017-09-13 Thread Mika Kuoppala
Evidence indicates that even if the hardware happily tells us to proceed with reset, it really isn't ready. Resetting a freely running batchbuffer after we have got ack for readiness, still can cause a system hang. Attempt to stop ring before proceeding for ready check and reset to avoid losing th

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mst: Use MST sideband message transaction for dpms

2017-09-13 Thread Ville Syrjälä
On Wed, Sep 13, 2017 at 01:55:34PM +0200, Maarten Lankhorst wrote: > Op 13-09-17 om 13:48 schreef Ville Syrjälä: > > On Wed, Sep 13, 2017 at 12:46:47PM +0200, Maarten Lankhorst wrote: > >> Op 13-09-17 om 12:37 schreef Ville Syrjälä: > >>> On Wed, Sep 13, 2017 at 09:32:40AM +0200, Maarten Lankhorst

Re: [Intel-gfx] [PATCH 5/6] drm/i915/execlists: Read the context-status buffer from the HWSP

2017-09-13 Thread Mika Kuoppala
Chris Wilson writes: > The engine provides a mirror of the CSB in the HWSP. If we use the > cacheable reads from the HWSP, we can shave off a few mmio reads per > context-switch interrupt (which are quite frequent!). Just removing a > couple of mmio is not enough to actually reduce any latency, b

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result

2017-09-13 Thread Chris Wilson
Quoting Patchwork (2017-09-13 12:22:43) > == Series Details == > > Series: series starting with [1/2] drm/i915: Use mul_u32_u32() for 32b x 32b > -> 64b result > URL : https://patchwork.freedesktop.org/series/30279/ > State : failure > > == Summary == > > Series 30279v1 series starting with [

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] igt: Remove Android support

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [1/2] igt: Remove Android support URL : https://patchwork.freedesktop.org/series/30276/ State : success == Summary == IGT patchset tested on top of latest successful build c718ba805208e55d675defe9b2a66852e2ae038c lib/igt_kmod: Allow specifying

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/6] drm/i915/lrc: Clarify the format of the context image

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [1/6] drm/i915/lrc: Clarify the format of the context image URL : https://patchwork.freedesktop.org/series/30269/ State : success == Summary == Test kms_flip: Subgroup wf_vblank-vs-modeset: dmesg-warn -> PASS (sha

[Intel-gfx] [PATCH v7] drm/i915/execlists: Read the context-status buffer from the HWSP

2017-09-13 Thread Chris Wilson
The engine provides a mirror of the CSB in the HWSP. If we use the cacheable reads from the HWSP, we can shave off a few mmio reads per context-switch interrupt (which are quite frequent!). Just removing a couple of mmio is not enough to actually reduce any latency, but a small reduction in overall

Re: [Intel-gfx] [PATCH 5/9] drm/i915/dp: Remove intel_dp->is_mst check in intel_dp_check_mst_status

2017-09-13 Thread Ville Syrjälä
On Tue, Sep 12, 2017 at 04:57:26PM -0700, Dhinakaran Pandiyan wrote: > There is just only one caller now, which already checks for > intel_dp->is_mst. So, remove this and fix some braces while at it. Hmm. So this depends on the subtle detail that drm_dp_mst_topology_mgr_resume() will "fail" if did

[Intel-gfx] ✓ Fi.CI.BAT: success for i915 PMU and engine busy stats (rev7)

2017-09-13 Thread Patchwork
== Series Details == Series: i915 PMU and engine busy stats (rev7) URL : https://patchwork.freedesktop.org/series/27488/ State : success == Summary == Series 27488v7 i915 PMU and engine busy stats https://patchwork.freedesktop.org/api/1.0/series/27488/revisions/7/mbox/ Test chamelium:

Re: [Intel-gfx] [PATCH 4/9] drm/i915/dp: Avoid more dpcd transactions after resume failure

2017-09-13 Thread Ville Syrjälä
On Tue, Sep 12, 2017 at 04:57:25PM -0700, Dhinakaran Pandiyan wrote: > drm_dp_mst_topology_mgr_resume() fails if there are dpcd failures, so > there's no need to try that again in _check_mst_status() That commit message somehow doesn't seem to match this patch. You're not removing anything from _c

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Squelch smatch warning for statement with no effect

2017-09-13 Thread Chris Wilson
Quoting Patchwork (2017-09-13 12:39:46) > == Series Details == > > Series: drm/i915: Squelch smatch warning for statement with no effect > URL : https://patchwork.freedesktop.org/series/30280/ > State : success > > == Summary == > > Series 30280v1 drm/i915: Squelch smatch warning for statement

Re: [Intel-gfx] [PATCH i-g-t] lib/igt_kmod: Allow specifying libkmod config via environment variables

2017-09-13 Thread Joonas Lahtinen
On Wed, 2017-09-13 at 11:37 +0100, Chris Wilson wrote: > Quoting Chris Wilson (2017-09-12 16:51:40) > > Quoting Joonas Lahtinen (2017-09-12 16:44:10) > > > Allow specifying the kernel module configuration via environment > > > variables. This allows enumerating the subtests of the kselftest > > > w

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v16,1/4] drm/i915: Introduce private PAT management

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [v16,1/4] drm/i915: Introduce private PAT management URL : https://patchwork.freedesktop.org/series/30264/ State : success == Summary == Test prime_self_import: Subgroup reimport-vs-gem_close-race: fail -> PASS

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] igt/gem_eio: inflight wedged requires long plugging

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] igt/gem_eio: inflight wedged requires long plugging URL : https://patchwork.freedesktop.org/series/30275/ State : success == Summary == IGT patchset tested on top of latest successful build b6ea8b204c8a18af7098326522e8acaffb19dd7a tes

[Intel-gfx] [RFC v3 11/11] drm/i915: Gate engine stats collection with a static key

2017-09-13 Thread Tvrtko Ursulin
From: Tvrtko Ursulin This reduces the cost of the software engine busyness tracking to a single no-op instruction when there are no listeners. v2: Rebase and some comments. v3: Rebase. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_pmu.c | 54 +++-- dr

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK URL : https://patchwork.freedesktop.org/series/30291/ State : success == Summary == Series 30291v1 series starting with [v7,1/2] drm/i915: Introduce INTEL_GEN_MASK https://patchwork.freedesktop.org/ap

Re: [Intel-gfx] [PATCH v16 1/4] drm/i915: Introduce private PAT management

2017-09-13 Thread Joonas Lahtinen
On Wed, 2017-09-13 at 16:44 +0800, Zhi Wang wrote: > The private PAT management is to support PPAT entry manipulation. Two > APIs are introduced for dynamically managing PPAT entries: intel_ppat_get > and intel_ppat_put. > > intel_ppat_get will search for an existing PPAT entry which perfectly > m

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915/guc: Remove obsolete comments and remove unused variable

2017-09-13 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/guc: Remove obsolete comments and remove unused variable URL : https://patchwork.freedesktop.org/series/30282/ State : failure == Summary == Series 30282v1 series starting with [1/4] drm/i915/guc: Remove obsolete comments and r

Re: [Intel-gfx] [PATCH 2/2] drm/i915/mst: Use MST sideband message transaction for dpms

2017-09-13 Thread Maarten Lankhorst
Op 13-09-17 om 13:48 schreef Ville Syrjälä: > On Wed, Sep 13, 2017 at 12:46:47PM +0200, Maarten Lankhorst wrote: >> Op 13-09-17 om 12:37 schreef Ville Syrjälä: >>> On Wed, Sep 13, 2017 at 09:32:40AM +0200, Maarten Lankhorst wrote: Op 12-09-17 om 22:11 schreef Pandiyan, Dhinakaran: > On Tue

[Intel-gfx] [PATCH v7 2/2] drm/i915: Simplify i915_reg_read_ioctl

2017-09-13 Thread Joonas Lahtinen
Convert to use the freshly available made INTEL_GEN_MASK for easier grepping and improve function readability and clarify the UABI documentation. No functional changes. v2: - Lift GEM_BUG_ONs and use is_power_of_2 (Chris) - Retain -EINVAL on bad flags behavior (Chris) v3: - Extract flags with 'e

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