On 03/01/2017 04:37 AM, Joonas Lahtinen wrote:
On pe, 2017-02-24 at 06:01 -0800, Oscar Mateo wrote:
When initializing the GuC log struct, there is an object we need to
allocate always, since the GuC needs its address at fw load time.
The rest are "extras", in the sense that we only need them i
On 03/02/2017 02:41 AM, Joonas Lahtinen wrote:
On pe, 2017-02-24 at 06:01 -0800, Oscar Mateo wrote:
The GuC descriptor is big in size. If we use a local definition of
guc_desc we have a chance to overflow stack, so avoid it.
Also, Chris abhors scatterlists :)
v2: Rebased, helper function to re
You are totally right. I'll update the patch and include it together
with all the other GuC patches (less probability of it getting lost in
the depths of the mailing list that way).
Thanks!
On 03/01/2017 10:33 AM, Michal Wajdeczko wrote:
On Tue, Feb 07, 2017 at 01:20:35AM -0800, Oscar Mateo wr
On Fri, 2017-03-03 at 14:23 +0200, Ander Conselvan De Oliveira wrote:
> On Tue, 2017-02-28 at 18:57 -0800, Dhinakaran Pandiyan wrote:
> > According to BSpec, "The CD clock frequency must be at least twice the
> > frequency of the Azalia BCLK." and BCLK is configured to 96 MHz by
> > default. BXT an
On Fri, 2017-03-03 at 14:55 -0300, Paulo Zanoni wrote:
> Em Ter, 2017-02-28 às 18:57 -0800, Dhinakaran Pandiyan escreveu:
> > Implement GLK cdclk restriction for DP audio, similar to what's
> > implemented
> > for BDW and other GEN9 platforms. The cdclk restriction has been
> > refactored out of ma
== Series Details ==
Series: drm/i915: Wake up all waiters before idling
URL : https://patchwork.freedesktop.org/series/20653/
State : success
== Summary ==
Series 20653v1 drm/i915: Wake up all waiters before idling
https://patchwork.freedesktop.org/api/1.0/series/20653/revisions/1/mbox/
Test
== Series Details ==
Series: drm/i915: Avoid clearing the base drm_crtc_state
URL : https://patchwork.freedesktop.org/series/20635/
State : success
== Summary ==
Series 20635v1 drm/i915: Avoid clearing the base drm_crtc_state
https://patchwork.freedesktop.org/api/1.0/series/20635/revisions/1/m
When we idle, we wakeup the first waiter (checking to see if it missed
an earlier wakeup) and disarm the breadcrumbs. However, we now assert
that there are no waiter when the interrupt is disabled, triggering an
assert if there were multiple waiters when we idled.
[ 420.842275] invalid opcode: 00
== Series Details ==
Series: drm/i915: Split breadcrumbs spinlock into two
URL : https://patchwork.freedesktop.org/series/20649/
State : success
== Summary ==
Series 20649v1 drm/i915: Split breadcrumbs spinlock into two
https://patchwork.freedesktop.org/api/1.0/series/20649/revisions/1/mbox/
On Fri, Mar 03, 2017 at 04:47:28PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Enable atomic for VLV/CHV
> URL : https://patchwork.freedesktop.org/series/20634/
> State : failure
>
> == Summary ==
>
> Series 20634v1 drm/i915: Enable atomic for VLV/CHV
> https://patchwo
As we now take the breadcrumbs spinlock within the interrupt handler, we
wish to minimise its hold time. During the interrupt we do not care
about the state of the full rbtree, only that of the first element, so
we can guard that with a separate lock.
v2: Rename first_wait to irq_wait to make it c
== Series Details ==
Series: series starting with [1/2] drm/i915: use correct node for handling
cache domain eviction
URL : https://patchwork.freedesktop.org/series/20646/
State : success
== Summary ==
Series 20646v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series
On Fri, Mar 03, 2017 at 06:23:01PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Refactor wakeup of the next breadcrumb waiter
> URL : https://patchwork.freedesktop.org/series/20642/
> State : failure
>
> == Summary ==
>
> Series 20642v1 drm/i915: Refactor wakeup of the
On Fri, Mar 03, 2017 at 06:03:35PM +, Matthew Auld wrote:
> Signed-off-by: Matthew Auld
> ---
> drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 80
> +
> 1 file changed, 80 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
> b/drivers/
== Series Details ==
Series: drm/i915: Refactor wakeup of the next breadcrumb waiter
URL : https://patchwork.freedesktop.org/series/20642/
State : failure
== Summary ==
Series 20642v1 drm/i915: Refactor wakeup of the next breadcrumb waiter
https://patchwork.freedesktop.org/api/1.0/series/20642
On Fri, Mar 03, 2017 at 06:03:34PM +, Matthew Auld wrote:
> It looks like we were incorrectly comparing vma->node against itself
> instead of the target node, when evicting for a node on systems where we
> need guard pages between regions with different cache domains. As a
> consequence we can
On Fri, Mar 03, 2017 at 07:57:24PM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > As we now check if the seqno is complete in order to signal the fence,
> > we can also decide not to wake up the first_waiter until it is ready
> > (since it is waiting on the same seqno). The only caveat
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 80 +
1 file changed, 80 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
index 97af353db218..e92c235d0200 100644
It looks like we were incorrectly comparing vma->node against itself
instead of the target node, when evicting for a node on systems where we
need guard pages between regions with different cache domains. As a
consequence we can end up trying to needlessly evict neighbouring nodes,
even if they hav
Chris Wilson writes:
> As we now check if the seqno is complete in order to signal the fence,
> we can also decide not to wake up the first_waiter until it is ready
> (since it is waiting on the same seqno). The only caveat is that if we
> need the engine->irq_seqno_barrier to enforce some cohere
Em Ter, 2017-02-28 às 18:57 -0800, Dhinakaran Pandiyan escreveu:
> Implement GLK cdclk restriction for DP audio, similar to what's
> implemented
> for BDW and other GEN9 platforms. The cdclk restriction has been
> refactored out of max. pixel clock computation as the 1:1
> relationship
> between pi
Chris Wilson writes:
> On Fri, Mar 03, 2017 at 07:26:34PM +0200, Mika Kuoppala wrote:
>> Chris Wilson writes:
>> > @@ -768,7 +776,7 @@ void intel_engine_reset_breadcrumbs(struct
>> > intel_engine_cs *engine)
>> >struct intel_breadcrumbs *b = &engine->breadcrumbs;
>> >
>> >cancel_fake_
On Fri, Mar 03, 2017 at 07:26:34PM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
> > @@ -768,7 +776,7 @@ void intel_engine_reset_breadcrumbs(struct
> > intel_engine_cs *engine)
> > struct intel_breadcrumbs *b = &engine->breadcrumbs;
> >
> > cancel_fake_irq(engine);
> > - spin_loc
== Series Details ==
Series: HDMI 2.0: Scrambling in DRM layer (rev7)
URL : https://patchwork.freedesktop.org/series/19161/
State : failure
== Summary ==
drivers/gpu/drm/i915/intel_drv.h:741:1: error: expected identifier or ‘(’
before ‘}’ token
};
^
scripts/Makefile.build:294: recipe for ta
Chris Wilson writes:
> As we now take the breadcrumbs spinlock within the interrupt handler, we
> wish to minimise its hold time. During the interrupt we do not care
> about the state of the full rbtree, only that of the first element, so
> we can guard that with a separate lock.
>
> Signed-off-b
== Series Details ==
Series: drm/i915: Avoid clearing the base drm_crtc_state
URL : https://patchwork.freedesktop.org/series/20635/
State : failure
== Summary ==
Series 20635v1 drm/i915: Avoid clearing the base drm_crtc_state
https://patchwork.freedesktop.org/api/1.0/series/20635/revisions/1/m
Refactor the common task of updating the first_waiter, serialised with
the interrupt handler. When we update the first_waiter, we also need to
wakeup the new bottom-half in order to complete the actions that we may
have delegated to it (such as checking the irq-seqno coherency or waking
up other lo
== Series Details ==
Series: drm/i915: Enable atomic for VLV/CHV
URL : https://patchwork.freedesktop.org/series/20634/
State : failure
== Summary ==
Series 20634v1 drm/i915: Enable atomic for VLV/CHV
https://patchwork.freedesktop.org/api/1.0/series/20634/revisions/1/mbox/
Test drv_module_relo
From: Thierry Reding
This patch implements a small function that finds if a
given CEA db is hdmi-forum vendor specific data block
or not.
V2: Rebase.
V3: Added R-B from Jose.
V4: Rebase
V5: Rebase
V6: Rebase
V7: Rebase
Signed-off-by: Thierry Reding
Signed-off-by: Shashank Sharma
Reviewed-by:
HDMI 2.0 spec defines a method to reduce the RF footprint while
operating at higher pixel clocks, which is called Scrambling.
Scrambling can be controlled over a new set of I2C registers
which are accessible over existing DDC I2C lines, called SCDC
register set.
This patch series contains 6 patche
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used to save and indicate if sink
supports advanced HDMI 2.0 features
- Adds another structure drm_scdc within drm_hdmi_info, to
reflect scdc support and capabilities in connected HDM
Geminilake platform sports a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
mendates scrambling for these higher clocks, for reduced RF footprint.
This patch checks if the monitor supports scrambling, and if required,
enables it during the modeset.
V
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used to save and indicate if sink
supports advanced HDMI 2.0 features
- Adds another structure drm_scdc within drm_hdmi_info, to
reflect scdc support and capabilities in connected HDM
From: Thierry Reding
SCDC is a mechanism defined in the HDMI 2.0 specification that allows
the source and sink devices to communicate.
This commit introduces helpers to access the SCDC and provides the
symbolic names for the various registers defined in the specification.
V2: Rebase.
V3: Added
Geminilake has a native HDMI 2.0 controller, which is capable of
driving clocks upto 594Mhz. This patch updates the max tmds clock
limit for the same.
V2: rebase
V3: rebase
V4: added r-b from Ander
V5: rebase
V6: rebase
V7: rebase
Cc: Ander Conselvan De Oliveira
Signed-off-by: Shashank Sharma
R
Chris Wilson writes:
> Refactor the common task of updating the first_waiter, serialised with
> the interrupt handler. When we update the first_waiter, we also need to
> wakeup the new bottom-half in order to complete the actions that we may
> have delegated to it (such as checking the irq-seqno
Regards
Shashank
On 3/3/2017 6:31 PM, Ander Conselvan De Oliveira wrote:
On Fri, 2017-03-03 at 17:33 +0530, Sharma, Shashank wrote:
Thanks for the review Ander. My comments inline.
Shashank
On 3/3/2017 3:22 PM, Ander Conselvan De Oliveira wrote:
On Fri, 2017-03-03 at 11:59 +0530, Shashank
On Fri, Mar 03, 2017 at 03:47:51PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Take reference for signaling the request from hardirq
> URL : https://patchwork.freedesktop.org/series/20629/
> State : success
>
> == Summary ==
>
> Series 20629v1 drm/i915: Take reference
== Series Details ==
Series: drm/i915: Take reference for signaling the request from hardirq
URL : https://patchwork.freedesktop.org/series/20629/
State : success
== Summary ==
Series 20629v1 drm/i915: Take reference for signaling the request from hardirq
https://patchwork.freedesktop.org/api/
To prevent having to preserve the drm_crtc_state as we clear the
intel_crtc_state, only memset our extended state.
Fixes:
drivers/gpu/drm/i915/intel_display.c: In function ‘clear_intel_crtc_state’:
drivers/gpu/drm/i915/intel_display.c:11301:1: error: the frame size of 1056
bytes is larger than 10
From: Ville Syrjälä
With the watermarks properly handled everything should be in place
to make VLV/CHV nuclear. Just to be super safe I included a few
extra bits of polish to the cursor handling.
Ville Syrjälä (4):
drm/i915: Extract intel_wm_plane_visible()
drm/i915: Check for id==PLANE_CURS
On Fri, 03 Mar 2017, Imre Deak wrote:
> On Thu, Mar 02, 2017 at 08:27:28PM +, Vivi, Rodrigo wrote:
>> On Thu, 2017-03-02 at 21:20 +0200, Ville Syrjälä wrote:
>> > On Thu, Mar 02, 2017 at 11:15:29AM -0800, Rodrigo Vivi wrote:
>> > > +/* WaDisableDgMirrorFixInHalfSliceChicken5:bxt */
>>
Chris Wilson writes:
> Being inside a spinlock signaling that the hardware just completed a
> request doesn't prevent a second thread already spotting that the
> request is complete, freeing it and reallocating it! The code currently
> tries to prevent this using RCU -- but that only prevents the
From: Ville Syrjälä
The VLV/CHV watermark calculation is really interested in the hardware
plane type rather than the plane type (which is more of a software
concept). Let's check plane->id rather plane->type.
No functional changes.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_
From: Ville Syrjälä
VLV/CHV watermarks are now able to handle the radiation, so
mark these platforms as ready for atomic.
Cc: Maarten Lankhorst
Suggested-by: Maarten Lankhorst
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.c | 5 ++---
1 file changed, 2 insertions(+), 3 delet
From: Ville Syrjälä
VLV/CHV don't have double buffered watermarks so they need to consider
the cursor visibility as a special case just like ILK-BDW. Let's use
the helper we have for that.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
1 file changed, 2 insertions(+
From: Ville Syrjälä
All platforms that lack double buffered watermarks will need to
handle the legacy cursor updates in the same way. So let's extract the
logic to determine the plane visibility into a small helper. For
simplicity we'll make the function DTRT for any plane, but only apply
the spe
On Fri, Mar 03, 2017 at 05:00:50PM +0200, Mika Kuoppala wrote:
> Mika Kuoppala writes:
>
> > Chris Wilson writes:
> >
> >> Being inside a spinlock signaling that the hardware just completed a
> >> request doesn't prevent a second thread already spotting that the
> >> request is complete, freeing
On Fri, Mar 03, 2017 at 05:01:42AM -0800, Manasi Navare wrote:
> If during VBT parsing we find that the port is unused,
> the driver code just bails out without clearing the
> defaults for that port. This can cause failures down
> the path through link training for unused Port.
> This patch fixes t
Mika Kuoppala writes:
> Chris Wilson writes:
>
>> Being inside a spinlock signaling that the hardware just completed a
>> request doesn't prevent a second thread already spotting that the
>> request is complete, freeing it and reallocating it! The code currently
>> tries to prevent this using RC
Chris Wilson writes:
> Being inside a spinlock signaling that the hardware just completed a
> request doesn't prevent a second thread already spotting that the
> request is complete, freeing it and reallocating it! The code currently
> tries to prevent this using RCU -- but that only prevents the
On Fri, Mar 03, 2017 at 04:52:52PM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > Being inside a spinlock signaling that the hardware just completed a
> > request doesn't prevent a second thread already spotting that the
> > request is complete, freeing it and reallocating it! The code
On Fri, Mar 03, 2017 at 02:52:59PM +, Chris Wilson wrote:
> On Fri, Mar 03, 2017 at 02:45:57PM +, Chris Wilson wrote:
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 10 --
> > 1 file changed, 4 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> >
On Fri, Mar 03, 2017 at 02:45:57PM +, Chris Wilson wrote:
> ---
> drivers/gpu/drm/i915/i915_irq.c | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 5fa2c4c56b09..73ab5abf20d7 100644
> -
On Thu, Mar 02, 2017 at 07:14:58PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Check whether anything relevant has actually change when we compute new
> watermarks for each plane in the state. If the watermarks for no
> primary/sprite planes changed we don't have to reco
Patchwork writes:
> == Series Details ==
>
> Series: series starting with [1/5] drm/i915/gtt: Make I915_PDPES_PER_PDP
> inline function
> URL : https://patchwork.freedesktop.org/series/20405/
> State : warning
>
> == Summary ==
>
> Series 20405v1 Series without cover letter
> https://patchwork
== Series Details ==
Series: drm/i915: Clear the VBT defaults for unused ports
URL : https://patchwork.freedesktop.org/series/20619/
State : warning
== Summary ==
Series 20619v1 drm/i915: Clear the VBT defaults for unused ports
https://patchwork.freedesktop.org/api/1.0/series/20619/revisions/1
Being inside a spinlock signaling that the hardware just completed a
request doesn't prevent a second thread already spotting that the
request is complete, freeing it and reallocating it! The code currently
tries to prevent this using RCU -- but that only prevents the request
from being freed, it d
On Thu, Mar 02, 2017 at 08:01:40PM +0200, Mika Kuoppala wrote:
> We were passively acting on the high counter value bit
> and as it was never set, we were only utilizing the
> the 32bits of resolution. As the divisor with these platforms
> is quite high, the wrap around happened in the less than 13
On Fri, Mar 03, 2017 at 01:36:34PM +0100, Arkadiusz Hiler wrote:
> The file fits better.
>
> Additionally rename it to intel_uc_prepare_fw(), as the function does
> more than simple fetch.
>
> `obj` cleanup in the function is also fixed (i.e. removed). In the fail
> scenario it was always 'put' b
On Fri, Mar 03, 2017 at 12:17:08PM +, Chris Wilson wrote:
> Refactor the common task of updating the first_waiter, serialised with
> the interrupt handler. When we update the first_waiter, we also need to
> wakeup the new bottom-half in order to complete the actions that we may
> have delegated
== Series Details ==
Series: GuC Scrub vol. 1 (rev9)
URL : https://patchwork.freedesktop.org/series/16856/
State : failure
== Summary ==
CC [M] drivers/gpu/drm/i915/i915_vgpu.o
CC [M] drivers/gpu/drm/i915/gvt/gvt.o
CC [M] drivers/gpu/drm/i915/gvt/aperture_gm.o
CC [M] drivers/gpu/dr
Chris Wilson writes:
> On Fri, Mar 03, 2017 at 01:17:37PM -, Patchwork wrote:
>> == Series Details ==
>>
>> Series: series starting with [1/2] drm/i915: Ensure the engine is idle
>> before manually changing HWS
>> URL : https://patchwork.freedesktop.org/series/20617/
>> State : success
>>
On Thu, Mar 02, 2017 at 08:27:28PM +, Vivi, Rodrigo wrote:
> On Thu, 2017-03-02 at 21:20 +0200, Ville Syrjälä wrote:
> > On Thu, Mar 02, 2017 at 11:15:29AM -0800, Rodrigo Vivi wrote:
> > > No functional change. Just a proper organization of the gen9 workarounds.
> > >
> > > Cc: Imre Deak
> >
On Fri, Mar 03, 2017 at 01:17:37PM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915: Ensure the engine is idle before
> manually changing HWS
> URL : https://patchwork.freedesktop.org/series/20617/
> State : success
>
> == Summary ==
>
> Series 20
== Series Details ==
Series: series starting with [1/2] drm/i915: Ensure the engine is idle before
manually changing HWS
URL : https://patchwork.freedesktop.org/series/20617/
State : success
== Summary ==
Series 20617v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/ser
On Tue, 2017-02-28 at 06:25 +, Yang, Rong R wrote:
> We suggest GLK could disable pooled EUs for 2x6 configurations too.
This patch does that. I tried to say that in the commit message but now that I
re-read I see it doesn't really say it.
> As I understand, 2x6 a pool must consist of a compl
On Fri, 2017-03-03 at 17:33 +0530, Sharma, Shashank wrote:
> Thanks for the review Ander. My comments inline.
>
> Shashank
>
> On 3/3/2017 3:22 PM, Ander Conselvan De Oliveira wrote:
> > On Fri, 2017-03-03 at 11:59 +0530, Shashank Sharma wrote:
> > > Geminilake platform sports a native HDMI 2.0 c
If during VBT parsing we find that the port is unused,
the driver code just bails out without clearing the
defaults for that port. This can cause failures down
the path through link training for unused Port.
This patch fixes this issue by clearing the defaults
before bailing out from the VBT parsin
Chris Wilson writes:
> The code to check for execlists completion is generic, so move it to
> intel_engine_cs.c
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_gem.c | 8 +++
> drivers/gpu/drm/i915/intel_engine_cs.c
== Series Details ==
Series: series starting with [v2,1/3] drm/i915: Refactor wakeup of the next
breadcrumb waiter
URL : https://patchwork.freedesktop.org/series/20616/
State : success
== Summary ==
Series 20616v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/20
From: Marius Vlad
v2: - Make test work >= GEN8.
- Skip audio injection for now.
Signed-off-by: Marius Vlad
Signed-off-by: Abdiel Janulgue
---
tests/Makefile.sources | 1 +
tests/kms_hdmi_inject.c | 140
2 files changed, 141 insertions(+)
From: Marius Vlad
v2: Skip audio injection for now
Signed-off-by: Marius Vlad
Signed-off-by: Abdiel Janulgue
---
lib/igt_kms.c | 85 +++
lib/igt_kms.h | 1 +
2 files changed, 86 insertions(+)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
The file fits better.
Additionally rename it to intel_uc_prepare_fw(), as the function does
more than simple fetch.
`obj` cleanup in the function is also fixed (i.e. removed). In the fail
scenario it was always 'put' but there's no possible flow that
initializes the obj properly and then goes to
On Tue, 2017-02-28 at 18:57 -0800, Dhinakaran Pandiyan wrote:
> According to BSpec, "The CD clock frequency must be at least twice the
> frequency of the Azalia BCLK." and BCLK is configured to 96 MHz by
> default. BXT and GLK both have cdclk frequencies that are less han 192 MHz,
> so apply the ch
During reset_all_global_seqno() on seqno rollover, we have to update the
HWS. This causes all in flight requests to be completed, so first we
wait. However, we were only waiting for the requests themselves to be
completed and clearing out the waiter rbtrees - what I had missed was
the extra referen
The code to check for execlists completion is generic, so move it to
intel_engine_cs.c
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 8 +++
drivers/gpu/drm/i915/intel_engine_cs.c| 13 +++
drivers/gpu/drm/i915/intel_lrc.c
Refactor the common task of updating the first_waiter, serialised with
the interrupt handler. When we update the first_waiter, we also need to
wakeup the new bottom-half in order to complete the actions that we may
have delegated to it (such as checking the irq-seqno coherency or waking
up other lo
As we now take the breadcrumbs spinlock within the interrupt handler, we
wish to minimise its hold time. During the interrupt we do not care
about the state of the full rbtree, only that of the first element, so
we can guard that with a separate lock.
Signed-off-by: Chris Wilson
---
drivers/gpu/
As we now check if the seqno is complete in order to signal the fence,
we can also decide not to wake up the first_waiter until it is ready
(since it is waiting on the same seqno). The only caveat is that if we
need the engine->irq_seqno_barrier to enforce some coherency between an
interrupt and th
On Tue, 2017-02-28 at 18:57 -0800, Dhinakaran Pandiyan wrote:
> Implement GLK cdclk restriction for DP audio, similar to what's implemented
> for BDW and other GEN9 platforms. The cdclk restriction has been
> refactored out of max. pixel clock computation as the 1:1 relationship
> between pixel clo
On Mon, 2017-02-20 at 17:00 -0300, Paulo Zanoni wrote:
> There's a lot of duplicated platform-independent logic in the current
> modeset_calc_cdclk() functions. Adding cdclk support for more
> platforms will only add more copies of this code.
>
> To solve this problem, in this patch we create a ne
Thanks for the review Ander. My comments inline.
Shashank
On 3/3/2017 3:22 PM, Ander Conselvan De Oliveira wrote:
On Fri, 2017-03-03 at 11:59 +0530, Shashank Sharma wrote:
Geminilake platform sports a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
On Fri, Mar 03, 2017 at 10:56:16AM +0800, Zhi Wang wrote:
> Can we directly use DRM_DEBUG_KMS() for this periodic error message?
No. We want to actually know when/if this fails.
>
> On 03/03/17 19:53, bing@intel.com wrote:
> > From: Bing Niu
> >
> > under virtualization enviroment, it is po
On Fri, Mar 03, 2017 at 06:53:08AM -0500, bing@intel.com wrote:
> From: Bing Niu
>
> under virtualization enviroment, it is possible guest update pipe
> registers across vblank intervals due to overhead of mmio traps or vm
> schedule out. However, it is safe since those pipe update happen in
On Thu, 2017-03-02 at 13:48 +, Patchwork wrote:
> == Series Details ==
>
> Series: Try to fix MST regression with DDI IO power domains (rev5)
> URL : https://patchwork.freedesktop.org/series/20345/
> State : failure
>
> == Summary ==
>
> Series 20345v5 Try to fix MST regression with DDI IO
Hi Shashank,
On 03-03-2017 06:29, Shashank Sharma wrote:
> This patch does following:
> - Adds a new structure (drm_hdmi_info) in drm_display_info.
> This structure will be used to save and indicate if sink
> supports advanced HDMI 2.0 features
> - Adds another structure drm_scdc within drm_h
Hi Shashank,
On 03-03-2017 06:29, Shashank Sharma wrote:
> This patch does following:
> - Adds a new structure (drm_hdmi_info) in drm_display_info.
> This structure will be used to save and indicate if sink
> supports advanced HDMI 2.0 features
> - Adds another structure drm_scdc within drm_h
On Fri, 2017-03-03 at 11:59 +0530, Shashank Sharma wrote:
> Geminilake platform sports a native HDMI 2.0 controller, and is
> capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
> mendates scrambling for these higher clocks, for reduced RF footprint.
>
> This patch checks if the monitor sup
On Thu, 2017-03-02 at 08:25 +0530, Sharma, Shashank wrote:
> Regards
>
> Shashank
>
>
> On 3/1/2017 8:41 PM, Ville Syrjälä wrote:
> > On Tue, Feb 28, 2017 at 02:09:09PM +0530, Shashank Sharma wrote:
> > > Geminilake platform sports a native HDMI 2.0 controller, and is
> > > capable of driving pi
== Series Details ==
Series: drm/i915: Differentiate between hangcheck waiting for timer or
scheduler (rev2)
URL : https://patchwork.freedesktop.org/series/20585/
State : success
== Summary ==
Series 20585v2 drm/i915: Differentiate between hangcheck waiting for timer or
scheduler
https://pat
On Thu, Mar 02, 2017 at 03:54:57PM -0800, Antonio Argenziano wrote:
> The intent of the test is to provide an incorrect input to a command.
> Since the driver doesn't do any command validation, this test is removed
> as non applicable.
>
> Signed-off-by: Antonio Argenziano
Reviewed-by: Michał Wi
On Fri, Mar 03, 2017 at 11:13:15AM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > Check timer_pending() as well as work_pending() to see if the timer for
> > the hangcheck has already expired and the work is pending execution on
> > some list somewhere.
> >
> > v2: Use a more compact if
Chris Wilson writes:
> Check timer_pending() as well as work_pending() to see if the timer for
> the hangcheck has already expired and the work is pending execution on
> some list somewhere.
>
> v2: Use a more compact if-chain
>
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
Reviewed-by: Mi
Check timer_pending() as well as work_pending() to see if the timer for
the hangcheck has already expired and the work is pending execution on
some list somewhere.
v2: Use a more compact if-chain
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_debugfs.c | 8 +---
On Fri, Mar 03, 2017 at 08:19:43AM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Always wakeup the next breadcrumb waiter (rev3)
> URL : https://patchwork.freedesktop.org/series/20590/
> State : failure
>
> == Summary ==
>
> Series 20590v3 drm/i915: Always wakeup the nex
== Series Details ==
Series: drm/i915: Always wakeup the next breadcrumb waiter (rev3)
URL : https://patchwork.freedesktop.org/series/20590/
State : failure
== Summary ==
Series 20590v3 drm/i915: Always wakeup the next breadcrumb waiter
https://patchwork.freedesktop.org/api/1.0/series/20590/re
Ville Syrjälä writes:
> On Thu, Mar 02, 2017 at 06:21:37PM +, Chris Wilson wrote:
>> On Thu, Mar 02, 2017 at 08:13:31PM +0200, Ville Syrjälä wrote:
>> > On Thu, Mar 02, 2017 at 08:01:40PM +0200, Mika Kuoppala wrote:
>> > > We were passively acting on the high counter value bit
>> > > and as i
Since extracting the reset wakeup into a independent waitqueue, we only
need to consider the possibility of there being an outstanding
breadcrumb interrupt when advancing onto the next waiter. Both paths can
now use the same code, so refactor it to a common function.
Signed-off-by: Chris Wilson
-
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