[Intel-gfx] ✗ Fi.CI.BAT: failure for Clean series for Link training failure handling

2016-11-18 Thread Patchwork
== Series Details == Series: Clean series for Link training failure handling URL : https://patchwork.freedesktop.org/series/15579/ State : failure == Summary == Series 15579v1 Clean series for Link training failure handling https://patchwork.freedesktop.org/api/1.0/series/15579/revisions/1/mbo

[Intel-gfx] ✗ Fi.CI.BAT: failure for Link Training failure handling during modeset (rev4)

2016-11-18 Thread Patchwork
== Series Details == Series: Link Training failure handling during modeset (rev4) URL : https://patchwork.freedesktop.org/series/15537/ State : failure == Summary == (_timer)->data = (_data);\ ^ ./include/linux/workqueue.h:247:2: note: in expansion of macro ‘__INIT

[Intel-gfx] [PATCH 5/5] drm/i915: Implement Link Rate fallback on Link training failure

2016-11-18 Thread Manasi Navare
If link training at a link rate optimal for a particular mode fails during modeset's atomic commit phase, then we let the modeset complete and then retry. We save the link rate value at which link training failed, update the link status property to "BAD" and use a lower link rate to prune the modes

[Intel-gfx] [PATCH 3/5] drm/i915: Update CRTC state if connector link status property changed

2016-11-18 Thread Manasi Navare
CRTC state connector_changed needs to be set to true if connector link status property has changed. This will tell the driver to do a complete modeset due to change in connector property. Acked-by: Harry Wentland Acked-by: Tony Cheng Cc: dri-de...@lists.freedesktop.org Cc: Jani Nikula Cc: Danie

[Intel-gfx] [PATCH 4/5] drm/i915: Find fallback link rate/lane count

2016-11-18 Thread Manasi Navare
If link training fails, then we need to fallback to lower link rate first and if link training fails at RBR, then fallback to lower lane count. This function finds the next lower link rate/lane count value after link training failure. v5: * Start the fallback at the lane count value passed not the

[Intel-gfx] [PATCH 2/5] drm: Set DRM connector link status property

2016-11-18 Thread Manasi Navare
In the usual working scenarios, this property is "Good". If something fails during modeset, the DRM driver can set the link status to "Bad", prune the mode list based on the link rate/lane count fallback values and send hotplug uevent so that userspace that is aware of this property can take an ap

[Intel-gfx] [PATCH 1/5] drm: Add a new connector property for link status

2016-11-18 Thread Manasi Navare
At the time userspace does setcrtc, we've already promised the mode would work. The promise is based on the theoretical capabilities of the link, but it's possible we can't reach this in practice. The DP spec describes how the link should be reduced, but we can't reduce the link below the requireme

[Intel-gfx] [PATCH 0/5] Clean series for Link training failure handling

2016-11-18 Thread Manasi Navare
The idea presented in these patches is to address link training failure in a way that: a) changes the current happy day scenario as little as possible, to avoid regressions, b) can be implemented the same way by all drm drivers, c) is still opt-in for the drivers and userspace, and opting out doesn

[Intel-gfx] [PATCH v6 4/56 4/56 4/56 4/56 4/56 4/5] drm/i915: Find fallback link rate/lane count

2016-11-18 Thread Manasi Navare
If link training fails, then we need to fallback to lower link rate first and if link training fails at RBR, then fallback to lower lane count. This function finds the next lower link rate/lane count value after link training failure. v5: * Start the fallback at the lane count value passed not the

[Intel-gfx] [PATCH v5 1/5] drm: Add a new connector property for link status

2016-11-18 Thread Manasi Navare
At the time userspace does setcrtc, we've already promised the mode would work. The promise is based on the theoretical capabilities of the link, but it's possible we can't reach this in practice. The DP spec describes how the link should be reduced, but we can't reduce the link below the requireme

[Intel-gfx] [PATCH v3 2/5] drm: Set DRM connector link status property

2016-11-18 Thread Manasi Navare
In the usual working scenarios, this property is "Good". If something fails during modeset, the DRM driver can set the link status to "Bad", prune the mode list based on the link rate/lane count fallback values and send hotplug uevent so that userspace that is aware of this property can take an ap

[Intel-gfx] [PATCH v8 5/5] drm/i915: Implement Link Rate fallback on Link training failure

2016-11-18 Thread Manasi Navare
If link training at a link rate optimal for a particular mode fails during modeset's atomic commit phase, then we let the modeset complete and then retry. We save the link rate value at which link training failed, update the link status property to "BAD" and use a lower link rate to prune the modes

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Find fallback link rate/lane count

2016-11-18 Thread Manasi Navare
On Fri, Nov 18, 2016 at 07:39:50AM -0800, Manasi Navare wrote: > On Fri, Nov 18, 2016 at 03:22:49PM +0200, Jani Nikula wrote: > > On Fri, 18 Nov 2016, Manasi Navare wrote: > > > If link training fails, then we need to fallback to lower > > > link rate first and if link training fails at RBR, then

Re: [Intel-gfx] [PATCH 2/3] drm/dp/mst: Calculate total link bandwidth instead of hardcoding it

2016-11-18 Thread Pandiyan, Dhinakaran
This patch along with https://patchwork.freedesktop.org/series/15305/ will fix https://bugs.freedesktop.org/show_bug.cgi?id=98141. I'd like this to be reviewed independently since the other two patches in this series require rework for atomic support. -DK On Thu, 2016-11-17 at 18:03 -0800, Dhinak

Re: [Intel-gfx] [PATCH 3/3] drm/dp/mst: Track available time slots in DP Multi-Stream Transport Packet

2016-11-18 Thread Pandiyan, Dhinakaran
On Fri, 2016-11-18 at 06:57 +, Chris Wilson wrote: > On Thu, Nov 17, 2016 at 06:03:48PM -0800, Dhinakaran Pandiyan wrote: > > static int drm_dp_init_vcpi(struct drm_dp_mst_topology_mgr *mgr, > > struct drm_dp_vcpi *vcpi, int pbn) > > { > > - int num_slots; > > + in

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dp: Fail DP MST config when there are not enough vcpi slots

2016-11-18 Thread Pandiyan, Dhinakaran
On Fri, 2016-11-18 at 09:43 +0100, Daniel Vetter wrote: > On Thu, Nov 17, 2016 at 06:03:46PM -0800, Dhinakaran Pandiyan wrote: > > drm_dp_find_vcpi_slots() returns an error when there is not enough > > available bandwidth on a link to support a mode. This error should make > > compute_config() to f

Re: [Intel-gfx] [PATCH 37/37] drm/i915: Implement .get_format_info() hook for CCS

2016-11-18 Thread Ben Widawsky
On 16-11-18 21:53:13, Ville Syrjälä wrote: From: Ville Syrjälä By providing our own format information for the CCS formats, we should be able to make framebuffer_check() do the right thing for the CCS surface as well. I was hoping to see that patch as well :-). If you're adding the new fb mo

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/bxt: Use smaller 8/3X MIPI clock divider value for dual link.

2016-11-18 Thread Patchwork
== Series Details == Series: drm/i915/bxt: Use smaller 8/3X MIPI clock divider value for dual link. URL : https://patchwork.freedesktop.org/series/15573/ State : warning == Summary == Series 15573v1 drm/i915/bxt: Use smaller 8/3X MIPI clock divider value for dual link. https://patchwork.freed

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Always flush the dirty CPU cache when pinning the scanout

2016-11-18 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Always flush the dirty CPU cache when pinning the scanout URL : https://patchwork.freedesktop.org/series/15572/ State : success == Summary == Series 15572v1 Series without cover letter https://patchwork.freedesktop.org/api/1

[Intel-gfx] [PATCH] drm/i915/bxt: Use smaller 8/3X MIPI clock divider value for dual link.

2016-11-18 Thread Bob Paauwe
For a single link (channel) DSI panel we want to use a larger divider and keep the clock rate down to save power when in DPI/video mode. However when using a dual-link DSI panel this may reduce the clock below what's needed to get a stable display. Use the smaller divider (faster clock) for either

Re: [Intel-gfx] [PATCH 8/9] drm/i915: Rename the local 'plane' variable to 'plane_id' in primary plane code

2016-11-18 Thread Ville Syrjälä
On Fri, Nov 18, 2016 at 06:41:39PM -0200, Paulo Zanoni wrote: > Em Sex, 2016-11-18 às 16:34 +0200, Ville Syrjälä escreveu: > > On Fri, Nov 18, 2016 at 12:25:30PM -0200, Paulo Zanoni wrote: > > > > > > Em Ter, 2016-11-08 às 16:47 +0200, ville.syrj...@linux.intel.com > > > escreveu: > > > > > > > >

[Intel-gfx] [CI 2/2] drm/i915: Skip final clflush if LLC is coherent

2016-11-18 Thread Chris Wilson
If the LLC is coherent with the object, we do not need to worry about whether main memory and cache mismatch when we hand the object back to the system. Signed-off-by: Chris Wilson Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_gem.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletio

[Intel-gfx] [CI 1/2] drm/i915: Always flush the dirty CPU cache when pinning the scanout

2016-11-18 Thread Chris Wilson
Currently we only clflush the scanout if it is in the CPU domain. Also flush if we have a pending CPU clflush. We also want to treat the dirtyfb path similar, and flush any pending writes there as well. v2: Only send the fb flush message if flushing the dirt on flip v3: Make flush-for-flip and dir

Re: [Intel-gfx] [PATCH] drm/i915: i915_pages_create_for_stolen should return err ptr

2016-11-18 Thread Chris Wilson
On Fri, Nov 18, 2016 at 05:08:55PM +, Chris Wilson wrote: > On Fri, Nov 18, 2016 at 05:02:16PM +, Matthew Auld wrote: > > When gathering the pages from our backing storage we expect get_pages() > > to either give us our sg_table or an err ptr. However when gathering our > > fake pages for s

Re: [Intel-gfx] [PATCH] drm/i915: Check that each request phase is completed before retiring

2016-11-18 Thread Chris Wilson
On Fri, Nov 18, 2016 at 05:27:00PM +, Matthew Auld wrote: > On 18 November 2016 at 14:34, Chris Wilson wrote: > > Trying to chase an impossible bug (ivb): > > > > [ 207.765411] [drm:i915_reset_and_wakeup [i915]] resetting chip > > [ 207.765734] [drm:i915_gem_reset [i915]] resetting render ri

Re: [Intel-gfx] [PATCH] drm/i915: Don't touch NULL sg on i915_gem_object_get_pages_gtt() error

2016-11-18 Thread Chris Wilson
On Fri, Nov 18, 2016 at 05:19:58PM +, Matthew Auld wrote: > On 14 November 2016 at 11:29, Chris Wilson wrote: > > On the DMA mapping error path, sg may be NULL (it has already been > > marked as the last scatterlist entry), and we should avoid dereferencing > > it again. > > > > Reported-by: D

Re: [Intel-gfx] [PATCH 8/9] drm/i915: Rename the local 'plane' variable to 'plane_id' in primary plane code

2016-11-18 Thread Paulo Zanoni
Em Sex, 2016-11-18 às 16:34 +0200, Ville Syrjälä escreveu: > On Fri, Nov 18, 2016 at 12:25:30PM -0200, Paulo Zanoni wrote: > > > > Em Ter, 2016-11-08 às 16:47 +0200, ville.syrj...@linux.intel.com > > escreveu: > > > > > > From: Ville Syrjälä > > > > > > Now we've rename the local plane id varia

Re: [Intel-gfx] [PATCH 2/9] drm/i915: Add per-pipe plane identifier

2016-11-18 Thread Paulo Zanoni
Em Sex, 2016-11-18 às 16:32 +0200, Ville Syrjälä escreveu: > On Fri, Nov 18, 2016 at 12:17:06PM -0200, Paulo Zanoni wrote: > > > > Em Qui, 2016-11-17 às 21:43 +0200, Ville Syrjälä escreveu: > > > > > > On Thu, Nov 17, 2016 at 05:09:38PM -0200, Paulo Zanoni wrote: > > > > > > > > > > > > Em Ter,

[Intel-gfx] [PATCH 36/37] drm: Add mode_config .get_format_info() hook

2016-11-18 Thread ville . syrjala
From: Ville Syrjälä Allow drivers to return a custom drm_format_info structure for special fb layouts. We'll use this for the compression control surface in i915. Cc: Ben Widawsky Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/drm_fb_cma_helper.c | 2 +-

[Intel-gfx] [PATCH 37/37] drm/i915: Implement .get_format_info() hook for CCS

2016-11-18 Thread ville . syrjala
From: Ville Syrjälä By providing our own format information for the CCS formats, we should be able to make framebuffer_check() do the right thing for the CCS surface as well. Note that we'll return the same format info for both Y and Yf tiled format as that's what happens with the non-CCS Y vs.

[Intel-gfx] [PATCH 30/37] drm/i915: Use drm_framebuffer_plane_{width, height}() where possible

2016-11-18 Thread ville . syrjala
From: Ville Syrjälä Replace drm_format_plane_{width,height}() usage with drm_framebuffer_plane_{width,height}() to avoid the lookup of the format info. Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 5 ++--- 1 file changed, 2 inserti

[Intel-gfx] [PATCH 21/37] drm/i915: Populate fb->format early for inherited fbs

2016-11-18 Thread ville . syrjala
From: Ville Syrjälä Make sure the framebuffer format info is available as early as possible for fbs we inherit from the BIOS. This will allow us to use the fb as if it was fully formed before we register it. Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i

[Intel-gfx] [PATCH 28/37] drm/i915: Store a pointer to the pixel format info for fbc

2016-11-18 Thread ville . syrjala
From: Ville Syrjälä Rather than store the pixel format and look up the format info as needed, let's just store a pointer to the format info directly and speed up our lookups. Cc: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH 24/37] drm/i915: Eliminate the ugly 'fb?:' constructs from the ilk/skl wm code

2016-11-18 Thread ville . syrjala
From: Ville Syrjälä Don't access plane_state->fb until we know the plane to be visible. It it's visible, it will have an fb, and thus we don't have to consider the NULL fb case. Makes the code look nicer. Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 17/37] drm/i915: Set fb->dev early on for inherited fbs

2016-11-18 Thread ville . syrjala
From: Ville Syrjälä We want the fbs inherited from the BIOS to be more or less fully working prior to actually registering them. This will allow us to just pass the fb to various helper function instead of having to pass all the different parameters separately. Cc: intel-gfx@lists.freedesktop.or

[Intel-gfx] [PATCH v2 00/37] drm: Deduplicate fb format information (v2)

2016-11-18 Thread ville . syrjala
From: Ville Syrjälä Second installment of my effort to remove the duplicated depth/bpp/pixel_format from drm_framebuffer and just use struct drm_format_info instead. I tried to address all of the review feedback, and collect up all the r-bs I already got. Thanks for the review, guys. Changes si

[Intel-gfx] [PATCH 01/37] drm/i915: Add local 'fb' variables

2016-11-18 Thread ville . syrjala
From: Ville Syrjälä Add a local 'fb' variable to a few places to get rid of the 'crtc->primary->fb' stuff. Looks neater and helps me with my poor coccinelle skills later. While at it switch over to using the pixel format rather than depth+bpp. Cc: intel-gfx@lists.freedesktop.org Signed-off-by:

[Intel-gfx] [PATCH] aubdump: Handle 48-bit relocations properly

2016-11-18 Thread Jason Ekstrand
aubdump was only writing 32-bits regardless of platform. This is fine if the client being dumped leaves the top 32 bits zero since the aubdump GTT is fairly small. However, if the client does store something in the upper 32 bits, this results in an invalid relocation. Cc: Kristian Høgsberg ---

Re: [Intel-gfx] [PATCH 2/9] drm/i915: Add per-pipe plane identifier

2016-11-18 Thread Matt Roper
On Thu, Nov 17, 2016 at 05:09:38PM -0200, Paulo Zanoni wrote: > Em Ter, 2016-11-08 às 16:47 +0200, ville.syrj...@linux.intel.com > escreveu: > > From: Ville Syrjälä > > > > As I told people in [1] we really should not be confusing enum plane > > as a per-pipe plane identifier. Looks like that hap

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Update CRTC state if connector link status property changed

2016-11-18 Thread Manasi Navare
On Fri, Nov 18, 2016 at 04:35:25PM +0100, Daniel Vetter wrote: > On Fri, Nov 18, 2016 at 05:28:54PM +0200, Ville Syrjälä wrote: > > On Fri, Nov 18, 2016 at 03:18:06PM +0100, Maarten Lankhorst wrote: > > > Op 18-11-16 om 15:11 schreef Ville Syrjälä: > > > > On Fri, Nov 18, 2016 at 02:50:52PM +0100,

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: i915_pages_create_for_stolen should return err ptr

2016-11-18 Thread Patchwork
== Series Details == Series: drm/i915: i915_pages_create_for_stolen should return err ptr URL : https://patchwork.freedesktop.org/series/15563/ State : success == Summary == Series 15563v1 drm/i915: i915_pages_create_for_stolen should return err ptr https://patchwork.freedesktop.org/api/1.0/se

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Update CRTC state if connector link status property changed

2016-11-18 Thread Manasi Navare
On Fri, Nov 18, 2016 at 06:21:21PM +0200, Ville Syrjälä wrote: > On Fri, Nov 18, 2016 at 04:35:25PM +0100, Daniel Vetter wrote: > > On Fri, Nov 18, 2016 at 05:28:54PM +0200, Ville Syrjälä wrote: > > > On Fri, Nov 18, 2016 at 03:18:06PM +0100, Maarten Lankhorst wrote: > > > > Op 18-11-16 om 15:11 sc

Re: [Intel-gfx] [PATCH] drm/i915: Check that each request phase is completed before retiring

2016-11-18 Thread Matthew Auld
On 18 November 2016 at 14:34, Chris Wilson wrote: > Trying to chase an impossible bug (ivb): > > [ 207.765411] [drm:i915_reset_and_wakeup [i915]] resetting chip > [ 207.765734] [drm:i915_gem_reset [i915]] resetting render ring to restart > from tail of request 0x4ee834 > [ 207.765791] [drm:int

Re: [Intel-gfx] [PATCH] drm/i915: Don't touch NULL sg on i915_gem_object_get_pages_gtt() error

2016-11-18 Thread Matthew Auld
On 14 November 2016 at 11:29, Chris Wilson wrote: > On the DMA mapping error path, sg may be NULL (it has already been > marked as the last scatterlist entry), and we should avoid dereferencing > it again. > > Reported-by: Dan Carpenter > Fixes: e227330223a7 ("drm/i915: avoid leaking DMA mappings

Re: [Intel-gfx] [PATCH] drm/i915: i915_pages_create_for_stolen should return err ptr

2016-11-18 Thread Chris Wilson
On Fri, Nov 18, 2016 at 05:02:16PM +, Matthew Auld wrote: > When gathering the pages from our backing storage we expect get_pages() > to either give us our sg_table or an err ptr. However when gathering our > fake pages for stolen memory we may return NULL in the event of a > failure. To preven

[Intel-gfx] [PATCH] drm/i915: i915_pages_create_for_stolen should return err ptr

2016-11-18 Thread Matthew Auld
When gathering the pages from our backing storage we expect get_pages() to either give us our sg_table or an err ptr. However when gathering our fake pages for stolen memory we may return NULL in the event of a failure. To prevent any funny business we should therefore return the proper err ptr val

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Update CRTC state if connector link status property changed

2016-11-18 Thread Ville Syrjälä
On Fri, Nov 18, 2016 at 04:35:25PM +0100, Daniel Vetter wrote: > On Fri, Nov 18, 2016 at 05:28:54PM +0200, Ville Syrjälä wrote: > > On Fri, Nov 18, 2016 at 03:18:06PM +0100, Maarten Lankhorst wrote: > > > Op 18-11-16 om 15:11 schreef Ville Syrjälä: > > > > On Fri, Nov 18, 2016 at 02:50:52PM +0100,

[Intel-gfx] ✗ Fi.CI.BAT: failure for GEN-9 Arbitrated Bandwidth WM WA's & IPC

2016-11-18 Thread Patchwork
== Series Details == Series: GEN-9 Arbitrated Bandwidth WM WA's & IPC URL : https://patchwork.freedesktop.org/series/15562/ State : failure == Summary == CC [M] drivers/gpu/drm/i915/gvt/sched_policy.o CC [M] drivers/gpu/drm/i915/gvt/cmd_parser.o LD sound/built-in.o LD drive

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Check that each request phase is completed before retiring

2016-11-18 Thread Saarinen, Jani
> == Series Details == > > Series: drm/i915: Check that each request phase is completed before > retiring > URL : https://patchwork.freedesktop.org/series/15559/ > State : warning > > == Summary == > > Series 15559v1 drm/i915: Check that each request phase is completed > before retiring > http

Re: [Intel-gfx] [PATCH i-g-t v6 00/21] Implement sw_sync test

2016-11-18 Thread Robert Foss
On Fri, 2016-11-18 at 09:59 -0500, robert.f...@collabora.com wrote: > From: Robert Foss > This is not a resubmission of v6, but rather a mislabeled v7. > > This series implements the sw_sync test and the lib/sw_sync helper > functions for said test. > > The sw_sync subtests range from very ba

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Check that each request phase is completed before retiring

2016-11-18 Thread Patchwork
== Series Details == Series: drm/i915: Check that each request phase is completed before retiring URL : https://patchwork.freedesktop.org/series/15559/ State : warning == Summary == Series 15559v1 drm/i915: Check that each request phase is completed before retiring https://patchwork.freedeskt

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: optimise intel_runtime_pm_{get, put}

2016-11-18 Thread Imre Deak
On pe, 2016-11-18 at 14:00 +, Chris Wilson wrote: > On Fri, Nov 18, 2016 at 03:36:47PM +0200, David Weinehall wrote: > > Benchmarking shows that on resume we spend quite a bit of time > > just taking and dropping these references, leaving us two options; > > either rewriting the code not to tak

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Find fallback link rate/lane count

2016-11-18 Thread Manasi Navare
On Fri, Nov 18, 2016 at 03:22:49PM +0200, Jani Nikula wrote: > On Fri, 18 Nov 2016, Manasi Navare wrote: > > If link training fails, then we need to fallback to lower > > link rate first and if link training fails at RBR, then > > fallback to lower lane count. > > This function finds the next lowe

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Update CRTC state if connector link status property changed

2016-11-18 Thread Daniel Vetter
On Fri, Nov 18, 2016 at 05:28:54PM +0200, Ville Syrjälä wrote: > On Fri, Nov 18, 2016 at 03:18:06PM +0100, Maarten Lankhorst wrote: > > Op 18-11-16 om 15:11 schreef Ville Syrjälä: > > > On Fri, Nov 18, 2016 at 02:50:52PM +0100, Maarten Lankhorst wrote: > > >> Op 18-11-16 om 08:13 schreef Manasi Nav

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Update CRTC state if connector link status property changed

2016-11-18 Thread Ville Syrjälä
On Fri, Nov 18, 2016 at 03:18:06PM +0100, Maarten Lankhorst wrote: > Op 18-11-16 om 15:11 schreef Ville Syrjälä: > > On Fri, Nov 18, 2016 at 02:50:52PM +0100, Maarten Lankhorst wrote: > >> Op 18-11-16 om 08:13 schreef Manasi Navare: > >>> CRTC state connector_changed needs to be set to true > >>> i

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Implement Link Rate fallback on Link training failure

2016-11-18 Thread Manasi Navare
On Fri, Nov 18, 2016 at 03:31:48PM +0200, Jani Nikula wrote: > On Fri, 18 Nov 2016, Manasi Navare wrote: > > If link training at a link rate optimal for a particular > > mode fails during modeset's atomic commit phase, then we > > let the modeset complete and then retry. We save the link rate > >

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Update CRTC state if connector link status property changed

2016-11-18 Thread Manasi Navare
On Fri, Nov 18, 2016 at 04:11:47PM +0200, Ville Syrjälä wrote: > On Fri, Nov 18, 2016 at 02:50:52PM +0100, Maarten Lankhorst wrote: > > Op 18-11-16 om 08:13 schreef Manasi Navare: > > > CRTC state connector_changed needs to be set to true > > > if connector link status property has changed. This wi

[Intel-gfx] [PATCH v5 6/8] drm/i915: Add intel_atomic_get_existing_crtc_state function

2016-11-18 Thread Mahesh Kumar
This patch Adds a function to extract intel_crtc_state from the atomic_state, if not available it returns NULL. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_drv.h | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/

[Intel-gfx] [PATCH v5 3/8] drm/i915/kbl: IPC workaround for kabylake

2016-11-18 Thread Mahesh Kumar
IPC (Isoch Priority Control) may cause underflows. KBL WA: When IPC is enabled, watermark latency values must be increased by 4us across all levels. This brings level 0 up to 6us. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_pm.c | 4 1 file changed, 4 insertions(+) diff --g

[Intel-gfx] [PATCH v5 5/8] drm/i915/skl+: change WM calc to fixed point 16.16

2016-11-18 Thread Mahesh Kumar
This patch changes Watermak calculation to fixed point calculation. Problem with current calculation is during plane_blocks_per_line calculation we divide intermediate blocks with min_scanlines and takes floor of the result because of integer operation. hence we end-up assigning less blocks than re

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: replace platform flags with a platform enum

2016-11-18 Thread Patchwork
== Series Details == Series: drm/i915: replace platform flags with a platform enum URL : https://patchwork.freedesktop.org/series/15558/ State : success == Summary == Series 15558v1 drm/i915: replace platform flags with a platform enum https://patchwork.freedesktop.org/api/1.0/series/15558/rev

[Intel-gfx] [PATCH v5 8/8] drm/i915/gen9: WM memory bandwidth related workaround

2016-11-18 Thread Mahesh Kumar
This patch implemnets Workariunds related to display arbitrated memory bandwidth. These WA are applicabe for all gen-9 based platforms. Changes since v1: - Rebase on top of Paulo's patch series Changes since v2: - Address review comments - Rebase/rework as per other patch changes in series Sig

[Intel-gfx] [PATCH v5 7/8] drm/i915: Decode system memory bandwidth

2016-11-18 Thread Mahesh Kumar
This patch adds support to decode system memory bandwidth which will be used for arbitrated display memory percentage calculation in GEN9 based system. Changes from v1: - Address comments from Paulo - implement decode function for SKL/KBL also Changes from v2: - Rewrite the code as per HW team

[Intel-gfx] [PATCH v5 1/8] drm/i915/skl: Add variables to check x_tile and y_tile

2016-11-18 Thread Mahesh Kumar
This patch adds variable to check for X_tiled & y_tiled planes, instead of always checking against framebuffer-modifiers. Changes: - Created separate patch as per Paulo's comment - Added x_tiled variable as well Changes since V2: - Incorporate Paulo's comments - Rebase Signed-off-by: Mahesh K

[Intel-gfx] [PATCH v5 4/8] drm/i915/bxt: Enable IPC support

2016-11-18 Thread Mahesh Kumar
This patch adds IPC support for platforms. This patch enables IPC only for BXT/KBL platform as for SKL recommendation is to keep is disabled. IPC (Isochronous Priority Control) is the hardware feature, which dynamically controles the memory read priority of Display. When IPC is enabled, plane read

[Intel-gfx] [PATCH v5 2/8] drm/i915/bxt: IPC WA for Broxton

2016-11-18 Thread Mahesh Kumar
If IPC is enabled in BXT, display underruns are observed. WA: The Line Time programmed in the WM_LINETIME register should be half of the actual calculated Line Time. Programmed Line Time = 1/2*Calculated Line Time Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ drivers/

[Intel-gfx] [PATCH i-g-t v6 17/21] lib/sw_sync: Add igt_require_sw_sync to enable skipping on no sw_sync support

2016-11-18 Thread robert . foss
From: Robert Foss Add igt_require_sw_sync to provide tests to skip if sw_sync support isn't available on the host machine. Signed-off-by: Robert Foss --- lib/sw_sync.c | 22 ++ lib/sw_sync.h | 1 + 2 files changed, 23 insertions(+) diff --git a/lib/sw_sync.c b/lib/sw_sync

[Intel-gfx] [PATCH v5 0/8] GEN-9 Arbitrated Bandwidth WM WA's & IPC

2016-11-18 Thread Mahesh Kumar
This series implements following set of functionality Implement IPC WA's for Broxton/KBL Enable IPC in supported platforms Convert WM calculation to fixed point calculation Calculation of System memory Bandwidth for SKL/KBL/BXT Implementation of Arbitrated memory Bandwidth relat

[Intel-gfx] [PATCH i-g-t v6 19/21] tests/sw_sync: Add subtest test_sync_merge_invalid

2016-11-18 Thread robert . foss
From: Robert Foss Add subtest test_sync_merge_invalid that tests merging invalid fences. Signed-off-by: Robert Foss --- tests/sw_sync.c | 41 + 1 file changed, 41 insertions(+) diff --git a/tests/sw_sync.c b/tests/sw_sync.c index 562b71f..3a67877 100644

[Intel-gfx] [PATCH i-g-t v6 15/21] tests/sw_sync: Add subtest test_timeline_closed

2016-11-18 Thread robert . foss
From: Robert Foss This subtest verifies that the fences of a timeline are not signalled when a timelne is closed. Signed-off-by: Robert Foss --- tests/sw_sync.c | 17 + 1 file changed, 17 insertions(+) diff --git a/tests/sw_sync.c b/tests/sw_sync.c index b5ea692..1d2c921 10064

[Intel-gfx] [PATCH i-g-t v6 13/21] tests/sw_sync: Add subtest test_sync_multi_producer_single_consumer

2016-11-18 Thread robert . foss
From: Robert Foss This subtest runs a single consumer thread and multiple producer thread that are synchronized using multiple timelines. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 139 1 file changed,

[Intel-gfx] [PATCH i-g-t v6 21/21] tests/sw_sync: Add subtest test_sync_busy_unixsocket

2016-11-18 Thread robert . foss
From: Robert Foss Add subtest test_sync_busy_fork which increments the timeline in a forked child process, where the timeline fd has been sent through a UNIX socket. Signed-off-by: Robert Foss --- tests/sw_sync.c | 103 1 file changed, 1

[Intel-gfx] [PATCH i-g-t v6 16/21] tests/sw_sync: Add subtest test_timeline_closed_signaled

2016-11-18 Thread robert . foss
From: Robert Foss Add subtest test_timeline_closed_signaled that verifies that a signaled fence stays signaled after its timeline has been closed. Signed-off-by: Robert Foss --- tests/sw_sync.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/tests/sw_sync.c b/tests/sw_s

[Intel-gfx] [PATCH i-g-t v6 14/21] tests/sw_sync: Add subtest test_sync_expired_merge

2016-11-18 Thread robert . foss
From: Rafael Antognolli This test creates an already expired fence, then creates a merged fence out of that expired one (passed twice to the merge operation), and finally closes the merged fence. It shows that if the refcounts are wrong on the original expired fence, it might get freed while stil

[Intel-gfx] [PATCH i-g-t v6 20/21] tests/sw_sync: Add subtest test_sync_busy_fork

2016-11-18 Thread robert . foss
From: Robert Foss Add subtest test_sync_busy_fork which increments the timeline in a forked child process. Signed-off-by: Robert Foss --- tests/sw_sync.c | 39 +++ 1 file changed, 39 insertions(+) diff --git a/tests/sw_sync.c b/tests/sw_sync.c index 3a67877

[Intel-gfx] [PATCH i-g-t v6 10/21] tests/sw_sync: Add subtest test_sync_multi_consumer_producer

2016-11-18 Thread robert . foss
From: Robert Foss This test verifies that stressing the kernel by creating multiple consumer/producer threads that wait on a single timeline to be incremented by another conumer/producer thread does not fail. And that the order amongst the threads is maintained. Signed-off-by: Robert Foss Revie

[Intel-gfx] [PATCH i-g-t v6 04/21] tests/sw_sync: Add subtest test_alloc_fence_invalid_timeline

2016-11-18 Thread robert . foss
From: Robert Foss This subtests tests that creating fences on negative timelines fail. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/tests/sw_sync.c b/tests/sw_sync.c index 8e7764a..f9d4fe9 100644 --- a/te

[Intel-gfx] [PATCH i-g-t v6 06/21] tests/sw_sync: Add subtest test_sync_busy

2016-11-18 Thread robert . foss
From: Robert Foss This subtest verifies that waiting on fences works properly. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 51 +++ 1 file changed, 51 insertions(+) diff --git a/tests/sw_sync.c b/tests/sw_sync.c

[Intel-gfx] [PATCH i-g-t v6 12/21] tests/sw_sync: Add subtest test_sync_multi_timeline_wait

2016-11-18 Thread robert . foss
From: Robert Foss This subtest verifies that waiting, timing out on a wait and that counting fences in various states works. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 66 + 1 file changed, 66 insertions

[Intel-gfx] [PATCH i-g-t v6 11/21] tests/sw_sync: Add subtest test_sync_random_merge

2016-11-18 Thread robert . foss
From: Robert Foss This subtest verifies that creating many timelines and merging random fences from each timeline with eachother results in merged fences that are fully functional. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 73

[Intel-gfx] [PATCH i-g-t v6 09/21] tests/sw_sync: Add subtest test_sync_multi_consumer

2016-11-18 Thread robert . foss
From: Robert Foss This subtest verifies the access ordering of multiple consumer threads. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 103 1 file changed, 103 insertions(+) diff --git a/tests/sw_sync.c

[Intel-gfx] [PATCH i-g-t v6 18/21] tests/sw_sync: Add igt_require check for sw_sync feature

2016-11-18 Thread robert . foss
From: Robert Foss Make sure that this test is skipped if the sw_sync feature is missing from the host system. Signed-off-by: Robert Foss --- lib/sw_sync.c | 1 + tests/sw_sync.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/lib/sw_sync.c b/lib/sw_sync.c index 38fe670..ac793ad 10064

[Intel-gfx] [PATCH i-g-t v6 08/21] tests/sw_sync: Add subtest test_sync_merge_same

2016-11-18 Thread robert . foss
From: Robert Foss This subtest verifies merging a fence with itself does not fail. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 27 +++ 1 file changed, 27 insertions(+) diff --git a/tests/sw_sync.c b/tests/sw_sync.c index 96dcbff..ada12

[Intel-gfx] [PATCH i-g-t v6 07/21] tests/sw_sync: Add subtest test_sync_merge

2016-11-18 Thread robert . foss
From: Robert Foss Add subtest test_sync_merge that tests merging fences and the validity of the resulting merged fence. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 67 + 1 file changed, 67 insertions(+)

[Intel-gfx] [PATCH i-g-t v6 05/21] tests/sw_sync: Add subtest test_alloc_merge_fence

2016-11-18 Thread robert . foss
From: Robert Foss This subtest verifies that merging two fences works in the simples possible case. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/tests/sw_sync.c b/tests/sw_sync.c index f

[Intel-gfx] [PATCH i-g-t v6 03/21] tests/sw_sync: Add subtest test_alloc_fence

2016-11-18 Thread robert . foss
From: Robert Foss Add subtest alloc_fence that verifies that it's possible to allocate a fence on a timeline. Signed-off-by: Robert Foss Reviewed-by: Eric Engestrom --- tests/sw_sync.c | 16 1 file changed, 16 insertions(+) diff --git a/tests/sw_sync.c b/tests/sw_sync.c inde

[Intel-gfx] [PATCH i-g-t v6 01/21] lib/sw_sync: Add helper functions for managing synchronization primitives

2016-11-18 Thread robert . foss
From: Robert Foss Base functions to help testing the Sync File Framework (explicit fencing mechanism ported from Android). These functions allow you to create, use and destroy timelines and fences. Signed-off-by: Robert Foss Signed-off-by: Gustavo Padovan Reviewed-by: Eric Engestrom --- lib/

[Intel-gfx] [PATCH i-g-t v6 00/21] Implement sw_sync test

2016-11-18 Thread robert . foss
From: Robert Foss This series implements the sw_sync test and the lib/sw_sync helper functions for said test. The sw_sync subtests range from very basic tests of the sw_sync functionality, to stress testing and randomized tests. Changes since v1: Added "Reviewed-by: Eric Engestrom " tag

[Intel-gfx] ✗ Fi.CI.BAT: failure for Resume time optimisation (rev2)

2016-11-18 Thread Patchwork
== Series Details == Series: Resume time optimisation (rev2) URL : https://patchwork.freedesktop.org/series/15545/ State : failure == Summary == Series 15545v2 Resume time optimisation https://patchwork.freedesktop.org/api/1.0/series/15545/revisions/2/mbox/ Test pm_rpm: Subgroup basic

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Stop the machine as we install the wedged submit_request handler

2016-11-18 Thread Chris Wilson
On Fri, Nov 18, 2016 at 09:37:08AM +, Chris Wilson wrote: > In order to prevent a race between the old callback submitting an > incomplete request and i915_gem_set_wedged() installing its nop handler, > we must ensure that the swap occurs when the machine is idle > (stop_machine). > > Signed-o

[Intel-gfx] [PATCH] drm/i915: Check that each request phase is completed before retiring

2016-11-18 Thread Chris Wilson
Trying to chase an impossible bug (ivb): [ 207.765411] [drm:i915_reset_and_wakeup [i915]] resetting chip [ 207.765734] [drm:i915_gem_reset [i915]] resetting render ring to restart from tail of request 0x4ee834 [ 207.765791] [drm:intel_print_rc6_info [i915]] Enabling RC6 states: RC6 on RC6p on

Re: [Intel-gfx] [PATCH 8/9] drm/i915: Rename the local 'plane' variable to 'plane_id' in primary plane code

2016-11-18 Thread Ville Syrjälä
On Fri, Nov 18, 2016 at 12:25:30PM -0200, Paulo Zanoni wrote: > Em Ter, 2016-11-08 às 16:47 +0200, ville.syrj...@linux.intel.com > escreveu: > > From: Ville Syrjälä > > > > Now we've rename the local plane id variable as 'plane_id' everywhere > > except the pre-SKL primary plane code. Let's do th

Re: [Intel-gfx] [PATCH 2/9] drm/i915: Add per-pipe plane identifier

2016-11-18 Thread Ville Syrjälä
On Fri, Nov 18, 2016 at 12:17:06PM -0200, Paulo Zanoni wrote: > Em Qui, 2016-11-17 às 21:43 +0200, Ville Syrjälä escreveu: > > On Thu, Nov 17, 2016 at 05:09:38PM -0200, Paulo Zanoni wrote: > > > > > > Em Ter, 2016-11-08 às 16:47 +0200, ville.syrj...@linux.intel.com > > > escreveu: > > > > > > > >

Re: [Intel-gfx] [RFC PATCH] drm/i915: replace platform flags with a platform enum

2016-11-18 Thread Tvrtko Ursulin
On 18/11/2016 14:20, Jani Nikula wrote: The platform flags in device info are (mostly) mutually exclusive. Replace the flags with an enum. Add the platform enum also for platforms that previously didn't have a flag, and give them codename logging in dmesg. It just saddens me a bit that it prev

Re: [Intel-gfx] [RFC PATCH] drm/i915: replace platform flags with a platform enum

2016-11-18 Thread Chris Wilson
On Fri, Nov 18, 2016 at 04:20:32PM +0200, Jani Nikula wrote: > The platform flags in device info are (mostly) mutually > exclusive. Replace the flags with an enum. Add the platform enum also > for platforms that previously didn't have a flag, and give them codename > logging in dmesg. > > Pineview

Re: [Intel-gfx] [PATCH 8/9] drm/i915: Rename the local 'plane' variable to 'plane_id' in primary plane code

2016-11-18 Thread Paulo Zanoni
Em Ter, 2016-11-08 às 16:47 +0200, ville.syrj...@linux.intel.com escreveu: > From: Ville Syrjälä > > Now we've rename the local plane id variable as 'plane_id' everywhere > except the pre-SKL primary plane code. Let's do the rename there as > well > so that we'll free up the name 'plane' for use

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Complete requests in nop_submit_request

2016-11-18 Thread Tvrtko Ursulin
On 18/11/2016 13:33, Chris Wilson wrote: On Fri, Nov 18, 2016 at 03:03:21PM +0200, Mika Kuoppala wrote: Tvrtko Ursulin writes: On 18/11/2016 09:37, Chris Wilson wrote: Since the submit/execute split in commit d55ac5bf97c6 ("drm/i915: Defer transfer onto execution timeline to actual hw submi

[Intel-gfx] [RFC PATCH] drm/i915: replace platform flags with a platform enum

2016-11-18 Thread Jani Nikula
The platform flags in device info are (mostly) mutually exclusive. Replace the flags with an enum. Add the platform enum also for platforms that previously didn't have a flag, and give them codename logging in dmesg. Pineview remains an exception, the platform being G33 for that. Signed-off-by: J

Re: [Intel-gfx] [PATCH] drm/i915: Do not log disabled planes in pipe config

2016-11-18 Thread Ville Syrjälä
On Fri, Nov 18, 2016 at 03:13:14PM +0100, Maarten Lankhorst wrote: > Op 18-11-16 om 12:40 schreef Tvrtko Ursulin: > > From: Tvrtko Ursulin > > > > It just says "plane X disabled" which does not seem very useful. > > > > Signed-off-by: Tvrtko Ursulin > > Cc: Maarten Lankhorst > > Cc: Ville Syrjäl

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Update CRTC state if connector link status property changed

2016-11-18 Thread Maarten Lankhorst
Op 18-11-16 om 15:11 schreef Ville Syrjälä: > On Fri, Nov 18, 2016 at 02:50:52PM +0100, Maarten Lankhorst wrote: >> Op 18-11-16 om 08:13 schreef Manasi Navare: >>> CRTC state connector_changed needs to be set to true >>> if connector link status property has changed. This will tell the >>> driver t

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