On Wed, Nov 09, 2016 at 11:11:07AM -0800, Anusha Srivatsa wrote:
> Replace i915.enable_guc_loading and i915.enable_guc_submission
> with a single parameter - i915.enable_guc. Where:
>
> -1 : Platform default (Only load GuC)
> 0 : Do not use GuC
> 1 : Load GuC, do not use Command Submission through
Reviewed-by: Jeff McGee
On Thu, Nov 10, 2016 at 04:15:18PM -0800, Anusha Srivatsa wrote:
> This patch adds the support to load HuC on KBL
> Version 2.0
>
> Cc: Jeff Mcgee
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/intel_huc_loader.c | 15 ++-
> 1 file changed, 1
Reviewed-by: Jeff McGee
On Thu, Nov 10, 2016 at 04:15:17PM -0800, Anusha Srivatsa wrote:
> This patch adds the HuC Loading for the BXT by using
> the updated file construction.
>
> Version 1.7 of the HuC firmware.
>
> Cc: Jeff Mcgee
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i9
On Fri, Nov 11, 2016 at 06:05:34PM -0800, Jeff McGee wrote:
> On Thu, Nov 10, 2016 at 04:15:16PM -0800, Anusha Srivatsa wrote:
> > From: Peter Antoine
> >
> > The HuC loading process is similar to GuC. The intel_uc_fw_fetch()
> > is used for both cases.
> >
> > HuC loading needs to be before GuC
On Thu, Nov 10, 2016 at 04:15:16PM -0800, Anusha Srivatsa wrote:
> From: Peter Antoine
>
> The HuC loading process is similar to GuC. The intel_uc_fw_fetch()
> is used for both cases.
>
> HuC loading needs to be before GuC loading. The WOPCM setting must
> be done early before loading any of the
== Series Details ==
Series: drm: move allocation out of drm_get_format_name() (rev4)
URL : https://patchwork.freedesktop.org/series/14873/
State : success
== Summary ==
Series 14873v4 drm: move allocation out of drm_get_format_name()
https://patchwork.freedesktop.org/api/1.0/series/14873/revi
The function's behaviour was changed in 90844f00049e, without changing
its signature, causing people to keep using it the old way without
realising they were now leaking memory.
Rob Clark also noticed it was also allocating GFP_KERNEL memory in
atomic contexts, breaking them.
Instead of having to
On 9 November 2016 at 16:16, Robert Bragg wrote:
> OACONTROL is no longer white listed in the command parser so this checks
> at attempted LRI will be disallowed and (more importantly) checks that
> userspace doesn't get an EINVAL error for an attempted OACONTROL LRI.
> This is important becase Me
On 9 November 2016 at 16:16, Robert Bragg wrote:
> This combines some parts of the recently added store_lri test with the
> registers test to be able to first load a distinguishable value before
> the LRI and explicitly read back the register to determine if the
> command succeeded or was a NOOP.
On 9 November 2016 at 16:16, Robert Bragg wrote:
> This updates the checking of disallowed loads to set a distinguishable
> value before the load and explicitly check the load was a NOOP by
> reading back the final value.
>
> Signed-off-by: Robert Bragg
> ---
> tests/gem_exec_parse.c | 20 ++
On 9 November 2016 at 16:15, Robert Bragg wrote:
> Since an access violation won't return an error to userspace for v >= 8
> of the command parser this updates the cmd-crossing-page test to
> explicitly read back from SO_WRITE_OFFSET[0] to see that the command
> wasn't squashed to a NOOP.
>
> Sign
On 9 November 2016 at 16:15, Robert Bragg wrote:
> With v8 of the command parser (where we won't get an EINVAL for an
> access violation) this updates the bitmasks test to explicitly confirm
> that the command became a NOOP by reading back from where the QW_WRITE
> would have otherwise landed.
>
>
On 9 November 2016 at 16:15, Robert Bragg wrote:
> This limits testing the oacontrol tracking (required pairing of oa
> enable/disable per batch buffer) to version <= 8 of the command parser.
>
> Version 9 of the command parser removes all special handling for
> OACONTROL which is now going to be
On 9 November 2016 at 16:15, Robert Bragg wrote:
> This generalises hsw_load_register_reg to loop through an array of
> allowed and disallowed registers and to use the exec_batch[_patched]
> utilities.
>
> Signed-off-by: Robert Bragg
> ---
> tests/gem_exec_parse.c | 139
> ++
On 9 November 2016 at 16:15, Robert Bragg wrote:
> No functional change, just moving hsw_load_regster_reg test code down
s/regster/register
> below the execbuf utilities in preparation for updating to use them.
>
> Signed-off-by: Robert Bragg
Reviewed-by: Matthew Auld
___
On 9 November 2016 at 16:15, Robert Bragg wrote:
> This normalizes the execbuf utilities in this file to all use memset to
> clear obj, reloc and execbuf structures and set them up in the same
> order. As I was debugging some unpredictable test failures I was getting
> unsure that all these struct
On Mon, Nov 07, 2016 at 04:27:30PM -0800, Dhinakaran Pandiyan wrote:
> Hotplugging a monitor in DP MST configuration triggers short pulses.
> Although the short pulse handling path ends up in the MST hotplug function,
> we do not perform a detect before sending the hotplug uvent. This leads to
> th
On Fri, Nov 11, 2016 at 08:43:53PM +, Pandiyan, Dhinakaran wrote:
> On Tue, 2016-11-08 at 13:04 +0200, Ville Syrjälä wrote:
> > On Mon, Nov 07, 2016 at 04:27:30PM -0800, Dhinakaran Pandiyan wrote:
> > > Hotplugging a monitor in DP MST configuration triggers short pulses.
> > > Although the shor
Em Sex, 2016-11-11 às 22:24 +0200, Ville Syrjälä escreveu:
> On Fri, Nov 11, 2016 at 05:57:28PM -0200, Paulo Zanoni wrote:
> >
> > Em Sex, 2016-11-11 às 21:13 +0200, Ville Syrjälä escreveu:
> > >
> > > On Fri, Nov 11, 2016 at 05:01:54PM -0200, Paulo Zanoni wrote:
> > > >
> > > >
> > > > Em Sex,
On Tue, 2016-11-08 at 13:04 +0200, Ville Syrjälä wrote:
> On Mon, Nov 07, 2016 at 04:27:30PM -0800, Dhinakaran Pandiyan wrote:
> > Hotplugging a monitor in DP MST configuration triggers short pulses.
> > Although the short pulse handling path ends up in the MST hotplug function,
> > we do not perfo
On Fri, 2016-11-11 at 19:41 +0200, Ville Syrjälä wrote:
> On Wed, Nov 09, 2016 at 09:32:30PM -0800, Dhinakaran Pandiyan wrote:
> > Not validating the the mode rate against link rate results not pruning
> > invalid modes. For e.g, HBR2 5.4 Gpbs 2 lane configuration does not
> > support 4k @ 60Hz. Bu
On Fri, 2016-11-11 at 15:39 +0200, Ville Syrjälä wrote:
> On Wed, Nov 09, 2016 at 09:32:29PM -0800, Dhinakaran Pandiyan wrote:
> > We store DP link rates as link clock frequencies in kHz, just like all
> > other clock values. But, DP link rates in the DP Spec are expressed in
> > Gbps/lane, which s
On Thu, Nov 10, 2016 at 10:28 AM, Ben Widawsky
wrote:
>
> From: Ben Widawsky
>
> Signed-off-by: Ben Widawsky
> ---
> intel/intel_chipset.h | 13 ++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> index 514f659..41fc0
On Fri, Nov 11, 2016 at 05:57:28PM -0200, Paulo Zanoni wrote:
> Em Sex, 2016-11-11 às 21:13 +0200, Ville Syrjälä escreveu:
> > On Fri, Nov 11, 2016 at 05:01:54PM -0200, Paulo Zanoni wrote:
> > >
> > > Em Sex, 2016-11-11 às 20:51 +0200, Ville Syrjälä escreveu:
> > > >
> > > > On Fri, Nov 11, 2016
Em Sex, 2016-11-11 às 21:13 +0200, Ville Syrjälä escreveu:
> On Fri, Nov 11, 2016 at 05:01:54PM -0200, Paulo Zanoni wrote:
> >
> > Em Sex, 2016-11-11 às 20:51 +0200, Ville Syrjälä escreveu:
> > >
> > > On Fri, Nov 11, 2016 at 02:57:40PM -0200, Paulo Zanoni wrote:
> > > >
> > > >
> > > > Ville p
In case of link training failure and requiring user space to set a lower mode,
would full mode set address it? How do we make user mode select lower
resolution?
For example 4k@60Hz monitor, and link training at 4 lane HBR2 fails and
fallback to 4 lanes HBR, 4k@60 is no longer doable. I would
On Fri, Nov 11, 2016 at 05:01:54PM -0200, Paulo Zanoni wrote:
> Em Sex, 2016-11-11 às 20:51 +0200, Ville Syrjälä escreveu:
> > On Fri, Nov 11, 2016 at 02:57:40PM -0200, Paulo Zanoni wrote:
> > >
> > > Ville pointed out that intel_fbc_choose_crtc() is iterating over
> > > all
> > > planes instead o
Em Sex, 2016-11-11 às 20:51 +0200, Ville Syrjälä escreveu:
> On Fri, Nov 11, 2016 at 02:57:40PM -0200, Paulo Zanoni wrote:
> >
> > Ville pointed out that intel_fbc_choose_crtc() is iterating over
> > all
> > planes instead of just the primary planes. There are no real
> > consequences of this prob
On Fri, Nov 11, 2016 at 02:57:40PM -0200, Paulo Zanoni wrote:
> Ville pointed out that intel_fbc_choose_crtc() is iterating over all
> planes instead of just the primary planes. There are no real
> consequences of this problem for HSW+, and for the other platforms it
> just means that in some obscu
On Fri, Nov 11, 2016 at 05:46:16PM +, Chris Wilson wrote:
> On Fri, Nov 11, 2016 at 02:57:36PM -0200, Paulo Zanoni wrote:
> > Much simpler. Thanks to Ville for pointing this.
> >
> > Cc: Ville Syrjälä
> > Reported-by: Ville Syrjälä
> > Signed-off-by: Paulo Zanoni
> > ---
> > drivers/gpu/dr
Alright, quick question: should we be going with your branch then or
mine?
On Wed, 2016-11-09 at 16:09 +0100, Tomeu Vizoso wrote:
> Hi Lyude,
>
> I think this looks very good.
>
> On 8 November 2016 at 01:05, Lyude wrote:
> >
> >
> > - While writing this patch series, I found that quite a fe
On Thu, Nov 10, 2016 at 03:36:34PM +0200, Joonas Lahtinen wrote:
> Update i915_driver_load kerneldoc to match code.
>
> Cc: Chris Wilson
> Signed-off-by: Joonas Lahtinen
Reviewed-by: Chris Wilson
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_
On Fri, Nov 11, 2016 at 02:57:36PM -0200, Paulo Zanoni wrote:
> Much simpler. Thanks to Ville for pointing this.
>
> Cc: Ville Syrjälä
> Reported-by: Ville Syrjälä
> Signed-off-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_fbc.c | 17 +++--
> 1 file changed, 7 insertions(+),
== Series Details ==
Series: drm/i915: Assuming non-DP++ port if dvo_port is HDMI and there's no AUX
ch specified in the VBT
URL : https://patchwork.freedesktop.org/series/15187/
State : success
== Summary ==
Series 15187v1 drm/i915: Assuming non-DP++ port if dvo_port is HDMI and there's
no
On Fri, Nov 11, 2016 at 02:57:39PM -0200, Paulo Zanoni wrote:
> Use drm_atomic_get_existing_crtc_state() instead of looping through
> the CRTC states and checking if the FBC CRTC is there.
>
> Signed-off-by: Paulo Zanoni
Reviewed-by: Chris Wilson
-Chris
--
Chris Wilson, Intel Open Source Techn
On Wed, Nov 09, 2016 at 09:32:30PM -0800, Dhinakaran Pandiyan wrote:
> Not validating the the mode rate against link rate results not pruning
> invalid modes. For e.g, HBR2 5.4 Gpbs 2 lane configuration does not
> support 4k @ 60Hz. But, we do not reject this mode currently.
>
> So, make use of th
On Fri, Nov 11, 2016 at 02:57:37PM -0200, Paulo Zanoni wrote:
> Extract that part of the code to a new function and call this function
> only once during intel_fbc_choose_crtc() instead of once per plane.
> Those checks are independent from planes/CRTCs.
>
> Signed-off-by: Paulo Zanoni
Reviewed-b
On Fri, Nov 11, 2016 at 02:57:35PM -0200, Paulo Zanoni wrote:
> We can just call it earlier, so do it. The goal of the loop is to get
> the plane's CRTC state, and we don't need it in order to call
> intel_fbc_can_choose().
>
> Signed-off-by: Paulo Zanoni
Reviewed-by: Chris Wilson
-Chris
--
Ch
On Fri, Nov 11, 2016 at 02:57:38PM -0200, Paulo Zanoni wrote:
> It only has two checks now, so it makes sense to just move the code to
> the caller.
>
> Also take this opportunity to make no_fbc_reason make more sense: now
> we'll only list "no suitable CRTC for FBC" instead of maybe giving a
> re
On Fri, Nov 11, 2016 at 02:57:41PM -0200, Paulo Zanoni wrote:
> Because it's shorter, easier to read, newer and cooler. And I don't
> think anybody else has pending FBC patches right now, so the conflicts
> should be minimal.
>
> Signed-off-by: Paulo Zanoni
Reviewed-by: Chris Wilson
-Chris
--
On Mon, Nov 07, 2016 at 04:27:30PM -0800, Dhinakaran Pandiyan wrote:
> Hotplugging a monitor in DP MST configuration triggers short pulses.
> Although the short pulse handling path ends up in the MST hotplug function,
> we do not perform a detect before sending the hotplug uvent. This leads to
> th
== Series Details ==
Series: FBC atomic cleanups
URL : https://patchwork.freedesktop.org/series/15185/
State : warning
== Summary ==
Series 15185v1 FBC atomic cleanups
https://patchwork.freedesktop.org/api/1.0/series/15185/revisions/1/mbox/
Test kms_force_connector_basic:
Subgroup pru
From: Ville Syrjälä
My heuristic for detecting type 1 DVI DP++ adaptors based on the VBT
port information apparently didn't survive the reality of buggy VBTs.
In this particular case we have a machine with a natice HDMI port, but
the VBT telsl us it's a DP++ port based on its capabilities.
The d
Because it's shorter, easier to read, newer and cooler. And I don't
think anybody else has pending FBC patches right now, so the conflicts
should be minimal.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 26 +-
1 file changed, 13 insertions(+), 13 del
Extract that part of the code to a new function and call this function
only once during intel_fbc_choose_crtc() instead of once per plane.
Those checks are independent from planes/CRTCs.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 14 --
1 file changed, 12 inse
Ville pointed out two ugly defects in the FBC code, and while trying
to fix them I spotted a few extra things. No real-world bugs fixed
here, but IMHO the code is much easier to read now.
Paulo Zanoni (7):
drm/i915/fbc: move the intel_fbc_can_choose() call out of the loop
drm/i915/fbc: replace
It only has two checks now, so it makes sense to just move the code to
the caller.
Also take this opportunity to make no_fbc_reason make more sense: now
we'll only list "no suitable CRTC for FBC" instead of maybe giving a
reason why the last CRTC we checked was not selected, and we'll more
consist
Use drm_atomic_get_existing_crtc_state() instead of looping through
the CRTC states and checking if the FBC CRTC is there.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/in
We can just call it earlier, so do it. The goal of the loop is to get
the plane's CRTC state, and we don't need it in order to call
intel_fbc_can_choose().
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/d
Ville pointed out that intel_fbc_choose_crtc() is iterating over all
planes instead of just the primary planes. There are no real
consequences of this problem for HSW+, and for the other platforms it
just means that in some obscure multi-screen cases we'll keep FBC
disabled when we could have enabl
Much simpler. Thanks to Ville for pointing this.
Cc: Ville Syrjälä
Reported-by: Ville Syrjälä
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/d
On Fri, Nov 11, 2016 at 04:21:58PM +, Cheng, Tony wrote:
> For HDMI, you can yank the cable, plug back in, HDMI will light up without
> user mode or kernel mode doing anything.
>
> For DP this is not possible, someone will have to retrain the link when
> plugging back in or DP will not light
For HDMI, you can yank the cable, plug back in, HDMI will light up without user
mode or kernel mode doing anything.
For DP this is not possible, someone will have to retrain the link when
plugging back in or DP will not light up. We see that on Ubuntu if someone
unplug display and plug it back
On Fri, Nov 11, 2016 at 07:41:10PM +0200, Abdiel Janulgue wrote:
> A lot of igt testcases need some GPU workload to make sure a race
> window is big enough. Unfortunately having a fixed amount of
> workload leads to spurious test failures or overtly long runtimes
> on some fast/slow platforms. This
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Only wait upon the execution
timeline when unlocked
URL : https://patchwork.freedesktop.org/series/15171/
State : success
== Summary ==
Series 15171v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/ser
On Fri, Nov 11, 2016 at 03:37:04PM +0200, Jani Nikula wrote:
> On Fri, 11 Nov 2016, Daniel Vetter wrote:
> > Joonas rightly complained that the current output is useless and just
> > confuses.
> >
> > Cc: Joonas Lahtinen
> > Signed-off-by: Daniel Vetter
> > ---
> > dim | 6 --
> > 1 file ch
Hi!
I'm currently trying to enable the 2nd display on our Bay Trail
Atom E3845 SoC. This is on the Congatec SoM "conga-QA3":
http://www.congatec.com/en/products/qseven/conga-qa3.html
On this SoM, the eDP is converted to LVDS via an NXP PTN3460
and available as LVDS on the baseboard. My current s
On Fri, Nov 11, 2016 at 11:41:22AM +0200, Jani Nikula wrote:
> On Thu, 10 Nov 2016, Daniel Vetter wrote:
> > On Wed, Nov 09, 2016 at 08:42:08PM -0800, Manasi Navare wrote:
> >> @@ -5692,6 +5751,39 @@ static bool intel_edp_init_connector(struct
> >> intel_dp *intel_dp,
> >>return false;
> >>
Hi Ander,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-2016]
[cannot apply to v4.9-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ander-Conselvan
On Fri, Nov 11, 2016 at 04:08:26PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 10, 2016 at 09:58:31PM +0100, Daniel Vetter wrote:
> > On Wed, Nov 09, 2016 at 08:42:08PM -0800, Manasi Navare wrote:
> > > @@ -5692,6 +5751,39 @@ static bool intel_edp_init_connector(struct
> > > intel_dp *intel_dp,
> >
Hi Ander,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-2016]
[cannot apply to v4.9-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ander-Conselvan
== Series Details ==
Series: Compact userptr object backing store allocation (rev5)
URL : https://patchwork.freedesktop.org/series/15151/
State : success
== Summary ==
Series 15151v5 Compact userptr object backing store allocation
https://patchwork.freedesktop.org/api/1.0/series/15151/revision
On Thu, Nov 10, 2016 at 10:35:09AM -0600, Pierre-Louis Bossart wrote:
> On 11/9/16 7:19 AM, Mark Brown wrote:
> > None of which is at all unusal. The Intel hardware really doesn't seem
> > like the sort of special snowflake that people appear to believe it to
> > be.
> I am not sure if this repl
On 10/11/2016 09:42, Tvrtko Ursulin wrote:
On 09/11/2016 12:45, Patchwork wrote:
== Series Details ==
Series: dev_priv cleanup continuation (rev3)
URL : https://patchwork.freedesktop.org/series/14844/
State : success
== Summary ==
Series 14844v3 dev_priv cleanup continuation
https://patchw
When we release the shmem backing storage, we make sure that the pages
are coherent with the cpu cache. However, our clflush routine was
skipping the flush as the object had no pages at release time. Fix this by
explicitly flushing the sg_table we are decoupling.
Fixes: 03ac84f1830e ("drm/i915: Pa
In order to walk the list of all timelines, we currently require the
struct_mutex. We are sometimes called prior to the struct_mutex being
taken by the caller (i.e !I915_WAIT_LOCKED) in which case we can only
trust the global execution timelines (as these are owned by the device).
This means in the
== Series Details ==
Series: Geminilake enabling (rev2)
URL : https://patchwork.freedesktop.org/series/15118/
State : success
== Summary ==
Series 15118v2 Geminilake enabling
https://patchwork.freedesktop.org/api/1.0/series/15118/revisions/2/mbox/
fi-bdw-5557u total:244 pass:229 dwarn:
Chris Wilson writes:
> On Fri, Nov 11, 2016 at 03:55:03PM +0200, Mika Kuoppala wrote:
>> Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
>> property. Make ctx param test to accept both variants for now
>> until kernel changes have landed, to not break BAT.
>>
>> v2: check ag
The goals here are multiple:
- simpler configuration through autodetection
- allows seamless upgrading to git worktree for the aux checkouts
- eventually I want to split up drm-misc into a separate remote ...
And yes this is just a start.
v2: Print errors to stderr, otherwise they can't be seen w
Joonas rightly complained that the current output is useless and just
confuses.
v2: Bikeshed stuff some more.
Cc: Joonas Lahtinen
Signed-off-by: Daniel Vetter
---
dim | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/dim b/dim
index 30aa8485e5
Needs new url-mapping information in nightly.conf to work properly. Only
leftover bit from my original patch after rebasing is to abstract away
the remote for the integration tree.
v2:
- Fix typo when calling rr_cache_dir. Oops.
- Use cut -f 1 instead of sed/regex horrors (jani).
v3: Fix bug that
When there's a working-tree checkout we need to remove that first,
before removing the branch. git complains otherwise. Not sure,
but this might be a recently added more strict test for the git
worktree support, at least I believe the "branch still checkout out
in $dir" warning is new-ish.
v2: Mov
If available by default. This saves quite a pile of disk-space that
imo making it the default is justified.
Note that this will break the rebuild-nightly script for now,
follow-up patches will fix that.
v2: Rebase to put the dim rework at the end of the series.
Signed-off-by: Daniel Vetter
---
The kernel expects that BOs for framebuffers with
I915_FORMAT_MOD_Yf_TILED will have I915_TILING_NONE.
Fixes: 050c00d53f39 ("lib: Pass I915_TILING_Y to the kernel if Yf or Ys")
Cc: Tvrtko Ursulin
Signed-off-by: Tomeu Vizoso
---
lib/ioctl_wrappers.c | 3 ++-
1 file changed, 2 insertions(+), 1 de
From: Tvrtko Ursulin
Drivers like i915 benefit from being able to control the maxium
size of the sg coallesced segment while building the scatter-
gather list.
Introduce and export the __sg_alloc_table_from_pages function
which will allow it that control.
v2: Reorder parameters. (Chris Wilson)
On Thu, Nov 10, 2016 at 09:58:31PM +0100, Daniel Vetter wrote:
> On Wed, Nov 09, 2016 at 08:42:08PM -0800, Manasi Navare wrote:
> > @@ -5692,6 +5751,39 @@ static bool intel_edp_init_connector(struct intel_dp
> > *intel_dp,
> > return false;
> > }
> >
> > +static void intel_dp_modeset_retry_
Mika Kuoppala writes:
> Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
> property. Make ctx param test to accept both variants for now
> until kernel changes have landed, to not break BAT.
>
The kernel parts are in:
https://cgit.freedesktop.org/~miku/drm-intel/log/?h=hangch
On Thu, Nov 10, 2016 at 06:51:40PM +, Cheng, Tony wrote:
> Amdgpu dal implementation will do a test link training at end of detection to
> verify we can achieve the capability reported in DPCD. We then report mode
> base on result of test training.
>
> AMD hardware (at least the generations
On Fri, Nov 11, 2016 at 03:55:03PM +0200, Mika Kuoppala wrote:
> Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
> property. Make ctx param test to accept both variants for now
> until kernel changes have landed, to not break BAT.
>
> v2: check against - EINVAL on get/set ban
== Series Details ==
Series: drm/i915/glk: Reuse broxton code for geminilake
URL : https://patchwork.freedesktop.org/series/15167/
State : failure
== Summary ==
make[4]: *** Waiting for unfinished jobs
LD drivers/usb/gadget/udc/udc-core.o
LD drivers/spi/built-in.o
LD d
On Fri, Nov 11, 2016 at 09:53:35AM +0100, Peter Frühberger wrote:
> Hi,
>
> I was implementing this suggestion today and I think that will confuse
> users and also devs maintaining that code. Out of the following reason:
> compress_color_range can be true or false, it does not reference a mode,
>
Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
property. Make ctx param test to accept both variants for now
until kernel changes have landed, to not break BAT.
v2: check against - EINVAL on get/set ban as it can return -EPERM
v3: better naming for get/set (Chris)
Cc: Chris
On Fri, Nov 11, 2016 at 02:19:36PM +0100, Stefan Roese wrote:
> Hi!
>
> I'm currently trying to enable the 2nd display on our Bay Trail
> Atom E3845 SoC. This is on the Congatec SoM "conga-QA3":
>
> http://www.congatec.com/en/products/qseven/conga-qa3.html
>
> On this SoM, the eDP is converted t
Resent with proper --in-reply-to . Please ignore.
On Fri, 2016-11-11 at 15:31 +0200, Ander Conselvan de Oliveira wrote:
> Geminilake is mostly backwards compatible with broxton, so change most
> of the IS_BROXTON() checks to IS_GEN9_LP(). Differences between the
> platforms will be implemented in
Geminilake is mostly backwards compatible with broxton, so change most
of the IS_BROXTON() checks to IS_GEN9_LP(). Differences between the
platforms will be implemented in follow-up patches.
v2: Don't reuse broxton's path in intel_update_max_cdclk().
Don't set plane count as in broxton.
v3: R
On Fri, Nov 11, 2016 at 03:23:49PM +0200, Joonas Lahtinen wrote:
> On to, 2016-11-10 at 17:36 +, Chris Wilson wrote:
> > In order to walk the list of all timelines, we currently require the
> > struct_mutex. We are sometimes called prior to the struct_mutex being
> > taken by the caller (i.e !I
On Thu, Nov 10, 2016 at 09:52:34PM +0530, Goel, Akash wrote:
>
>
> On 11/10/2016 11:06 AM, Hugh Dickins wrote:
> >On Fri, 4 Nov 2016, akash.g...@intel.com wrote:
> >>Cc: Hugh Dickins
> >>Cc: linux...@kvack.org
> >>Cc: linux-ker...@vger.linux.org
> >>Signed-off-by: Sourab Gupta
> >>Signed-off-by
On Wed, Nov 09, 2016 at 09:32:29PM -0800, Dhinakaran Pandiyan wrote:
> We store DP link rates as link clock frequencies in kHz, just like all
> other clock values. But, DP link rates in the DP Spec are expressed in
> Gbps/lane, which seems to have led to some confusion.
>
> E.g., for HBR2
> Max. d
On Fri, 11 Nov 2016, Daniel Vetter wrote:
> Joonas rightly complained that the current output is useless and just
> confuses.
>
> Cc: Joonas Lahtinen
> Signed-off-by: Daniel Vetter
> ---
> dim | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/dim b/dim
> index dcdc1
On Thu, 2016-11-10 at 09:03 -0800, Rodrigo Vivi wrote:
> Yep, it is probably better to merge Jani patch before while no platform
> is using that flag, but one way or another feel free to use:
Agreed. I'll send an updated version of the first two patches because of the
ddb_size that is wrong, so I
Geminilake is mostly backwards compatible with broxton, so change most
of the IS_BROXTON() checks to IS_GEN9_LP(). Differences between the
platforms will be implemented in follow-up patches.
v2: Don't reuse broxton's path in intel_update_max_cdclk().
Don't set plane count as in broxton.
v3: R
== Series Details ==
Series: Compact userptr object backing store allocation (rev4)
URL : https://patchwork.freedesktop.org/series/15151/
State : failure
== Summary ==
Series 15151v4 Compact userptr object backing store allocation
https://patchwork.freedesktop.org/api/1.0/series/15151/revision
Hi!
I'm currently trying to enable the 2nd display on our Bay Trail
Atom E3845 SoC. This is on the Congatec SoM "conga-QA3":
http://www.congatec.com/en/products/qseven/conga-qa3.html
On this SoM, the eDP is converted to LVDS via an NXP PTN3460
and available as LVDS on the baseboard. My current s
On to, 2016-11-10 at 17:36 +, Chris Wilson wrote:
> In order to walk the list of all timelines, we currently require the
> struct_mutex. We are sometimes called prior to the struct_mutex being
> taken by the caller (i.e !I915_WAIT_LOCKED) in which case we can only
> trust the global execution t
Joonas rightly complained that the current output is useless and just
confuses.
Cc: Joonas Lahtinen
Signed-off-by: Daniel Vetter
---
dim | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/dim b/dim
index dcdc19a9c82d..eba20509cda8 100755
--- a/dim
+++ b/dim
@@ -325,9 +325
On 11 November 2016 at 12:33, Tvrtko Ursulin
wrote:
>
> On 11/11/2016 11:23, Tomeu Vizoso wrote:
>>
>> On 11/10/2016 05:23 PM, Tvrtko Ursulin wrote:
>>>
>>>
>>> On 10/11/2016 13:17, Tomeu Vizoso wrote:
On 1 November 2016 at 16:44, Tvrtko Ursulin
wrote:
>
>
> Hi,
>
>
On to, 2016-11-10 at 17:03 -0800, Rodrigo Vivi wrote:
> According to Bspec we need to
> "Poll for PORT_REF_DW3_A grc_done == 1b"
> only on ports B and C initialization sequence when
> copying rcomp from port A.
>
> So let's follow the spec and only poll for that case
> and not on every port A init
On to, 2016-11-10 at 15:07 +, Chris Wilson wrote:
> When we release the shmem backing storage, we make sure that the pages
> are coherent with the cpu cache. However, our clflush routine was
> skipping the flush as the object had no pages at release time. Fix this by
> explicitly flushing the s
Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
property. Make ctx param test to accept both variants for now
until kernel changes have landed, to not break BAT.
v: check against - EINVAL on get/set ban as it can return -EPERM
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
-
On pe, 2016-11-11 at 11:47 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Split out i915_vma.c (rev4)
> URL : https://patchwork.freedesktop.org/series/15095/
> State : warning
>
> == Summary ==
>
> Series 15095v4 drm/i915: Split out i915_vma.c
> https://patchwork.freedesk
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