On 09/23/2016 12:05 PM, Daniel Vetter wrote:
Turns out assuming that only stuff in uabi is uabi is a bit naive, and
we have a bunch of properties for which the enum values are placed in
random headers. A proper fix would be to split out uapi include
headers, but meanwhile sprinkle at least some
On Fri, 23 Sep 2016, Daniel Vetter wrote:
> Turns out assuming that only stuff in uabi is uabi is a bit naive, and
> we have a bunch of properties for which the enum values are placed in
> random headers. A proper fix would be to split out uapi include
> headers, but meanwhile sprinkle at least so
Turns out assuming that only stuff in uabi is uabi is a bit naive, and
we have a bunch of properties for which the enum values are placed in
random headers. A proper fix would be to split out uapi include
headers, but meanwhile sprinkle at least some warning over them.
Fixes: 532b36712ddf ("drm/do
Patches are tested and passed. Thanks.
Regards,
Libin
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Thursday, September 22, 2016 3:45 PM
> To: Yang, Libin ; 'libin.y...@linux.intel.com'
> ; 'intel-gfx@lists.freedesktop.org' g...@lists.freedesktop.
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/drm_crtc.c
between commit:
6f00975c6190 ("drm: Reject page_flip for !DRIVER_MODESET")
from Linus' tree and commit:
43968d7b806d ("drm: Extract drm_plane.[hc]")
from the drm-misc tree.
I fixed it u
== Series Details ==
Series: SKL/KBL watermark fixes (rev3)
URL : https://patchwork.freedesktop.org/series/12082/
State : warning
== Summary ==
Series 12082v3 SKL/KBL watermark fixes
https://patchwork.freedesktop.org/api/1.0/series/12082/revisions/3/mbox/
Test gem_exec_gttfill:
Subgro
Now that this code is part of the compute stage we can return -EINVAL
to prevent the modeset instead of giving a WARN and trying anyway.
v2:
- Fix typo (Paul Menzel).
- Add MISSING_CASE() (Ville, Maarten).
Reported-by: Lyude
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
---
dri
The confusing thing is that plane_blocks_per_line is listed as part of
the method 2 calculation but is also used for other things. We
calculated it in two different places and different ways: one inside
skl_wm_method2() and the other inside skl_compute_plane_wm(). The
skl_wm_method2() implementatio
This should affect linear and X tiled planes on really small htotal
cases. It doesn't seem to be a very feasible case, but let's implement
it since it's on the specification and it's better to have it and
never need than not have it and realize we needed it.
Reviewed-by: Lyude
Reviewed-by: Maarte
We forgot the "res_blocks += y_tile_minimum" that's described on step
V of our documentation.
Again, this should only affect the Y tiling cases.
It looks like the relevant code was introduced in 0fda65680e92, but
there's always the possibility that it matched our specification when
it was introdu
During watermarks calculations, this value is used in 3 different
places. Only one of them was not using a hardcoded 4. Move the code up
so everybody can benefit from the actual value.
This should only help on situations with Y tiling + 90/270 rotation +
1 or 2 bpp or NV12.
Cc: sta...@vger.kernel
Bspec says:
"The mailbox response data may not account for memory read latency.
If the mailbox response data for level 0 is 0us, add 2 microseconds
to the result for each valid level."
This means we should only do the +2 in case wm[0] == 0, not always.
So split the sanitizing implementati
The plan is to introduce intel_has_sagv() and then use it to discover
which platforms actually support it.
I thought about keeping the functions with their current skl names,
but found two problems: (i) skl_has_sagv() would become a very
confusing name, and (ii) intel_atomic_commit_tail() doesn't
According to BSpec, it's the "core CPUs" that need the code, which
means SKL and KBL, but not BXT.
I don't have a KBL to test this patch on it.
v2: Only SKL should have I915_SAGV_NOT_CONTROLLED.
Cc: sta...@vger.kernel.org
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
---
drivers/
What's different from v2?
- Added cc:stable tags for patches 1-7, as discussed with Jani.
- Added r-b tags provided by Maarten (email on v1, IRC on v2).
- Only patch 9 changed: fix a typo and add a MISSING_CASE().
Since every patch already has a R-B tag, if no one complains I'll just
push the s
And use it to move knowledge about the SAGV-supporting platforms from
the callers to the SAGV code.
We'll add more platforms to intel_has_sagv(), so IMHO it makes more
sense to move all this to a single function instead of patching all
the callers every time we add SAGV support to a new platform.
Em Qua, 2016-09-14 às 09:40 +0100, ch...@chris-wilson.co.uk escreveu:
> On Tue, Sep 13, 2016 at 03:21:48PM +0300, Mika Kuoppala wrote:
> >
> > Mika Kuoppala writes:
> > >
> > > "Zanoni, Paulo R" writes:
> > > >
> > > > >
> > > > > +#if IS_ENABLED(CONFIG_LOCKDEP)
> > > > > + GEM_BUG_ON(!!l
Hello Imre,
Sorry, it took me some time to come back, suspend resume was broken for us, it
just got fixed, and I could test the LSPCON code with Android APL.
I am not able to reproduce this issue on Android APL board.
I tried to reproduce this issue on APL + Ubuntu-Linux, but I am not able to
>
> > From: Zanoni, Paulo R
> > Em Sex, 2016-09-16 às 16:59 +0300, Jani Nikula escreveu:
> > > Only production steppings are supported, drop workarounds for
> > > anything else. The series is split by revision so we can bikeshed if
> > > there are steppings some people still need to use for some r
On Wed, 2016-09-21 at 18:00 -0300, Paulo Zanoni wrote:
> Em Qua, 2016-09-21 às 11:22 -0700, Rodrigo Vivi escreveu:
> > Avoid any kind of GuC handling if GuC is not supported
> > on a giving platform.
> >
> > Besides being useless handling, our driver needs
> > to be smarter than the user trying to
Patch merged to dinq.
Thanks for the patch
On Wed, Sep 21, 2016 at 1:02 PM, Dhinakaran Pandiyan
wrote:
> From: "Pandiyan, Dhinakaran"
>
> DP MST provides the capability to send multiple video and audio streams
> through a single port. This requires the API's between i915 and audio
> drivers to
Series merged to dinq.
Thanks for the patches
On Mon, Sep 19, 2016 at 6:11 PM Dhinakaran Pandiyan <
dhinakaran.pandi...@intel.com> wrote:
> This series lays the groundwork for more DP MST audio work that will
> follow.
>
> v7:
> Added R-B tags and rebased.
>
> v6:
> Modified the return type for a
== Series Details ==
Series: drm: Convert prime dma-buf <-> handle to rhashtable
URL : https://patchwork.freedesktop.org/series/12787/
State : warning
== Summary ==
Series 12787v1 drm: Convert prime dma-buf <-> handle to rhashtable
https://patchwork.freedesktop.org/api/1.0/series/12787/revisio
== Series Details ==
Series: drm/i915: don't report compression when fbc disabled
URL : https://patchwork.freedesktop.org/series/12768/
State : success
== Summary ==
Series 12768v1 drm/i915: don't report compression when fbc disabled
https://patchwork.freedesktop.org/api/1.0/series/12768/revis
> From: Zanoni, Paulo R
> Em Sex, 2016-09-16 às 16:59 +0300, Jani Nikula escreveu:
> > Only production steppings are supported, drop workarounds for
> > anything
> > else. The series is split by revision so we can bikeshed if there are
> > steppings some people still need to use for some reason.
>
Currently we use a linear walk to lookup a handle and return a dma-buf,
and vice versa. A long overdue TODO task is to convert that to a
hashtable. Since the initial implementation of dma-buf/prime, we now
have resizeable hashtables we can use (and now a future task is to RCU
enable the lookup!).
On Thu, 22 Sep 2016, "Yang, Libin" wrote:
> Hi Jani,
>
> Thanks a lot for your help on reviewing and refining these patches. I
> will test your patches and let you know the result.
Thanks. Review is also much appreciated! ;)
BR,
Jani.
>
> Regards,
> Libin
>
>
>> -Original Message-
>> Fr
Hi,
On Thursday 22 September 2016 01:53 AM, Paulo Zanoni wrote:
Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu:
From: Mahesh Kumar
It implements the WA to enable IDLE_WAKEMEM bit of CHICKEN_DCPR_1
register for Broxton platform. When IPC is enabled & Y-tile is
enabled in any of the
On Tue, Sep 20, 2016 at 12:58:20PM +0300, Jani Nikula wrote:
> On Tue, 20 Sep 2016, Chris Wilson wrote:
> > On Tue, Sep 20, 2016 at 11:57:06AM +0300, Jani Nikula wrote:
> >> On Mon, 19 Sep 2016, Joonas Lahtinen
> >> wrote:
> >> > On to, 2016-09-15 at 16:28 +0300, Jani Nikula wrote:
> >> >> Fix s
Export a set of interfaces to allow the caller to have precise control
over mapping the buffer - but still provide caching of the mmaps between
callers.
Signed-off-by: Chris Wilson
---
intel/intel_bufmgr.h | 4 ++
intel/intel_bufmgr_gem.c | 154 +
Walking a linear list to find a matching PRIME handle or flinked name
does not scale and becomes a major burden with just a few objects.
References: https://bugs.freedesktop.org/show_bug.cgi?id=94631
Signed-off-by: Chris Wilson
---
intel/intel_bufmgr_gem.c | 127 +++--
Hi Jani,
Thanks a lot for your help on reviewing and refining these patches. I will test
your patches and let you know the result.
Regards,
Libin
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Thursday, September 22, 2016 2:40 AM
> To: Yang, Libin
Hi,
On Thursday 22 September 2016 12:02 AM, Paulo Zanoni wrote:
Hi
Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu:
From: Mahesh Kumar
First of all, good catch with this patch!
This patch changes Watermak calculation to fixed point calculation.
Problem with current calculation i
Hi,
On Thursday 22 September 2016 01:36 AM, Paulo Zanoni wrote:
Hi
Lots of nitpicking in my review. Feel free to disagree with them.
Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu:
From: Mahesh Kumar
This patch adds IPC support for platforms. This patch enables IPC
only for BXT
On Thu, 22 Sep 2016, Daniel Vetter wrote:
> On Tue, Sep 20, 2016 at 12:58:20PM +0300, Jani Nikula wrote:
>> On Tue, 20 Sep 2016, Chris Wilson wrote:
>> > On Tue, Sep 20, 2016 at 11:57:06AM +0300, Jani Nikula wrote:
>> >> On Mon, 19 Sep 2016, Joonas Lahtinen
>> >> wrote:
>> >> > On to, 2016-09-1
We just removed the implementation for all the pre-production
workarounds, so now tell the user that we expect his machine to not
work properly. Also convert this to DRM_ERROR so we can more easily
spot these problems in bug reports and CI/QA runs.
Cc: Jani Nikula
Signed-off-by: Paulo Zanoni
---
Hi,
On Monday 19 September 2016 11:54 PM, Zanoni, Paulo R wrote:
Em Seg, 2016-09-19 às 15:19 -0300, Paulo Zanoni escreveu:
Em Sex, 2016-09-09 às 13:30 +0530, Kumar, Mahesh escreveu:
From: Mahesh Kumar
This patch make changes to use linetime latency instead of
allocated
DDB size during plane
when i915_fbc_status is read while fbc is disabled,
it reports compressing to be true, which is confusing.
report compressing only when fbc is enabled.
Signed-off-by: vathsala nagaraju
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/d
Em Sex, 2016-09-16 às 16:59 +0300, Jani Nikula escreveu:
> Only production steppings are supported, drop workarounds for
> anything
> else. The series is split by revision so we can bikeshed if there are
> steppings some people still need to use for some reason.
Bikeshed: in patches 2 and 3 you co
On Thu, 22 Sep 2016, Jani Nikula wrote:
> On Thu, 22 Sep 2016, "Yang, Libin" wrote:
>> Hi Jani,
>>
>> Thanks a lot for your help on reviewing and refining these patches. I
>> will test your patches and let you know the result.
>
> Thanks. Review is also much appreciated! ;)
Also #2, please have
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Thursday, September 22, 2016 3:45 PM
> To: Yang, Libin ; 'libin.y...@linux.intel.com'
> ; 'intel-gfx@lists.freedesktop.org' g...@lists.freedesktop.org>; 'ville.syrj...@linux.intel.com'
> ; Vetter, Daniel
Em Qui, 2016-09-22 às 15:13 +0530, Mahesh Kumar escreveu:
> Hi,
>
>
> On Thursday 22 September 2016 01:53 AM, Paulo Zanoni wrote:
> >
> > Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu:
> > >
> > > From: Mahesh Kumar
> > >
> > > It implements the WA to enable IDLE_WAKEMEM bit of CH
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