[Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [1/4] drm/i915: Record the position of the start of the request

2016-08-06 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Record the position of the start of the request URL : https://patchwork.freedesktop.org/series/10758/ State : failure == Summary == Series 10758v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/1075

[Intel-gfx] [PATCH 4/4] drm/i915: Separate out reset flags from the reset counter

2016-08-06 Thread Chris Wilson
In preparation for introducing a per-engine reset, we can first separate the mixing of the reset state from the global reset counter. The loss of atomicity in updating the reset state poses a small problem for handling the waiters. For requests, this is solved by advancing the seqno so that a wait

[Intel-gfx] [PATCH 1/4] drm/i915: Record the position of the start of the request

2016-08-06 Thread Chris Wilson
Not only does it make for good documentation and debugging aide, but it is also vital for when we want to unwind requests - such as when throwing away an incomplete request. Signed-off-by: Chris Wilson Link: http://patchwork.freedesktop.org/patch/msgid/1470414607-32453-2-git-send-email-arun.silu

[Intel-gfx] [PATCH 3/4] drm/i915: Update reset path to fix incomplete requests

2016-08-06 Thread Chris Wilson
Update reset path in preparation for engine reset which requires identification of incomplete requests and associated context and fixing their state so that engine can resume correctly after reset. The request that caused the hang will be skipped and head is reset to the start of breadcrumb. This

[Intel-gfx] [PATCH 2/4] drm/i915: Simplify ELSP queue request tracking

2016-08-06 Thread Chris Wilson
Emulate HW to track and manage ELSP queue. A set of SW ports are defined and requests are assigned to these ports before submitting them to HW. This helps in cleaning up incomplete requests during reset recovery easier especially after engine reset by decoupling elsp queue management. This will bec

[Intel-gfx] Per-engine reset, preliminary recovery patches

2016-08-06 Thread Chris Wilson
Before we get into the fine-grained TDR driven, per-engine reset, we want to have a solid base for doing the recovery. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] sandy bridge pch FDI C confusion

2016-08-06 Thread cinap_lenrek
Reading the Sandy Bridge documentation, on the PCH it lists 3 FDI receiver control registers (A,B,C): https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part3b_register_offsets.pdf But on the CPU side, FDI_TX_* seems undocumented but according to the linux driver, sandy bridge only

[Intel-gfx] sandy bridge pch FDI C confusion

2016-08-06 Thread cinap_lenrek
Reading the Sandy Bridge documentation, on the PCH it lists 3 FDI receiver control registers (A,B,C): https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part3b_register_offsets.pdf But on the CPU side, FDI_TX_* seems undocumented but according to the linux driver, sandy bridge only

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add smp_rmb() to busy ioctl's RCU dance

2016-08-06 Thread Chris Wilson
On Fri, Aug 05, 2016 at 10:13:22PM +0100, Chris Wilson wrote: > In the debate as to whether the second read of active->request is > ordered after the dependent reads of the first read of active->request, > just give in and throw a smp_rmb() in there so that ordering of loads is > assured. > > v2:

[Intel-gfx] ✗ Ro.CI.BAT: failure for Finally fix watermarks (rev5)

2016-08-06 Thread Patchwork
== Series Details == Series: Finally fix watermarks (rev5) URL : https://patchwork.freedesktop.org/series/10276/ State : failure == Summary == Series 10276v5 Finally fix watermarks http://patchwork.freedesktop.org/api/1.0/series/10276/revisions/5/mbox Test drv_module_reload_basic:

[Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [1/2] drm/i915: Add smp_rmb() to busy ioctl's RCU dance

2016-08-06 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Add smp_rmb() to busy ioctl's RCU dance URL : https://patchwork.freedesktop.org/series/10733/ State : failure == Summary == Series 10733v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/10733/revisi

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Use RCU to annotate and enforce protection for breadcrumb's bh

2016-08-06 Thread Patchwork
== Series Details == Series: drm/i915: Use RCU to annotate and enforce protection for breadcrumb's bh URL : https://patchwork.freedesktop.org/series/10732/ State : failure == Summary == Applying: drm/i915: Use RCU to annotate and enforce protection for breadcrumb's bh Using index info to reco

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Maarten's pre-g4x GPU reset regression fix + other reset stuff

2016-08-06 Thread Patchwork
== Series Details == Series: drm/i915: Maarten's pre-g4x GPU reset regression fix + other reset stuff URL : https://patchwork.freedesktop.org/series/10731/ State : failure == Summary == Series 10731v1 drm/i915: Maarten's pre-g4x GPU reset regression fix + other reset stuff http://patchwork.fr

Re: [Intel-gfx] [PATCH] drm/i915: Shut down displays gracefully on reboot

2016-08-06 Thread Chris Wilson
On Sat, Aug 06, 2016 at 10:09:16AM +0200, Lukas Wunner wrote: > On Wed, Aug 03, 2016 at 04:36:18PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Dell UP2414Q doesn't like it when we're driving it in MST mode, and then > > reboot the machine. After reboot, the monitor

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Add smp_rmb() to busy ioctl's RCU dance

2016-08-06 Thread Patchwork
== Series Details == Series: drm/i915: Add smp_rmb() to busy ioctl's RCU dance URL : https://patchwork.freedesktop.org/series/10730/ State : failure == Summary == Applying: drm/i915: Add smp_rmb() to busy ioctl's RCU dance fatal: sha1 information is lacking or useless (drivers/gpu/drm/i915/i91

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915/bxt: Bring MIPI out of reset (rev2)

2016-08-06 Thread Patchwork
== Series Details == Series: drm/i915/bxt: Bring MIPI out of reset (rev2) URL : https://patchwork.freedesktop.org/series/10682/ State : failure == Summary == Series 10682v2 drm/i915/bxt: Bring MIPI out of reset http://patchwork.freedesktop.org/api/1.0/series/10682/revisions/2/mbox Test kms_cu

Re: [Intel-gfx] [PATCH] drm/i915: Shut down displays gracefully on reboot

2016-08-06 Thread Lukas Wunner
On Wed, Aug 03, 2016 at 04:36:18PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Dell UP2414Q doesn't like it when we're driving it in MST mode, and then > reboot the machine. After reboot, the monitor is somehow confused and > refuses to do the payload allocation: > [drm

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Add some curly braces

2016-08-06 Thread Patchwork
== Series Details == Series: drm/i915: Add some curly braces URL : https://patchwork.freedesktop.org/series/10727/ State : failure == Summary == Series 10727v1 drm/i915: Add some curly braces http://patchwork.freedesktop.org/api/1.0/series/10727/revisions/1/mbox Test kms_cursor_legacy:

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Don't mark PCH underrun reporting as diasabled for transcoder B/C on LPT-H

2016-08-06 Thread Patchwork
== Series Details == Series: drm/i915: Don't mark PCH underrun reporting as diasabled for transcoder B/C on LPT-H URL : https://patchwork.freedesktop.org/series/10726/ State : failure == Summary == Series 10726v1 drm/i915: Don't mark PCH underrun reporting as diasabled for transcoder B/C on