[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Select DRM_VGEM for igt

== Series Details == Series: drm/i915: Select DRM_VGEM for igt URL : https://patchwork.freedesktop.org/series/9690/ State : failure == Summary == Applying: drm/i915: Select DRM_VGEM for igt Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/Kconfig.debug Falling back t

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Acquire intel_runtime_pm for HD-Audio registers

== Series Details == Series: drm/i915: Acquire intel_runtime_pm for HD-Audio registers URL : https://patchwork.freedesktop.org/series/9689/ State : failure == Summary == Series 9689v1 drm/i915: Acquire intel_runtime_pm for HD-Audio registers http://patchwork.freedesktop.org/api/1.0/series/9689

Re: [Intel-gfx] [PATCH] drm/i915: Select DRM_VGEM for igt

Reviewed-by: Matthew Auld ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH] drm/i915: Select X86_MSR for igt

Reviewed-by: Matthew Auld ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] drm/i915: Select DRM_VGEM for igt

igt/prime_vgem (and others) depends upon VGEM so automatically select it when enabling i915 debugging. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/Kconfig.debug | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/Kconfig.debug b/drivers/gpu/drm/i915/Kconfig.debug i

Re: [Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [01/10] drm/i915/breadcrumbs: Queue hangcheck before sleeping

On Sat, Jul 09, 2016 at 09:58:00AM -, Patchwork wrote: > == Series Details == > > Series: series starting with [01/10] drm/i915/breadcrumbs: Queue hangcheck > before sleeping > URL : https://patchwork.freedesktop.org/series/9688/ > State : failure > > == Summary == > > Series 9688v1 Serie

[Intel-gfx] [PATCH] drm/i915: Acquire intel_runtime_pm for HD-Audio registers

On Haswell/Broadwell, the HD-Audio block is inside the HDMI/display power well and so the sna-hda audio codec acquires the display power well while it is operational. However, Skylake separates the powerwells again, and so we must remember to acquire the rpm wakeref for ourselves whilst tweaking th

[Intel-gfx] ✗ Ro.CI.BAT: failure for series starting with [01/10] drm/i915/breadcrumbs: Queue hangcheck before sleeping

== Series Details == Series: series starting with [01/10] drm/i915/breadcrumbs: Queue hangcheck before sleeping URL : https://patchwork.freedesktop.org/series/9688/ State : failure == Summary == Series 9688v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/9688/rev

[Intel-gfx] ✗ Ro.CI.BAT: failure for drm/i915: Select X86_MSR for igt

== Series Details == Series: drm/i915: Select X86_MSR for igt URL : https://patchwork.freedesktop.org/series/9687/ State : failure == Summary == Series 9687v1 drm/i915: Select X86_MSR for igt http://patchwork.freedesktop.org/api/1.0/series/9687/revisions/1/mbox Test kms_flip: Subgroup

[Intel-gfx] [PATCH 05/10] drm/i915: Move overclocking detection to alongside RPS frequency detection

Move the overclocking max frequency detection alongside the regular frequency detection, before we expose the undefined value to userspace. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_pm.c | 24 +++- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git

[Intel-gfx] [PATCH 06/10] drm/i915: Define a separate variable and control for RPS waitboost frequency

To allow the user finer control over waitboosting, allow them to set the frequency we request for the boost. This also them allows to effectively disable the boosting by setting the boost request to a low frequency. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ dri

[Intel-gfx] [PATCH 10/10] drm/i915: Remove temporary RPM wakeref assert disables

Now that the last couple of hacks have been removed from the runtime powermanagement users, we can fully enable the asserts. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_drv.h | 7 --- 1 file changed, 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/d

[Intel-gfx] [PATCH 04/10] drm/i915: Perform static RPS frequency setup before userspace

As these RPS frequency values are part of our userspace interface, they must be established before that userspace interface is registered. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_pm.c | 98 + 1 file changed, 31 insertions(+), 67 deletion

[Intel-gfx] [PATCH 07/10] drm/i915: Remove superfluous powersave work flushing

Instead of flushing the outstanding enabling, remember the requested frequency to apply when the powersave work runs. Signed-off-by: Chris Wilson Cc: Ville Syrjälä --- drivers/gpu/drm/i915/i915_debugfs.c | 30 ++--- drivers/gpu/drm/i915/i915_sysfs.c | 52 ++

[Intel-gfx] [PATCH 03/10] drm/i915: Preserve current RPS frequency across init

Select idle frequency during initialisation, then reset the last known frequency when re-enabling. This allows us to preserve the user selected frequency across resets. v2: Stop CHV from overriding the user's choice in cherryview_enable_rps() Signed-off-by: Chris Wilson Cc: Ville Syrjälä Cc: Mi

[Intel-gfx] [PATCH 08/10] drm/i915: Defer enabling rc6 til after we submit the first batch/context

Some hardware requires a valid render context before it can initiate rc6 power gating of the GPU; the default state of the GPU is not sufficient and may lead to undefined behaviour. The first execution of any batch will load the "golden render state", at which point it is safe to enable rc6. As we

[Intel-gfx] [PATCH 09/10] drm/i915: Hide gen6_update_ring_freq()

This function is no longer used outside of intel_pm.c so we can stop exposing it and rename the __gen6_update_ring_freq() to take its place. Signed-off-by: Chris Wilson Cc: Mika Kuoppala --- drivers/gpu/drm/i915/intel_drv.h | 1 - drivers/gpu/drm/i915/intel_pm.c | 18 -- 2 fil

[Intel-gfx] [PATCH 01/10] drm/i915/breadcrumbs: Queue hangcheck before sleeping

Never go to sleep waiting on the GPU without first ensuring that we will get woken up. We have a choice of queuing the hangcheck before every schedule() or the first time we wakeup. In order to simply accommodate both the signaler and the ordinary waiter, move the queuing to the common point of en

[Intel-gfx] Mika's rps/rc6 fixes

Fallout from the init tweaks from a couple of months ago... -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 02/10] drm/i915: Kick hangcheck from retire worker

Let's ensure that we cannot run indefinitely without the hangcheck worker being queued. We removed it from being kicked on every request because we were kicking it a few millions times in every hangcheck interval and only once is necessary! However, that leaves us with the issue of what if userspac

[Intel-gfx] [PATCH] drm/i915: Select X86_MSR for igt

igt/pm_rpm depends upon /dev/*/msr so automatically select it when enabling i915 debugging. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/Kconfig.debug | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/Kconfig.debug b/drivers/gpu/drm/i915/Kconfig.debug index 43400a