== Series Details ==
Series: drm/i915/ilk: Wait one vblank before enabling audio
URL : https://patchwork.freedesktop.org/series/7488/
State : failure
== Summary ==
Series 7488v1 drm/i915/ilk: Wait one vblank before enabling audio
http://patchwork.freedesktop.org/api/1.0/series/7488/revisions/1
From: Robert Foss
Replace intel specific header includes with intel_drm_stubs.h.
The stubbed functions will all call igt_require(false) and cause a skip.
Signed-off-by: Robert Foss
---
lib/drmtest.c | 2 +-
lib/gpgpu_fill.c| 7 +++
lib/igt_aux.c | 2 +-
lib/igt
From: Robert Foss
Replace intel specific header includes with intel_drm_stubs.h.
The stubbed functions will all call igt_require(false) and cause a skip.
Additionally there a small amount of reformatting of the #includes was
perfomed. "XXX" was fixed to where approptiate, spacing and alphabeti
From: Robert Foss
This patch provides stubs for functionality otherwise provided by libdrm_intel.
The stubbed functions all fail with a call to igt_require(false).
Defines and enums have been copied from libdrm_intel.
Due to the stubbed tests failing with an igt_require() call, these stubs are
From: Robert Foss
Switched from drm_XXX aliases drm_intel_XXX aliases for symbols where that
switch is possible.
Signed-off-by: Robert Foss
---
tests/gem_ppgtt.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/tests/gem_ppgtt.c b/tests/gem_ppgtt.c
index 1
From: Robert Foss
Hey,
I've been looking at the possibilty of removing the compile time depency on
libdrm_intel. There are two technical solutions to this problem as far as
I can see; stubs and conditional compilation.
I'd like to compare the two approaches to provide an overview.
Conditional
From: Robert Foss
Use the HAS_INTEL automake flag to avoid building tools that won't
compile unless libdrm_intel is available in the build system.
Signed-off-by: Robert Foss
---
demos/Makefile.am | 5 ++---
demos/Makefile.sources | 7 +++
2 files changed, 9 insertions(+), 3 deletions(
From: Robert Foss
Use the HAS_INTEL automake flag to avoid building tools that won't
compile unless libdrm_intel is available in the build system.
Signed-off-by: Robert Foss
---
tools/Makefile.sources | 50 +-
1 file changed, 29 insertions(+), 21
From: Robert Foss
Use the HAS_INTEL automake flag to avoid building benchmarks that won't
compile unless libdrm_intel is available in the build system.
Signed-off-by: Robert Foss
---
benchmarks/Makefile.sources | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git
From: Robert Foss
Switched from drm_XXX aliases drm_intel_XXX aliases for symbols where that
switch is possible.
Signed-off-by: Robert Foss
---
tests/gem_render_tiled_blits.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/gem_render_tiled_blits.c b/tests/gem_rend
From: Robert Foss
Test for libdrm_intel and build for it if present.
Also expose the HAVE_INTEL #define to allow code to be conditionally
compiled.
Signed-off-by: Robert Foss
---
configure.ac | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/configure.ac b/conf
We no longer call ilk_audio_codec_enable() while we have vblanks
disabled. As such, we can finally fix this and stop the occasional pipe
underruns I'm seeing on this Dell OptiPlex 990.
Cc: sta...@vger.kernel.org
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_audio.c | 8 ++--
1 file cha
On Fri, May 20, 2016 at 08:02:46PM +0300, Marius Vlad wrote:
> Tune down from 20s to 2s. Add the old timeout values under extended tests.
Does it fail with the new timeout? If not, increase it.
This test should be a fail on current kernels.
-Chris
--
Chris Wilson, Intel Open Source Technology C
On Fri, May 20, 2016 at 08:02:16PM +0300, Marius Vlad wrote:
> There's no need to multiply the number of batches with the number of
> engines as intel_require_memory() already compares against the aperture
> size (count * BATCH_SIZE).
nengines was because I first planned to allocate an array for e
On Fri, May 20, 2016 at 03:47:06PM +0300, Ander Conselvan de Oliveira wrote:
> In commit f9476a6c6d0c ("drm/i915: Refactor platform specifics out of
> intel_get_shared_dpll()"), the ibx_get_dpll() function lacked an error
> check, that can lead to a NULL pointer dereference when trying to enable
>
Tune down from 20s to 2s. Add the old timeout values under extended tests.
Signed-off-by: Marius Vlad
---
tests/gem_ctx_create.c | 2 ++
tests/gem_exec_create.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/tests/gem_ctx_create.c b/tests/gem_ctx_create.c
index 0bdd408..ef3bdda 100644
-
There's no need to multiply the number of batches with the number of
engines as intel_require_memory() already compares against the aperture
size (count * BATCH_SIZE).
This also removes the weird assertion messages where we need
bogus amounts of RAM.
Also tune down the timeout from from 10s to 2s
On pe, 2016-05-20 at 17:23 +0100, Chris Wilson wrote:
> On Fri, May 20, 2016 at 07:00:18PM +0300, Imre Deak wrote:
> > On pe, 2016-05-20 at 18:20 +0300, Marius Vlad wrote:
> > > Either we return $IGT_EXIT_FAILURE or remove it entirely (like in
> > > this
> > > patch). If rmmod returns non-zero (i.e
On Fri, May 20, 2016 at 07:00:18PM +0300, Imre Deak wrote:
> On pe, 2016-05-20 at 18:20 +0300, Marius Vlad wrote:
> > Either we return $IGT_EXIT_FAILURE or remove it entirely (like in
> > this
> > patch). If rmmod returns non-zero (i.e., Module: i915 is still in
> > use), reload
> > will bail with
On pe, 2016-05-20 at 18:20 +0300, Marius Vlad wrote:
> Either we return $IGT_EXIT_FAILURE or remove it entirely (like in
> this
> patch). If rmmod returns non-zero (i.e., Module: i915 is still in
> use), reload
> will bail with $IGT_EXIT_SKIP, making the check with lsmod useless.
> Also use the ret
On Atom E38xx based boards from two different manufacturers we have
encountered the HDMI display being disabled early during the boot process.
Extending the Fake HDMI live status to include Valley View chipsets
fixes this problem on both boards.
Signed-off-by: James Stafford
---
drivers/gpu
== Series Details ==
Series: series starting with [1/4] drm/i915: Introduce
intel_release_shared_dpll()
URL : https://patchwork.freedesktop.org/series/7467/
State : failure
== Summary ==
Series 7467v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/7467/revisions/1
Either we return $IGT_EXIT_FAILURE or remove it entirely (like in this
patch). If rmmod returns non-zero (i.e., Module: i915 is still in use), reload
will bail with $IGT_EXIT_SKIP, making the check with lsmod useless.
Also use the return value in the fault-injection loop.
Signed-off-by: Marius Vla
The documentation for most of the non-static members and structs were
missing. Fix that.
Cc: Daniel Vetter
Signed-off-by: Ander Conselvan de Oliveira
---
Documentation/DocBook/gpu.tmpl| 7 +++
drivers/gpu/drm/i915/intel_dpll_mgr.c | 88 +--
drivers/gpu/
The hook is called from intel_prepare_shared_dpll(). The name doesn't
make sense after all the changes to modeset code. So just call it
prepare.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 8
drivers/gpu/drm/i915/intel_dpll_mgr.h | 2 +-
2 fil
The function intel_shared_dpll_commit() performs the equivalent of
drm_atomic_helper_swap_state() for the shared dpll state, which id not
handled by the helpers. So rename it for consistency.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gp
While the details of getting a shared dpll are wrapped by
intel_get_shared_dpll(), the release was still hand rolled into the
modeset code. Fix that by creating an entry point for releasing the
pll and move that code there.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/int
Tested-by: Fiedorowicz, Lukasz
Run similar tests as for previous version of this patch. Results are the same
and logs are cleaner. I'm happy with how it works.
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Tvrtko Ursulin
Sent: Friday,
On Thu, May 19, 2016 at 04:08:31PM -, Patchwork wrote:
> == Series Details ==
>
> Series: vga_switcheroo: Add helper for deferred probing
> URL : https://patchwork.freedesktop.org/series/7409/
> State : failure
>
> == Summary ==
>
> Series 7409v1 vga_switcheroo: Add helper for deferred pro
== Series Details ==
Series: drm/i915: Fix NULL pointer deference when out of PLLs in IVB
URL : https://patchwork.freedesktop.org/series/7458/
State : failure
== Summary ==
Series 7458v1 drm/i915: Fix NULL pointer deference when out of PLLs in IVB
http://patchwork.freedesktop.org/api/1.0/serie
On Sat, May 07, 2016 at 09:18:24PM +0300, Ville Syrjälä wrote:
> On Fri, May 06, 2016 at 09:22:49PM +0100, Chris Wilson wrote:
> > On Fri, May 06, 2016 at 09:35:55PM +0300, ville.syrj...@linux.intel.com
> > wrote:
> > > @@ -730,9 +730,14 @@ int i915_suspend_switcheroo(struct drm_device *dev,
> >
In commit f9476a6c6d0c ("drm/i915: Refactor platform specifics out of
intel_get_shared_dpll()"), the ibx_get_dpll() function lacked an error
check, that can lead to a NULL pointer dereference when trying to enable
pipe C.
BUG: unable to handle kernel NULL pointer dereference at 0068
IP
On Fri, May 20, 2016 at 12:18:10PM +, Wang, Zhi A wrote:
> Thanks! See my replies below.
>
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Friday, May 20, 2016 2:49 PM
> > To: Wang, Zhi A
> > Cc: intel-gfx@lists.freedesktop.org; tvrtko.ursu...
But the corresponding definition about desc.addressing_mode is in intel_lrc.c.
And when we want to generate these bits in i915_gem_context.c we can't not
reference them. Do you want me to move
define GEN8_CTX_ADDRESSING_MODE_SHIFT 3
#define GEN8_CTX_ADDRESSING_MODE(ctx) \
(ctx->
On Fri, May 20, 2016 at 01:07:29PM +0100, Tvrtko Ursulin wrote:
>
> On 19/05/16 14:13, Chris Wilson wrote:
> >On Thu, May 19, 2016 at 01:50:51PM +0100, Tvrtko Ursulin wrote:
> >>
> >>On 19/05/16 12:32, Chris Wilson wrote:
> >>>The queue only ever contains at most one item and has no special flags.
On Thu, May 19, 2016 at 04:44:03PM +0100, Tvrtko Ursulin wrote:
>
> On 19/05/16 12:32, Chris Wilson wrote:
> >Avoid the two calls to ktime_get_raw_ns() (at best it reads the TSC) as
> >we only need to compute the elapsed time for a timed wait.
> >
> >v2: Eliminate the unused local variable reducin
Thanks. Will do. :)
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Friday, May 20, 2016 3:02 PM
> To: Wang, Zhi A
> Cc: intel-gfx@lists.freedesktop.org; tvrtko.ursu...@linux.intel.com;
> joonas.lahti...@linux.intel.com; Tian, Kevin ; Lv,
> Zhiyuan
> S
On Fri, May 20, 2016 at 01:04:13PM +0100, Tvrtko Ursulin wrote:
> >+p = &b->waiters.rb_node;
> >+while (*p) {
> >+parent = *p;
> >+if (wait->seqno == to_wait(parent)->seqno) {
> >+/* We have multiple waiters on the same seqno, select
> >+
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Friday, May 20, 2016 3:01 PM
> To: Wang, Zhi A
> Cc: intel-gfx@lists.freedesktop.org; tvrtko.ursu...@linux.intel.com;
> joonas.lahti...@linux.intel.com; Tian, Kevin ; Lv,
> Zhiyuan ; Niu, Bing
> Subject:
Thanks! See my replies below.
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Friday, May 20, 2016 2:49 PM
> To: Wang, Zhi A
> Cc: intel-gfx@lists.freedesktop.org; tvrtko.ursu...@linux.intel.com;
> joonas.lahti...@linux.intel.com; Tian, Kevin ; Lv,
> Zh
== Series Details ==
Series: series starting with [CI,1/5] drm/i915/fbdev: Limit the global
async-domain synchronization
URL : https://patchwork.freedesktop.org/series/7451/
State : warning
== Summary ==
Series 7451v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series
On 19/05/16 14:13, Chris Wilson wrote:
On Thu, May 19, 2016 at 01:50:51PM +0100, Tvrtko Ursulin wrote:
On 19/05/16 12:32, Chris Wilson wrote:
The queue only ever contains at most one item and has no special flags.
It is just a very simple wrapper around the system-wq - a complication
with no
On Tue, May 17, 2016 at 04:19:09AM -0400, Zhi Wang wrote:
> GVT workload scheduler needs special host LRC contexts, the so called
> "shadow LRC context" to submit guest workload to host i915. During the
> guest workload submission, GVT fills the shadow LRC context with the
> content of guest LRC co
On 19/05/16 12:32, Chris Wilson wrote:
One particularly stressful scenario consists of many independent tasks
all competing for GPU time and waiting upon the results (e.g. realtime
transcoding of many, many streams). One bottleneck in particular is that
each client waits on its own results, but
On Tue, May 17, 2016 at 04:19:08AM -0400, Zhi Wang wrote:
> This patch introduces the support of context signle submission. As GVT
> context may come from different guests, which requires different
> configuration of render registers. It can't be combined in a dual ELSP
> submission combo.
>
> We
On Tue, May 17, 2016 at 04:19:06AM -0400, Zhi Wang wrote:
> Previously the addressing mode bit in context descriptor is generated from
> context PPGTT. As we allow context could be used without PPGTT, and we
> still need to know the addressing mode during context submission, a flag
> is introduced.
On Tue, May 17, 2016 at 04:19:05AM -0400, Zhi Wang wrote:
> This patch introduces an option for configuring ring buffer size during
> context creation. If no ring buffer size is specified, the default size
> (4 * PAGE_SIZE) will be used.
>
> Signed-off-by: Zhi Wang
> ---
> drivers/gpu/drm/i915/i
On Tue, May 17, 2016 at 04:19:04AM -0400, Zhi Wang wrote:
> From: Bing Niu
>
> This patch introduces host graphics memory partition when GVT-g
> is enabled.
>
> Under GVT-g, i915 host driver only owned limited graphics resources,
> others are managed by GVT-g resource allocator and kept for othe
On Tue, May 17, 2016 at 04:19:03AM -0400, Zhi Wang wrote:
> +config DRM_I915_GVT
> +bool "Intel GVT-g host driver"
> +depends on DRM_I915
> +default n
> +help
> + Enabling GVT-g mediated graphics pass-through technique for Intel
> i915
> + based in
Oh. Thanks Chris!
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Friday, May 20, 2016 2:17 PM
> To: Wang, Zhi A
> Cc: intel-gfx@lists.freedesktop.org; tvrtko.ursu...@linux.intel.com;
> joonas.lahti...@linux.intel.com; Tian, Kevin ; Lv,
> Zhiyuan
> Sub
== Series Details ==
Series: drm/i915/fbdev: Limit the global async-domain synchronization (rev3)
URL : https://patchwork.freedesktop.org/series/7332/
State : failure
== Summary ==
Series 7332v3 drm/i915/fbdev: Limit the global async-domain synchronization
http://patchwork.freedesktop.org/api/
Tested-by: Fiedorowicz, Lukasz
I've done some manual testing on patches mentioned below. Results looks good. I
did never encountered any kernel panic or hangs.
GPU was wedged when scenario expected it. My testing scenario would look like
this:
- boot with different parameters combination
- r
On Tue, May 17, 2016 at 04:19:07AM -0400, Zhi Wang wrote:
> This patch introduces an approach to track the execlist context status
> change.
>
> GVT-g uses GVT context as the "shadow context". The content inside GVT
> context will be copied back to guest after the context is idle. So GVT-g
> has t
== Series Details ==
Series: Enable GuC submission (rev3)
URL : https://patchwork.freedesktop.org/series/7153/
State : failure
== Summary ==
Series 7153v3 Enable GuC submission
http://patchwork.freedesktop.org/api/1.0/series/7153/revisions/3/mbox
Test drv_module_reload_basic:
Thanks Tvrtko.:) See my replies below.
> -Original Message-
> From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
> Sent: Wednesday, May 18, 2016 2:23 PM
> To: Wang, Zhi A ; intel-gfx@lists.freedesktop.org;
> joonas.lahti...@linux.intel.com; ch...@chris-wilson.co.uk; Tian, Kevin
>
From: Dave Gordon
We're using this function for ringbuffers and other "small" objects, so
it's worth avoiding an extra malloc()/free() cycle if the page array is
small enough to put on the stack. Here we've chosen an arbitrary cutoff
of 32 (4k) pages, which is big enough for a ringbuffer (4 pages
From: Dave Gordon
The recently-added i915_gem_object_pin_map() can be further optimised
for "small" objects. To facilitate this, and simplify the error paths
before adding the new code, this patch pulls out the "mapping" part of
the operation (involving local allocations which must be undone befo
From: Dave Gordon
The existing for_each_sg_page() iterator is somewhat heavyweight, and is
limiting i915 driver performance in a few benchmarks. So here we
introduce somewhat lighter weight iterators, primarily for use with GEM
objects or other case where we need only deal with whole aligned page
During cleanup we have to synchronise with the async task we are using
to initialise and register our fbdev. Currently, we are using a full
synchronisation on the global domain, but we can restrict this to just
synchronising up to our task if we remember our cookie.
v2: async_synchronize_cookie()
From: Dave Gordon
Avoiding the out-of-line call to sg_next() reduces the kernel execution
overhead by 10% in some workloads (for example the Unreal Engine 4 demo
Atlantis on 2GiB GTTs) which are dominated by the cost of inserting PTEs
due to texture thrashing. We can demonstrate this in a microbe
From: Dave Gordon
Split the function of "enable_guc_submission" into two separate
options. The new one ("enable_guc_loading") controls only the
*fetching and loading* of the GuC firmware image. The existing
one is redefined to control only the *use* of the GuC for batch
submission once the firmw
During cleanup we have to synchronise with the async task we are using
to initialise and register our fbdev. Currently, we are using a full
synchronisation on the global domain, but we can restrict this to just
synchronising up to our task if we remember our cookie.
v2: async_synchronize_cookie()
Thanks! :)
> -Original Message-
> From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
> Sent: Wednesday, May 18, 2016 1:55 PM
> To: Wang, Zhi A ; intel-gfx@lists.freedesktop.org;
> joonas.lahti...@linux.intel.com; ch...@chris-wilson.co.uk; Tian, Kevin
> ; Lv, Zhiyuan
> Subject: R
On Fri, May 20, 2016 at 09:15:06AM +0100, Chris Wilson wrote:
> On Fri, May 20, 2016 at 01:31:29AM +0100, Dave Gordon wrote:
> > The existing for_each_sg_page() iterator is somewhat heavyweight, and is
> > limiting i915 driver performance in a few benchmarks. So here we
> > introduce somewhat light
== Series Details ==
Series: Add USB typeC based DP support for BXT platform (rev7)
URL : https://patchwork.freedesktop.org/series/1731/
State : warning
== Summary ==
Series 1731v7 Add USB typeC based DP support for BXT platform
http://patchwork.freedesktop.org/api/1.0/series/1731/revisions/7/
== Series Details ==
Series: series starting with [v4,1/4] drm/i915: refactor
i915_gem_object_pin_map()
URL : https://patchwork.freedesktop.org/series/7432/
State : failure
== Summary ==
Series 7432v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/7432/revisions/1
== Series Details ==
Series: SKL watermark algorithm updates (rev2)
URL : https://patchwork.freedesktop.org/series/7262/
State : warning
== Summary ==
Series 7262v2 SKL watermark algorithm updates
http://patchwork.freedesktop.org/api/1.0/series/7262/revisions/2/mbox
Test drv_module_reload_bas
On Thu, May 19, 2016 at 10:14:35PM +0200, Lukas Wunner wrote:
> Hi Chris,
>
> On Thu, May 19, 2016 at 09:28:10AM +0100, Chris Wilson wrote:
> > During cleanup we have to synchronise with the async task we are using
> > to initialise and register our fbdev. Currently, we are using a full
> > synchr
To support USB type C alternate DP mode, the display driver needs to
know the number of lanes required by the DP panel as well as number
of lanes that can be supported by the type-C cable. Sometimes, the
type-C cable may limit the bandwidth even if Panel can support
more lanes. To address these sce
From: Ander Conselvan de Oliveira
Decouple intel_dp_set_link_params() from struct intel_crtc_state. This
will be useful for implementing DP upfront link training.
Reviewed-by: Durgadoss R
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_ddi.c| 3 ++-
drivers/gpu/
Split out of bxt_ddi_pll_select() the logic that calculates the pll
dividers and dpll_hw_state into a new function that doesn't depend on
crtc state. This will be used for enabling the port pll when doing
upfront link training.
v2:
* Refactored code so that bxt_clk_div need not be exported (Durga)
From: Ander Conselvan de Oliveira
The value of ddi_pll_sel is derived from the selection of shared dpll,
so just calculate the final value when necessary.
Reviewed-by: Durgadoss R
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_ddi.c | 33 ++
This patch series adds upfront link training support to enable
USB type C based DP on BXT platform.
To support USB type C alternate DP mode, the display driver needs to
know the number of lanes required by the DP panel as well as number
of lanes that can be supported by the type-C cable. Sometimes
From: Ander Conselvan de Oliveira
Split intel_ddi_pre_enable() into encoder type specific versions that
don't depend on crtc_state. The necessary parameters are passed as
function arguments. This split will be necessary for implementing DP
upfront link training.
Reviewed-by: Durgadoss R
Signed-
On Fri, May 20, 2016 at 01:31:29AM +0100, Dave Gordon wrote:
> The existing for_each_sg_page() iterator is somewhat heavyweight, and is
> limiting i915 driver performance in a few benchmarks. So here we
> introduce somewhat lighter weight iterators, primarily for use with GEM
> objects or other cas
On Thu, May 19, 2016 at 02:25:59PM +0530, Jindal, Sonika wrote:
> Looks good to me.
>
> Reviewed-by: Sonika Jindal
Ok, merged 2-7 except the aux handshake one - that needs the fixup from
Ville's series and that one needs an ack from Dave for the helper patches
still.
-Daniel
>
>
>
> On 5/19/2
On Thu, May 19, 2016 at 08:01:33AM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/7] drm/i915: Enable edp psr error interrupts
> on hsw (rev2)
> URL : https://patchwork.freedesktop.org/series/7357/
> State : warning
>
> == Summary ==
>
> Series 7357v2 Serie
On Fri, May 20, 2016 at 01:31:30AM +0100, Dave Gordon wrote:
> Signed-off-by: Dave Gordon
> Cc: Chris Wilson
Much better. The effect of the inline
gem:exec:fault:1MiB:+4.90%
gem:exec:fault:1MiB:forked:+7.99%
gem:exec:fault:16MiB: +22.94%
gem:exec:fault:16MiB:forked
On Thu, May 19, 2016 at 04:20:02PM +0530, Jindal, Sonika wrote:
>
>
> On 5/18/2016 10:17 PM, Daniel Vetter wrote:
> >Oops. Hw default for programming these fields to 0 is "skip link
> >training". Display won't take that too well usually.
> But we were defaulting it to value 0, which means 500us f
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