When the system is running low on memory, gem shrinker is invoked.
In this process objects will be unbounded from GTT and unbinding process
will require access to GTT(GTTADR) and also to fence register potentially.
That requires a resume of gfx device, if suspended, in the shrinker path.
Considerin
On Thu, 17 Mar 2016 13:41:56 + Chris Wilson
wrote:
> On Thu, Mar 17, 2016 at 01:34:59PM +, Chris Wilson wrote:
> > vmaps are temporary kernel mappings that may be of long duration.
> > Reusing a vmap on an object is preferrable for a driver as the cost of
> > setting up the vmap can othe
On 03/23/2016 12:42 PM, Chris Wilson wrote:
On Wed, Mar 23, 2016 at 04:32:59PM +0100, David Herrmann wrote:
Hi
On Wed, Mar 23, 2016 at 12:56 PM, Chris Wilson wrote:
On Wed, Mar 23, 2016 at 12:30:42PM +0100, David Herrmann wrote:
My question was rather about why we do this? Semantics for EINT
On 03/02/2016 04:58 PM, Joseph Salisbury wrote:
> On 02/29/2016 04:33 AM, Jani Nikula wrote:
>> On Wed, 24 Feb 2016, Joseph Salisbury wrote:
>>> Hi Sonika,
>>>
>>> A kernel bug report was opened against Ubuntu [0]. After a kernel
>>> bisect, it was found that reverting the following commit resolv
== Series Details ==
Series: Move workarounds from intel_dp_dpcd_read_wake() into drm's DP helpers
URL : https://patchwork.freedesktop.org/series/4957/
State : failure
== Summary ==
Series 4957v1 Move workarounds from intel_dp_dpcd_read_wake() into drm's DP
helpers
http://patchwork.freedeskto
This is part of a patch series to migrate all of the workarounds for
commonly seen behavior from bad sinks in intel_dp_dpcd_read_wake() to
drm's DP helper.
Some sinks need some time during the process of resuming the system from
sleep before they're ready to handle transactions. While it would be
This is part of a patch series to migrate all of the workarounds for
commonly seen behavior from bad sinks in intel_dp_dpcd_read_wake() to drm's
DP helper.
Some sinks will just return garbage for the first aux tranaction they
receive when coming out of sleep mode, so we need to perform an addition
This is part of a patch series to migrate all of the workarounds for
commonly seen behavior from bad sinks in intel_dp_dpcd_read_wake() to
drm's DP helper.
Signed-off-by: Lyude
---
drivers/gpu/drm/drm_dp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm
Since we've fixed up drm_dp_dpcd_read() to allow for retries when things
timeout, there's no use for having this function anymore. Good riddens.
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_dp.c | 79 -
1 file changed, 22 insertions(+), 57 deletions
This is part of a patch series to migrate all of the workarounds for
commonly seen behavior from bad sinks in intel_dp_dpcd_read_wake() to
drm's DP helper.
We cannot rely on sinks NACKing or deferring when they can't receive
transactions, nor can we rely on any other sort of consistent error to
kn
Resending this because it looks like replying to my previous series of patches
causes patchwork to pick up patches from the original version of this and
try to apply them along with this one.
This series of patches takes all of the workarounds we used in
intel_dp_dpcd_read_wake() for working aroun
On Monday 21 March 2016 07:13 PM, Jani Nikula wrote:
On Fri, 11 Mar 2016, Ramalingam C wrote:
At BXT DSI, PIPE registers are inactive. So we can get the
PIPE's mode parameters from them. The possible option is
retriving them from the PORT registers. But mode timing
parameters are progammed to
In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.
The CABC is not standardized and panel vendors are free to follow
their implementation. The CABC implementaion h
If the source of the backlight PWM is from the
panel then the PWM can be controlled by DCS
command, this patch adds the support to
enable/disbale panel PWM, control backlight level
etc...
v2: Moving the CABC bkl functions to new file.(Jani)
v3: Rebase
v4: Rebase
v5: Use mipi_dsi_dcs_write() ins
For dual link panel scenarios there are new fields added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.
v2: Moving the comment to intel_dsi.h(Jani)
v3: Renaming the field names (Jani)
Cc: Jani Nikula
Cc: Daniel Vetter
Cc: Yetunde Adebisi
Signe
These fields in VBT indicates the PWM source which
is used and also the controller number.
Signed-off-by: Deepak M
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/intel_bios.c | 12
drivers/gpu/drm/i915/intel_drv.h | 5 +
drivers/gpu/drm/i915/in
Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.
v2: Sorted the Macro`s by value (Andrzej)
Cc: Andrzej Hajda
Cc: Thierry Reding
Cc: David Airlie
Cc: Ville Syrjälä
Cc: Daniel Vetter
Suggested-by: Jani Nikula
Signed-off-by: Deepak M
---
include/video/mipi_dis
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