Re: [Intel-gfx] [PATCH] dma-buf, drm, ion: Propagate error code from dma_buf_start_cpu_access()

On 19 March 2016 at 15:39, Daniel Vetter wrote: > On Fri, Mar 18, 2016 at 08:02:39PM +, Chris Wilson wrote: >> Drivers, especially i915.ko, can fail during the initial migration of a >> dma-buf for CPU access. However, the error code from the driver was not >> being propagated back to ioctl an

[Intel-gfx] [PATCH] drm/i915: BXT DDI PHY sequence BUN

According to the BSpec update, bit 7 of PORT_CL1CM_DW0 register needs to be checked to ensure that the register is in accessible state. Also, based on a BSpec update, changing the timeout value to check iphypwrgood, from 10ms to wait for up to 100us. Signed-off-by: Vandana Kannan Reported-by: Phi

[Intel-gfx] [PATCH] drm/i915: intel_audio clear eld buf when disconnecting monitor

From: Libin Yang When disconnecting monitor, dev_priv->dig_port_map[port] will be set NULL, which causes eld will not be updated in i915_audio_component_get_eld(). This patch clears the eld buf when dev_priv->dig_port_map[port] is NULL. Signed-off-by: Libin Yang --- drivers/gpu/drm/i915/intel

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/bxt: Fix off-by-one error in Broxton PLL IDs (rev3)

On Wed, Mar 16, 2016 at 02:37:24PM +0200, Tomi Sarvela wrote: > On Wednesday 16 March 2016 10:48:43 Imre Deak wrote: > > Tomi, noticed two things that maybe infrastructure related, see below: > > > > > Test drv_module_reload_basic: > > > skip -> PASS (bdw-nuci7) > > > T

Re: [Intel-gfx] [PATCH v3 07/19] drm/i915: Move load time gem_load_init earlier

On Wed, 2016-03-16 at 11:57 +, Chris Wilson wrote: > On Wed, Mar 16, 2016 at 01:38:56PM +0200, Imre Deak wrote: > > The only steps requiring device access is the fence and swizzling > > initialization, so split these out keeping them in their current > > place > > and move the rest of init step

[Intel-gfx] [PATCH v7] drm/i915: Support to enable TRTT on GEN9

From: Akash Goel Gen9 has an additional address translation hardware support in form of Tiled Resource Translation Table (TR-TT) which provides an extra level of abstraction over PPGTT. This is useful for mapping Sparse/Tiled texture resources. Sparse resources are created as virtual-only allocat

[Intel-gfx] [PATCH i-g-t 5/6] tests/kms_color: New test for pipe level color management

This test enables testing of : * degamma LUTs * csc matrix * gamma LUTs * legacy gamma LUTs v2: turn assert into require to skip on platform not supporting color management v3: add invalid blob ids tests v4: Try to match CRC results against several values around the

[Intel-gfx] [PATCH 3/6] drm/i915: Extend magic to_i915() to work with drm_i915_gem_object

Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c| 7 +++--- drivers/gpu/drm/i915/i915_drv.h| 15 - drivers/gpu/drm/i915/i915_gem.c| 34 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 17 ++- d

[Intel-gfx] [PATCH i-g-t v3] igt/gem_pipe_control_store_loop: Add qword write tests

Test description suggested that all platforms were testing qword writes, while in fact only gen4-gen5 did. v2: Test dword/qword writes for all available platforms. v3: Rewrite, drop libdrm/intel_batchbuffer dependencies, drop brw_emit_post_sync_nonzero_flush WA for gen6/gen7, drop WC_FLUSH

Re: [Intel-gfx] [PATCH V11] drm/i915/skl: SKL CDCLK change on modeset tracking VCO

On 03/17/2016 02:18 PM, Rodrigo Vivi wrote: On Wed, Mar 16, 2016 at 4:33 PM Clint Taylor mailto:clinton.a.tay...@intel.com>> wrote: On 03/16/2016 12:27 AM, Daniel Vetter wrote: > On Tue, Mar 15, 2016 at 02:34:05PM -0700, clinton.a.tay...@intel.com

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Get rid of intel_dp_dpcd_read_wake()

On Thu, 17 Mar 2016, Lyude wrote: > Since we've fixed up drm_dp_dpcd_read() to allow for retries when things > timeout, there's no use for having this function anymore. Good riddens. > > Signed-off-by: Lyude > --- > drivers/gpu/drm/i915/intel_dp.c | 79 >

[Intel-gfx] [PATCH 1/2] igt/gem_stolen: Verify contents of stolen-backed objects across hibernation

From: Ankitprasad Sharma This patch verifies if the contents of the stolen backed object were preserved across hibernation. This is to validate kernel changes related to moving stolen-backed objects to shmem on hibernation. v2: Added comment, Use igt_assert_eq() instead of igt_assert(), Made loo

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Remove unused variable in i915_gem_request_add_to_client (rev3)

== Series Details == Series: series starting with [1/4] drm/i915: Remove unused variable in i915_gem_request_add_to_client (rev3) URL : https://patchwork.freedesktop.org/series/4526/ State : failure == Summary == Series 4526v3 Series without cover letter 2016-03-16T17:03:45.630857 http://pat

[Intel-gfx] [PATCH v8] drm/i915: Support to enable TRTT on GEN9

From: Akash Goel Gen9 has an additional address translation hardware support in form of Tiled Resource Translation Table (TR-TT) which provides an extra level of abstraction over PPGTT. This is useful for mapping Sparse/Tiled texture resources. Sparse resources are created as virtual-only allocat

[Intel-gfx] [PATCH v2 1/9] drm/i915/dsi: refer to gpio index instead of gpio to avoid confusion

The DSI sequence blocks contain gpio index references, not actual gpio numbers. No functional changes. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dsi_pan

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Render decompression support for Gen9 and above

On Fri, Mar 18, 2016 at 10:20:53PM +0530, Vandana Kannan wrote: > This patch includes enabling render decompression (RC) after checking all the > requirements (format, tiling, rotation etc.). Along with this, the WAs > mentioned in BSpec Workaround page have been implemented. > > TODO: > 1. Disabl

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/bxt: Fix off-by-one error in Broxton PLL IDs (rev3)

On Wed, 16 Mar 2016, Daniel Vetter wrote: > [ text/plain ] > On Wed, Mar 16, 2016 at 02:37:24PM +0200, Tomi Sarvela wrote: >> On Wednesday 16 March 2016 10:48:43 Imre Deak wrote: >> > Tomi, noticed two things that maybe infrastructure related, see below: >> > >> > > Test drv_module_reload_basic:

Re: [Intel-gfx] [PATCH] drm/i915: Restrict usage of live status check

On Thu, Mar 17, 2016 at 09:15:39PM +0530, Sharma, Shashank wrote: > Regards > Shashank > > On 3/17/2016 6:34 PM, Ville Syrjälä wrote: > >On Thu, Mar 17, 2016 at 01:29:25PM +0530, Shashank Sharma wrote: > >>This patch restricts usage of live status check for HDMI detection. > >>While testing certai

[Intel-gfx] [PATCH 1/3] drm/i915/tdr: Initialize hangcheck struct for each engine

From: Tomas Elf Initialize hangcheck struct during driver load. Since we do the same after recovering from a reset, this is extracted into a helper function. Cc: Mika Kuoppala Signed-off-by: Tomas Elf Signed-off-by: Arun Siluvery --- drivers/gpu/drm/i915/i915_dma.c | 12

[Intel-gfx] [PATCH] sna: revert the short-curcuit breaking XShmGetImage

The short-curcuit introduced by commit 963b5bb (later modified by commit aacc344) breaks XShmGetImage(). Images captured by ffmpeg's x11grab or x11vnc become choppy, while I use Cinnamon Desktop Environment. I tested on: i5-4570 (Haswell) and B85 Chipset Fedora 24 (Developmental Branch) x86

[Intel-gfx] [PATCH v3 14/19] drm/i915: Split out load time early initialization

According to the new init phases scheme we should initialize "SW-only" state not requiring accessing the device as the very first step, so that the reasoning about dependencies of later steps becomes easier. So move these init steps into a separate function. This also has the benefit of making the

[Intel-gfx] [PATCH v3 10/19] drm/i915: Move load time audio component registration earlier

We should register all the interfaces before we enable runtime PM. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/i915_dma.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 346ed8e..da1bea8 100

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Restrict usage of live status check (rev3)

== Series Details == Series: drm/i915: Restrict usage of live status check (rev3) URL : https://patchwork.freedesktop.org/series/4297/ State : failure == Summary == Series 4297v3 drm/i915: Restrict usage of live status check http://patchwork.freedesktop.org/api/1.0/series/4297/revisions/3/mbox

[Intel-gfx] [PATCH v3 08/19] drm/i915: Move load time runtime PM get later

We require the device to be powered only before accessing it, so we can move this call later. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/i915_dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c ind

[Intel-gfx] [PATCH v3 18/19] drm/i915: Fix power domain HW state cleanup on error path

Move the cleanup of the power domain HW state on the error path to the same function where the corresponding init call was called from. I noticed this problem when loading the module with load failure injection enabled, making i915_load_modeset_init() fail. CC: Chris Wilson Signed-off-by: Imre De

Re: [Intel-gfx] [PATCH v3] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave

On 16/03/2016 16:13, tim.g...@intel.com wrote: From: Tim Gore This allows writes to EU flow control registers. Together with SIP code from the user-mode driver this resolves a hang seen in some pre-emption scenarios. Note that this patch is just the kernel mode part of this workaround. v2. Oop

Re: [Intel-gfx] [PATCH v6] igt/gem_trtt: Exercise the TRTT hardware

On Fri, Mar 18, 2016 at 03:22:51PM +0530, Goel, Akash wrote: > > > On 3/18/2016 2:52 PM, Chris Wilson wrote: > >On Fri, Mar 18, 2016 at 02:31:23PM +0530, Goel, Akash wrote: > >> > >> > >>On 3/18/2016 2:06 PM, Chris Wilson wrote: > >>>On Fri, Mar 18, 2016 at 02:07:40PM +0530, akash.g...@intel.com

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Modify reset func to handle per engine resets (rev3)

Patchwork writes: > [ text/plain ] > == Series Details == > > Series: drm/i915: Modify reset func to handle per engine resets (rev3) > URL : https://patchwork.freedesktop.org/series/4510/ > State : failure > > == Summary == > > Series 4510v3 drm/i915: Modify reset func to handle per engine rese