== Series Details ==
Series: drm/i915/skl: SKL CDCLK change on modeset tracking VCO (rev9)
URL : https://patchwork.freedesktop.org/series/1609/
State : failure
== Summary ==
Series 1609v9 drm/i915/skl: SKL CDCLK change on modeset tracking VCO
2016-03-10T21:31:49.256426
http://patchwork.freede
== Series Details ==
Series: drm/i915/mocs: Program MOCS for all engines on init (rev4)
URL : https://patchwork.freedesktop.org/series/4310/
State : warning
== Summary ==
Series 4310v4 drm/i915/mocs: Program MOCS for all engines on init
http://patchwork.freedesktop.org/api/1.0/series/4310/revi
On 3/10/2016 7:56 PM, Michel Thierry wrote:
On 3/9/2016 11:31 AM, akash.g...@intel.com wrote:
From: Akash Goel
This patch provides the testcase to exercise the TRTT hardware.
...
--- /dev/null
+++ b/tests/gem_trtt.c
@@ -0,0 +1,498 @@
...
+
+/* gen8_canonical_addr
+ * Used to convert any
On Thu, Mar 10, 2016 at 12:47:05PM +, Lionel Landwerlin wrote:
> The GAMMA_LUT property must be updated when the legacy ioctl is
> triggered to ensure the new property does not impact older userspace
> code.
>
> Signed-off-by: Lionel Landwerlin
> Cc: Matt Roper
> ---
> tests/kms_pipe_color.
Adds an (unsafe; auto-kernel-tainting) boolean module parameter to the i915
drm driver: "force_dp_sst", which is disabled by default. Enabling the
parameter forces newly connected DisplayPort sinks to report as not
supporting multi-stream transport (MST), thus "forcing" the use of
single-stream tr
to avoid creating holes, as per existing comment
---
drivers/gpu/drm/i915/i915_drv.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 515e335..4b84373 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
This adds a module parameter to the i915 DRM driver: force_dp_sst. This
parameter allows forcing the use of single-stream transport (SST) for
DisplayPort connections (thus effectively disabling multi-stream transport,
MST). This is immediately useful as a debugging feature, but is also useful
From: Clint Taylor
WARNING: Using ChromeOS with an eDP panel and a 4K@60 DP monitor connected
to DDI1 the system will hard hang during a cold boot. Occurs when DDI1
is enabled when the cdclk is less then required. DP connected to DDI2
and HPD on either port works correctly.
Set cdclk based on th
On Thu, Mar 10, 2016 at 08:22:58PM +, Peter Antoine wrote:
> Allow for the MOCS to be programmed for all engines.
> Currently we program the MOCS when the first render batch
> goes through. This works on most platforms but fails on
> platforms that do not run a render batch early,
> i.e. headle
Allow for the MOCS to be programmed for all engines.
Currently we program the MOCS when the first render batch
goes through. This works on most platforms but fails on
platforms that do not run a render batch early,
i.e. headless servers. The patch now programs all initialised engines
on init and th
From: Clint Taylor
WARNING: Using ChromeOS with an eDP panel and a 4K@60 DP monitor connected
to DDI1 the system will hard hang during a cold boot. Occurs when DDI1
is enabled when the cdclk is less then required. DP connected to DDI2
and HPD on either port works correctly.
Set cdclk based on th
On ke, 2016-03-09 at 16:03 +, Chris Wilson wrote:
> On Wed, Mar 09, 2016 at 05:31:39PM +0200, Imre Deak wrote:
> > While working on the CDCLK init code I realized that the driver
> > load time
> > dependencies between the different init steps are rather difficult
> > to follow
> > and so it's n
On Fri, Mar 04, 2016 at 08:50:41PM -0600, Pierre-Louis Bossart wrote:
> Add header files for interface available on Baytrail and CherryTrail
>
> Initial code was downloaded from https://github.com/01org/baytrailaudio/
> ...and had the changes to .config stripped and the revert on sound/init.c
> do
LGTM. Reviewed-by: Alex Dai
On 03/08/2016 03:38 AM, Arun Siluvery wrote:
Due to timing issues in the HW some of the status bits required for GuC
authentication doesn't get set occassionally, when that happens, GuC cannot
be initialized and we will be left with a wedged GPU. The WA suggested is
On Fri, Mar 04, 2016 at 08:50:41PM -0600, Pierre-Louis Bossart wrote:
> Add header files for interface available on Baytrail and CherryTrail
>
> Initial code was downloaded from https://github.com/01org/baytrailaudio/
> ...and had the changes to .config stripped and the revert on sound/init.c
> do
On Fri, Mar 04, 2016 at 08:50:39PM -0600, Pierre-Louis Bossart wrote:
> 'intel_hdmi' variable is redeclared, use same variable declared in
> function scope.
>
> Signed-off-by: Pierre-Louis Bossart
> ---
> drivers/gpu/drm/i915/intel_hdmi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Co-Author : Marius Vlad
Co-Author : Pratik Vishwakarma
So far we have had only two commit styles, COMMIT_LEGACY
and COMMIT_UNIVERSAL. This patch adds another commit style
COMMIT_ATOMIC which makes use of drmModeAtomicCommit()
v2: (Marius)
i)Set CRTC_ID to zero while disabling plane
== Series Details ==
Series: intel_engine_cs renaming bomb (rev3)
URL : https://patchwork.freedesktop.org/series/4303/
State : warning
== Summary ==
Series 4303v3 intel_engine_cs renaming bomb
http://patchwork.freedesktop.org/api/1.0/series/4303/revisions/3/mbox/
Test kms_flip:
Subgro
On 10/03/16 16:43, Arun Siluvery wrote:
On 10/03/2016 16:28, Tvrtko Ursulin wrote:
Hi,
On 10/03/16 15:00, Arun Siluvery wrote:
On 10/03/2016 14:21, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
I think there is consesus to do this, but the question
is whether now is the time to do it?
If de
On 10/03/2016 16:28, Tvrtko Ursulin wrote:
Hi,
On 10/03/16 15:00, Arun Siluvery wrote:
On 10/03/2016 14:21, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
I think there is consesus to do this, but the question
is whether now is the time to do it?
If desired, needs to go in quickly before it go
== Series Details ==
Series: drm/i915/mocs: Program MOCS for all engines on init (rev3)
URL : https://patchwork.freedesktop.org/series/4310/
State : failure
== Summary ==
Series 4310v3 drm/i915/mocs: Program MOCS for all engines on init
http://patchwork.freedesktop.org/api/1.0/series/4310/revi
Hi,
On 10/03/16 15:00, Arun Siluvery wrote:
On 10/03/2016 14:21, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
I think there is consesus to do this, but the question
is whether now is the time to do it?
If desired, needs to go in quickly before it goes stale.
But if not, it was an interesting
Hi Akash,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20160310]
[cannot apply to v4.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/akash-goel
== Series Details ==
Series: drm/i915: Restrict usage of live status check (rev2)
URL : https://patchwork.freedesktop.org/series/4297/
State : failure
== Summary ==
Series 4297v2 drm/i915: Restrict usage of live status check
http://patchwork.freedesktop.org/api/1.0/series/4297/revisions/2/mbox
From: Tvrtko Ursulin
Some trivial ones, first pass done with Coccinelle:
@@
@@
(
- I915_NUM_RINGS
+ I915_NUM_ENGINES
|
- intel_ring_flag
+ intel_engine_flag
|
- for_each_ring
+ for_each_engine
|
- i915_gem_request_get_ring
+ i915_gem_request_get_engine
|
- intel_ring_idle
+ intel_engine_idle
|
-
From: Tvrtko Ursulin
From ring to engine, by the virtue of Coccinelle patch
below and a couple manual fixups.
@@
identifier I, J;
@@
struct I {
...
- struct intel_engine_cs *J;
+ struct intel_engine_cs *engine;
...
}
@@
identifier I, J;
@@
struct I {
...
- struct intel_engine_cs J;
+ struct inte
Sorry chris, resent the patch, it was the wrong one.
I'll update the version and send again.
Peter.
-Original Message-
From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
Sent: Thursday, March 10, 2016 3:36 PM
To: Antoine, Peter
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-g
On Thu, Mar 10, 2016 at 03:27:00PM +, Peter Antoine wrote:
> Allow for the MOCS to be programmed for all engines.
> Currently we program the MOCS when the first render batch
> goes through. This works on most platforms but fails on
> platforms that do not run a render batch early,
> i.e. headle
Hey Dave,
On Thu, 2016-03-10 at 09:30 +1000, Dave Airlie wrote:
> Okay so I'm not sure you are heading in the best direction here.
>
> My first suggestion is to stop using the MBP, start using the Lenovo.
> At least from a Fedora perspective, that is the hw we have more
> installs of and
> care
On Thu, 2016-03-10 at 16:29 +0100, Bastien Nocera wrote:
> > Then we need something in the DE to allow us to launch or have some
> > app info that would
> > decide to launch certain 3D using apps on the more powerful
> > processor.
>
> That's what I started working on, exporting the fact that 2 GP
Hi Tvrtko,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20160310]
[cannot apply to v4.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Tvrtko
== Series Details ==
Series: intel_engine_cs renaming bomb
URL : https://patchwork.freedesktop.org/series/4303/
State : failure
== Summary ==
^
include/trace/perf.h:68:4: note: in definition of macro 'DECLARE_EVENT_CLASS'
{ assign; } \
^
include/trace/trac
Allow for the MOCS to be programmed for all engines.
Currently we program the MOCS when the first render batch
goes through. This works on most platforms but fails on
platforms that do not run a render batch early,
i.e. headless servers. The patch now programs all initialised engines
on init and th
Ignore this patch.
It is the wrong patch.
Peter.
-Original Message-
From: Antoine, Peter
Sent: Thursday, March 10, 2016 3:27 PM
To: intel-gfx@lists.freedesktop.org
Cc: Mcgee, Jeff ; Antoine, Peter
Subject: [PATCH] drm/i915/mocs: Program MOCS for all engines on init
Allow for the MOCS t
== Series Details ==
Series: drm/i915: Exit cherryview_irq_handler() after one pass (rev2)
URL : https://patchwork.freedesktop.org/series/4298/
State : failure
== Summary ==
Series 4298v2 drm/i915: Exit cherryview_irq_handler() after one pass
http://patchwork.freedesktop.org/api/1.0/series/429
Allow for the MOCS to be programmed for all engines.
Currently we program the MOCS when the first render batch
goes through. This works on most platforms but fails on
platforms that do not run a render batch early,
i.e. headless servers. The patch now programs all initialised engines
on init and th
== Series Details ==
Series: drm: fix blob pointer check
URL : https://patchwork.freedesktop.org/series/4296/
State : failure
== Summary ==
Series 4296v1 drm: fix blob pointer check
http://patchwork.freedesktop.org/api/1.0/series/4296/revisions/1/mbox/
Test drv_module_reload_basic:
Hi Tvrtko,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20160310]
[cannot apply to v4.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Tvrtko
== Series Details ==
Series: drm: fix blob pointer check (rev2)
URL : https://patchwork.freedesktop.org/series/4296/
State : failure
== Summary ==
Series 4296v2 drm: fix blob pointer check
http://patchwork.freedesktop.org/api/1.0/series/4296/revisions/2/mbox/
Test drv_module_reload_basic:
== Series Details ==
Series: drm/i915: Restrict usage of live status check
URL : https://patchwork.freedesktop.org/series/4297/
State : failure
== Summary ==
Series 4297v1 drm/i915: Restrict usage of live status check
http://patchwork.freedesktop.org/api/1.0/series/4297/revisions/1/mbox/
Test
On 10/03/2016 14:21, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
I think there is consesus to do this, but the question
is whether now is the time to do it?
If desired, needs to go in quickly before it goes stale.
But if not, it was an interesting exercise of learning
Coccinelle nevertheless.
On 10/03/16 14:49, Chris Wilson wrote:
On Thu, Mar 10, 2016 at 02:21:08PM +, Tvrtko Ursulin wrote:
@@ -4952,14 +4952,14 @@ int i915_gem_init(struct drm_device *dev)
if (!i915.enable_execlists) {
dev_priv->gt.execbuf_submit = i915_gem_ringbuffer_submission;
-
On Thu, Mar 10, 2016 at 02:21:03PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> I think there is consesus to do this, but the question
> is whether now is the time to do it?
>
> If desired, needs to go in quickly before it goes stale.
>
> But if not, it was an interesting exercise of
On Thu, Mar 10, 2016 at 02:21:08PM +, Tvrtko Ursulin wrote:
> @@ -4952,14 +4952,14 @@ int i915_gem_init(struct drm_device *dev)
>
> if (!i915.enable_execlists) {
> dev_priv->gt.execbuf_submit = i915_gem_ringbuffer_submission;
> - dev_priv->gt.init_rings = i915_
Android defines __USE_GNU but does not provide pthread_attr_setaffinity_np()
so added an extra guard arround pthread_attr_setaffinity_np().
Signed-off-by: Derek Morton
---
benchmarks/gem_syslatency.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/benchmarks/gem_syslatency.c b/benchmarks/g
On 3/9/2016 11:31 AM, akash.g...@intel.com wrote:
From: Akash Goel
This patch provides the testcase to exercise the TRTT hardware.
...
--- /dev/null
+++ b/tests/gem_trtt.c
@@ -0,0 +1,498 @@
...
+
+/* gen8_canonical_addr
+ * Used to convert any address into canonical form, i.e. [63:48] == [
From: Tvrtko Ursulin
This time using only sed and a few by hand.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_dma.c | 4 +--
drivers/gpu/drm/i915/i915_drv.h | 12
drivers/gpu/drm/i915/i915_gem.c | 50 -
drivers/gp
From: Tvrtko Ursulin
Some trivial ones, first pass done with Coccinelle:
@@
@@
(
- I915_NUM_RINGS
+ I915_NUM_ENGINES
|
- intel_ring_flag
+ intel_engine_flag
|
- for_each_ring
+ for_each_engine
|
- i915_gem_request_get_ring
+ i915_gem_request_get_engine
|
- intel_ring_idle
+ intel_engine_idle
|
-
From: Tvrtko Ursulin
From ring to engine, by the virtue of Coccinelle patch
below and a couple manual fixups.
@@
identifier I, J;
@@
struct I {
...
- struct intel_engine_cs *J;
+ struct intel_engine_cs *engine;
...
}
@@
identifier I, J;
@@
struct I {
...
- struct intel_engine_cs J;
+ struct inte
From: Tvrtko Ursulin
I think there is consesus to do this, but the question
is whether now is the time to do it?
If desired, needs to go in quickly before it goes stale.
But if not, it was an interesting exercise of learning
Coccinelle nevertheless.
Tvrtko Ursulin (5):
drm/i915: Rename local
On Wed, Mar 09, 2016 at 01:58:39PM -0800, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> WARNING: Using ChromeOS with an eDP panel and a 4K@60 DP monitor connected
> to DDI1 the system will hard hang during a cold boot. Occurs when DDI1
> is enabled when the cdclk is less then require
Hi,
See bellow:
On Wed, Mar 09, 2016 at 07:43:54PM +0530, Mayuresh Gharpure wrote:
> Co-Author : Marius Vlad
> Co-Author : Pratik Vishwakarma
>
> So far we have had only two commit styles, COMMIT_LEGACY
> and COMMIT_UNIVERSAL. This patch adds another commit style
> COMMIT_ATOMIC which make
Regards
Shashank
On 3/10/2016 6:37 PM, Ville Syrjälä wrote:
On Thu, Mar 10, 2016 at 06:12:32PM +0530, Sharma, Shashank wrote:
Thanks Ville,
Regards
Shashank
On 3/10/2016 5:10 PM, Ville Syrjälä wrote:
On Thu, Mar 10, 2016 at 05:05:47PM +0530, Shashank Sharma wrote:
This patch does the follow
This patch does the following:
- Restricts usage of live status check for HDMI detection.
While testing certain (monitor + cable) combinations with
various intel platforms, it seems that live status register
doesn't work reliably on some older devices. So limit the
live_status check for HD
On Thu, Mar 10, 2016 at 06:12:32PM +0530, Sharma, Shashank wrote:
> Thanks Ville,
>
> Regards
> Shashank
>
> On 3/10/2016 5:10 PM, Ville Syrjälä wrote:
> > On Thu, Mar 10, 2016 at 05:05:47PM +0530, Shashank Sharma wrote:
> >> This patch does the following:
> >> - Restricts usage of live status ch
On Thu, Mar 10, 2016 at 12:42:48PM +, Chris Wilson wrote:
> On Thu, Mar 10, 2016 at 02:24:39PM +0200, Ville Syrjälä wrote:
> > On Thu, Mar 10, 2016 at 12:10:46PM +, Chris Wilson wrote:
> > > My testing only looks at the GT side, and we do stress that pretty hard
> > > because of execlists a
== Series Details ==
Series: drm/i915: Restrict usage of live status check
URL : https://patchwork.freedesktop.org/series/4297/
State : failure
== Summary ==
Series 4297v1 drm/i915: Restrict usage of live status check
http://patchwork.freedesktop.org/api/1.0/series/4297/revisions/1/mbox/
Test
On Thu, Mar 10, 2016 at 12:10:30PM +, Daniel Stone wrote:
> On 10 March 2016 at 12:04, Lionel Landwerlin
> wrote:
> > Check properly that the allocated blob's pointer is valid.
> >
> > Signed-off-by: Lionel Landwerlin
> > Reported-by: Dan Carpenter
> > Cc: Daniel Stone
>
> Reviewed-by: Dan
The GAMMA_LUT property must be updated when the legacy ioctl is
triggered to ensure the new property does not impact older userspace
code.
Signed-off-by: Lionel Landwerlin
Cc: Matt Roper
---
tests/kms_pipe_color.c | 101 +
1 file changed, 101 inse
Signed-off-by: Lionel Landwerlin
---
lib/igt_debugfs.c | 17 +
lib/igt_debugfs.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c
index c291ef3..a32ed78 100644
--- a/lib/igt_debugfs.c
+++ b/lib/igt_debugfs.c
@@ -252,6 +252,23 @@ bool ig
This test enables testing of :
* degamma LUTs
* csc matrix
* gamma LUTs
* legacy gamma LUTs
v2: turn assert into require to skip on platform not supporting color
management
v3: add invalid blob ids tests
v4: Try to match CRC results against several values around the
v2: Rename CTM_MATRIX property to CTM
Signed-off-by: Lionel Landwerlin
---
lib/igt_kms.c | 74 +++
lib/igt_kms.h | 17 +-
2 files changed, 90 insertions(+), 1 deletion(-)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index e47a76e
This is a helper to draw a gradient between 2 colors.
Signed-off-by: Lionel Landwerlin
---
lib/igt_fb.c | 34 ++
lib/igt_fb.h | 3 +++
2 files changed, 37 insertions(+)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 7b53556..06f4a62 100644
--- a/lib/igt_fb.c
+++
Signed-off-by: Lionel Landwerlin
---
lib/igt_kms.c | 1 +
lib/igt_kms.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 9f18aef..e47a76e 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -1095,6 +1095,7 @@ void igt_display_init(igt_display_t *display, int
Hi,
This series enables testing pipe level color management using kernel patches
from this serie :
https://patchwork.freedesktop.org/series/2720/
Most of the tests use pipe CRCs to check the results by comparing the output
with the expected output drawn using cairo.
Cheers,
Lionel
Lionel Land
Thanks Ville,
Regards
Shashank
On 3/10/2016 5:10 PM, Ville Syrjälä wrote:
On Thu, Mar 10, 2016 at 05:05:47PM +0530, Shashank Sharma wrote:
This patch does the following:
- Restricts usage of live status check for HDMI detection.
While testing certain (monitor + cable) combinations with
v
On Thu, Mar 10, 2016 at 02:24:39PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 10, 2016 at 12:10:46PM +, Chris Wilson wrote:
> > My testing only looks at the GT side, and we do stress that pretty hard
> > because of execlists and have reasonable methods of detection if we stop
> > processing exec
On 10/03/16 12:18, Chris Wilson wrote:
This effectively reverts
commit 8e5fd599eb219f1054e39b40d18b217af669eea9
Author: Ville Syrjälä
Date: Wed Apr 9 13:28:50 2014 +0300
drm/i915/chv: Make CHV irq handler loop until all interrupts are consumed
as under continuous execlists load we can
On Thu, Mar 10, 2016 at 12:18:49PM +, Chris Wilson wrote:
> This effectively reverts
>
> commit 8e5fd599eb219f1054e39b40d18b217af669eea9
> Author: Ville Syrjälä
> Date: Wed Apr 9 13:28:50 2014 +0300
>
> drm/i915/chv: Make CHV irq handler loop until all interrupts are consumed
>
> as u
On Thu, Mar 10, 2016 at 12:10:46PM +, Chris Wilson wrote:
> On Thu, Mar 10, 2016 at 02:01:27PM +0200, Ville Syrjälä wrote:
> > On Thu, Mar 10, 2016 at 11:44:28AM +, Chris Wilson wrote:
> > > This effectively reverts
> > >
> > > commit 8e5fd599eb219f1054e39b40d18b217af669eea9
> > > Author:
This effectively reverts
commit 8e5fd599eb219f1054e39b40d18b217af669eea9
Author: Ville Syrjälä
Date: Wed Apr 9 13:28:50 2014 +0300
drm/i915/chv: Make CHV irq handler loop until all interrupts are consumed
as under continuous execlists load we can saturate the IRQ handler,
destablising the
Hi Chris,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.5-rc7 next-20160310]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-Exit
On Thu, Mar 10, 2016 at 02:01:27PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 10, 2016 at 11:44:28AM +, Chris Wilson wrote:
> > This effectively reverts
> >
> > commit 8e5fd599eb219f1054e39b40d18b217af669eea9
> > Author: Ville Syrjälä
> > Date: Wed Apr 9 13:28:50 2014 +0300
> >
> > drm/
On 10 March 2016 at 12:04, Lionel Landwerlin
wrote:
> Check properly that the allocated blob's pointer is valid.
>
> Signed-off-by: Lionel Landwerlin
> Reported-by: Dan Carpenter
> Cc: Daniel Stone
Reviewed-by: Daniel Stone
___
Intel-gfx mailing lis
On Thu, Mar 10, 2016 at 12:53:37PM +0100, Maarten Lankhorst wrote:
> Op 10-03-16 om 11:33 schreef Ville Syrjälä:
> > On Thu, Mar 10, 2016 at 10:09:40AM +0100, Maarten Lankhorst wrote:
> >> Op 09-03-16 om 18:07 schreef ville.syrj...@linux.intel.com:
> >>> From: Ville Syrjälä
> >>>
> >>> commit 9282
Check properly that the allocated blob's pointer is valid.
Signed-off-by: Lionel Landwerlin
Reported-by: Dan Carpenter
Cc: Daniel Stone
Cc: Daniel Vetter
Cc: Matt Roper
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_atomic_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 de
On 10/03/16 11:44, Chris Wilson wrote:
This effectively reverts
commit 8e5fd599eb219f1054e39b40d18b217af669eea9
Author: Ville Syrjälä
Date: Wed Apr 9 13:28:50 2014 +0300
drm/i915/chv: Make CHV irq handler loop until all interrupts are consumed
as under continuous execlists load we can
On Thu, Mar 10, 2016 at 11:44:28AM +, Chris Wilson wrote:
> This effectively reverts
>
> commit 8e5fd599eb219f1054e39b40d18b217af669eea9
> Author: Ville Syrjälä
> Date: Wed Apr 9 13:28:50 2014 +0300
>
> drm/i915/chv: Make CHV irq handler loop until all interrupts are consumed
>
> as u
Op 10-03-16 om 11:33 schreef Ville Syrjälä:
> On Thu, Mar 10, 2016 at 10:09:40AM +0100, Maarten Lankhorst wrote:
>> Op 09-03-16 om 18:07 schreef ville.syrj...@linux.intel.com:
>>> From: Ville Syrjälä
>>>
>>> commit 92826fcdfc14 ("drm/i915: Calculate watermark related members in the
>>> crtc_state
== Series Details ==
Series: drm: fix blob pointer check
URL : https://patchwork.freedesktop.org/series/4296/
State : failure
== Summary ==
Series 4296v1 drm: fix blob pointer check
http://patchwork.freedesktop.org/api/1.0/series/4296/revisions/1/mbox/
Test drv_module_reload_basic:
This effectively reverts
commit 8e5fd599eb219f1054e39b40d18b217af669eea9
Author: Ville Syrjälä
Date: Wed Apr 9 13:28:50 2014 +0300
drm/i915/chv: Make CHV irq handler loop until all interrupts are consumed
as under continuous execlists load we can saturate the IRQ handler,
destablising the
On Thu, Mar 10, 2016 at 05:05:47PM +0530, Shashank Sharma wrote:
> This patch does the following:
> - Restricts usage of live status check for HDMI detection.
> While testing certain (monitor + cable) combinations with
> various intel platforms, it seems that live status register
> doesn't w
Hi all,
I have sent one patch with live_status check restricted to gen7 and +, for this
regression.
drm/i915: Restrict usage of live status check
Please help in review.
Regards
Shashank
-Original Message-
From: Sharma, Shashank
Sent: Wednesday, March 09, 2016 11:25 AM
To: Jindal, Soni
This patch does the following:
- Restricts usage of live status check for HDMI detection.
While testing certain (monitor + cable) combinations with
various intel platforms, it seems that live status register
doesn't work reliably on some older devices. So limit the
live_status check for HD
On to, 2016-03-10 at 10:58 +0200, Ander Conselvan De Oliveira wrote:
> On Wed, 2016-03-09 at 17:31 +0200, Imre Deak wrote:
> > All of this is SW only initialization so we can move them earlier.
> > Move
> > the mutex init where the rest of the locks are inited. While at it
> > also
> > convert dev
As reported by Dan Carpenter.
Signed-off-by: Lionel Landwerlin
Cc: Daniel Vetter
---
drivers/gpu/drm/drm_atomic_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 87d0b20..1caddb1 1006
When a higher priority batch buffer bumps a lower priority batch
buffer all batch buffers in the scheduler queue get a small priority
increase. Added a subtest to check this behaviour.
Requested by Joonas Lahtinen during scheduler code review
Signed-off-by: Derek Morton
---
tests/gem_scheduler.
Add subtests to test each ring to check batch buffers of a higher
priority will be executed before batch buffers of a lower priority.
v2: Addressed review comments from Daniele Ceraolo Spurio
Signed-off-by: Derek Morton
---
tests/gem_scheduler.c | 53 +++-
From: John Harrison
The GPU scheduler has added an execution priority level to the context
object. There is an IOCTL interface to allow user apps/libraries to
set this priority. This patch updates the context paramter IOCTL test
to include the new interface.
For: VIZ-1587
Signed-off-by: John Har
This is intended to test the scheduler behaviour is correct.
The subtests are
-basic
Tests that batch buffers of the same priority submitted to a ring
execute in the order they are submitted.
-read
Submits a batch buffer with a read dependency to a buffer object to
a ring which is held in the sched
Adds functions to create a number of different batch buffers to perform
several functions including:
Batch buffer which will run for a long duration to provide a delay on a
specified ring.
Function to calibrate the delay batch buffer to run for a specified period
of time.
Function to create a batch
For tests that use multiple rings to test interactions it is
useful to know if a ring exists without triggering the test to skip.
Signed-off-by: Derek Morton
---
lib/ioctl_wrappers.c | 2 +-
lib/ioctl_wrappers.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/lib/ioctl_wrapp
This patch set adds scheduler tests.
Patch 1 Makes gem_has_ring() non static as the test will need to call it
Patch 2 adds library code used by the tests. There are other tests under
development which are planned to reuse some of these libraries.
Patch 3 adds some basic tests, read dependency tests
== Series Details ==
Series: drm/i915: restrict PP save/restore to platforms with lvds
URL : https://patchwork.freedesktop.org/series/3176/
State : warning
== Summary ==
Series 3176v1 drm/i915: restrict PP save/restore to platforms with lvds
http://patchwork.freedesktop.org/api/1.0/series/3176
On Thu, Mar 10, 2016 at 09:03:37AM +, Matthew Auld wrote:
> > Y tiled fb will be rejected for gen < 9, should use X/linear for those.
>
> Are you referring to the __gem_set_tiling call? Since this didn't fail
> on BDW and I don't see any logic in i915_gem_set_tiling which
> implements this.
N
== Series Details ==
Series: drm/i915: implement WaClearTdlStateAckDirtyBits (rev2)
URL : https://patchwork.freedesktop.org/series/4282/
State : failure
== Summary ==
Series 4282v2 drm/i915: implement WaClearTdlStateAckDirtyBits
http://patchwork.freedesktop.org/api/1.0/series/4282/revisions/2/
On Thu, Mar 10, 2016 at 10:09:40AM +0100, Maarten Lankhorst wrote:
> Op 09-03-16 om 18:07 schreef ville.syrj...@linux.intel.com:
> > From: Ville Syrjälä
> >
> > commit 92826fcdfc14 ("drm/i915: Calculate watermark related members in the
> > crtc_state, v4.")
> > broke thigns by removing the pre vs
On ti, 2016-03-08 at 09:36 +0100, Gerd Hoffmann wrote:
> Hi,
>
> >
> > btw I don't think this vblank issue would be very significant. The main
> > targeted usage of GVT-g is for server virtualization/cloud, where
> > a remoting protocol is required for customer to see the content through
> > n
Op 09-03-16 om 18:07 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> This reverts commit a38c274faad0ec6aba692e294ec751d04dbba803.
>
> PSR causes all sorts of vblank wait timeouts and whanot on CHV. Disable
> it again.
>
> Cc: Rodrigo Vivi
> Fixes: a38c274faad0 ("drm/i915: Enable
Op 09-03-16 om 18:07 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> Pass the current crtc state, not the old crtc state, to the
> .update_plane() hook.
>
> Noticed on BSW when PRIMSIZE was getting programmed to a stale value
> which produced utter garbage on screen eg. wwhen goin
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