Re: [Intel-gfx] [Announcement] 2015-Q3 release of XenGT - a Mediated Graphics Passthrough Solution from Intel

2015-11-19 Thread Tian, Kevin
> From: Alex Williamson [mailto:alex.william...@redhat.com] > Sent: Friday, November 20, 2015 4:03 AM > > > > > > > The proposal is therefore that GPU vendors can expose vGPUs to > > > userspace, and thus to QEMU, using the VFIO API. For instance, vfio > > > supports modular bus drivers and IOMMU

[Intel-gfx] [PATCH i-g-t] tests/gem_softpin: New tests for softpin feature

2015-11-19 Thread Vinay Belgaumkar
These tests exercise the userptr ioctl to create shared buffers between CPU and GPU. They contain error and normal usage scenarios. They also contain a couple of stress tests which copy buffers between CPU and GPU. These tests rely on the softpin patch in order to pin buffers to a certain VA. Cave

[Intel-gfx] [PATCH i-g-t] tests/gem_buffered_svm_test: New tests for buffered SVM feature

2015-11-19 Thread Vinay Belgaumkar
These tests exercise the userptr ioctl to create shared buffers between CPU and GPU. They contain error and normal usage scenarios. They also contain a couple of stress tests which copy buffers between CPU and GPU. These tests rely on the softpin patch in order to pin buffers to a certain VA. Cave

Re: [Intel-gfx] [Announcement] 2015-Q3 release of XenGT - a Mediated Graphics Passthrough Solution from Intel

2015-11-19 Thread Tian, Kevin
> From: Gerd Hoffmann [mailto:kra...@redhat.com] > Sent: Thursday, November 19, 2015 4:41 PM > > Hi, > > > > Another area of extension is how to expose a framebuffer to QEMU for > > > seamless integration into a SPICE/VNC channel. For this I believe we > > > could use a new region, much like w

Re: [Intel-gfx] [Announcement] 2015-Q3 release of XenGT - a Mediated Graphics Passthrough Solution from Intel

2015-11-19 Thread Tian, Kevin
> From: Song, Jike > Sent: Friday, November 20, 2015 1:52 PM > > On 11/20/2015 12:22 PM, Alex Williamson wrote: > > On Fri, 2015-11-20 at 10:58 +0800, Jike Song wrote: > >> On 11/19/2015 11:52 PM, Alex Williamson wrote: > >>> On Thu, 2015-11-19 at 15:32 +, Stefano Stabellini wrote: > On T

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Remove PSR Perf Counter for SKL+

2015-11-19 Thread Jindal, Sonika
Hmm, please help me understand more about it. As per bspec this is a RW register. Also, restoring the register values, isn't it part of the firmware's job? Do we have any communication from HW team on this? Regards, Sonika -Original Message- From: Rodrigo Vivi [mailto:rodrigo.v...@gmail.c

Re: [Intel-gfx] [Announcement] 2015-Q3 release of XenGT - a Mediated Graphics Passthrough Solution from Intel

2015-11-19 Thread Jike Song
On 11/20/2015 12:22 PM, Alex Williamson wrote: On Fri, 2015-11-20 at 10:58 +0800, Jike Song wrote: On 11/19/2015 11:52 PM, Alex Williamson wrote: On Thu, 2015-11-19 at 15:32 +, Stefano Stabellini wrote: On Thu, 19 Nov 2015, Jike Song wrote: Hi Alex, thanks for the discussion. In addition

Re: [Intel-gfx] [Announcement] 2015-Q3 release of XenGT - a Mediated Graphics Passthrough Solution from Intel

2015-11-19 Thread Alex Williamson
On Fri, 2015-11-20 at 10:58 +0800, Jike Song wrote: > On 11/19/2015 11:52 PM, Alex Williamson wrote: > > On Thu, 2015-11-19 at 15:32 +, Stefano Stabellini wrote: > >> On Thu, 19 Nov 2015, Jike Song wrote: > >>> Hi Alex, thanks for the discussion. > >>> > >>> In addition to Kevin's replies, I ha

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Sanitize watermarks after hardware state readout (v2)

2015-11-19 Thread Matt Roper
On Thu, Nov 05, 2015 at 02:55:20PM +0200, Jani Nikula wrote: > On Thu, 05 Nov 2015, Matt Roper wrote: > > On Wed, Nov 04, 2015 at 04:12:33PM +0200, Jani Nikula wrote: > >> On Tue, 03 Nov 2015, Matt Roper wrote: > >> > Although we can do a good job of reading out hardware state, the > >> > graphic

Re: [Intel-gfx] [Announcement] 2015-Q3 release of XenGT - a Mediated Graphics Passthrough Solution from Intel

2015-11-19 Thread Jike Song
On 11/19/2015 11:52 PM, Alex Williamson wrote: On Thu, 2015-11-19 at 15:32 +, Stefano Stabellini wrote: On Thu, 19 Nov 2015, Jike Song wrote: Hi Alex, thanks for the discussion. In addition to Kevin's replies, I have a high-level question: can VFIO be used by QEMU for both KVM and Xen? N

Re: [Intel-gfx] [Announcement] 2015-Q3 release of XenGT - a Mediated Graphics Passthrough Solution from Intel

2015-11-19 Thread Jike Song
On 11/19/2015 07:09 PM, Paolo Bonzini wrote: On 19/11/2015 09:40, Gerd Hoffmann wrote: But this code should be minor to be maintained in libvirt. As far I know libvirt only needs to discover those devices. If they look like sr/iov devices in sysfs this might work without any changes to libvirt

[Intel-gfx] [PATCH V3 1/1] drm/i915/audio: apply SKL codec wake up patch to BXT

2015-11-19 Thread han . lu
From: "Lu, Han" For SKL we added a commit 632f3ab95fe2 ("drm/i915/audio: add codec wakeup override enabled/disable callback"), in order to enable codec wakeup override signal, to allow re-enumeration of the controller on SKL after resume from low power state. In SKL, HDMI/DP codec and PCH HD Audi

Re: [Intel-gfx] [PATCH V2 1/1] drm/i915/audio: apply SKL codec wake up patch to BXT

2015-11-19 Thread Han Lu
On 11/20/2015 12:01 AM, Jani Nikula wrote: On Thu, 19 Nov 2015, Daniel Vetter wrote: On Thu, Nov 19, 2015 at 10:44:48PM +0800, han...@intel.com wrote: From: "Lu, Han" For SKL we added a commit 632f3ab95fe2 ("drm/i915/audio: add codec wakeup override enabled/disable callback"), in order to en

[Intel-gfx] [PATCH v1] drm/i915: Defer LRC unpin and release

2015-11-19 Thread yu . dai
From: Alex Dai Can't immediately free LRC (neither unpin it) even all its referenced requests are completed, because HW still need a short period of time to save data to LRC status page. It is safe to free LRC when HW completes a request from a different LRC. Introduce a new function intel_lr_co

Re: [Intel-gfx] [PATCH 1/7] drm/i915: sseu: move sseu_dev_status to i915_drv.h

2015-11-19 Thread Jeff McGee
On Thu, Nov 19, 2015 at 03:10:14PM -0800, Ben Widawsky wrote: > On Wed, Oct 21, 2015 at 06:40:31PM +0300, Imre Deak wrote: > > The data in this struct is provided both by getting the > > slice/subslice/eu features available on a given platform and the actual > > runtime state of these same features

[Intel-gfx] [PATCH] drm/i915/guc: Keep irq enabled during GuC cmd submission

2015-11-19 Thread yu . dai
From: Alex Dai When GuC Work Queue is full, driver will wait GuC for avaliable space by calling wait_for_atomic. If irq is disabled, lockup will happen because jiffies won't be updated. Issue is found in igt/gem_close_race. Signed-off-by: Alex Dai --- drivers/gpu/drm/i915/i915_guc_submission.

[Intel-gfx] [PATCH v1] drm/i915: Fix a false alert of memory leak when free LRC

2015-11-19 Thread yu . dai
From: Alex Dai There is a memory leak warning message from i915_gem_context_clean when GuC submission is enabled. The reason is that when LRC is released, its ppgtt could be still referenced. The assumption that all VMAs are unbound during release of LRC is not true. v1: Move the code inside i91

Re: [Intel-gfx] [PATCH 7/7] drm/i915/bdw: sseu: fix sseu status parsing

2015-11-19 Thread Ben Widawsky
On Wed, Oct 21, 2015 at 06:40:37PM +0300, Imre Deak wrote: > Currently when checking for fused off EUs we may ignore the EU count in > an enabled slice if there is any disabled slice preceding the enabled > one (with a lower slice ID). Perhaps this can't happen in reality, but > there is no reason

Re: [Intel-gfx] [PATCH 5/7] drm/i915: sseu: convert subslice count fields to subslice mask

2015-11-19 Thread Ben Widawsky
On Wed, Oct 21, 2015 at 06:40:35PM +0300, Imre Deak wrote: > In an upcoming patch we'll need the actual mask of subslices in addition > to their count, so convert the subslice_per_slice field to a mask. > Also we can easily calculate subslice_total from the other fields, so > instead of storing a c

Re: [Intel-gfx] [PATCH 4/7] drm/i915: sseu: convert slice count field to mask

2015-11-19 Thread Ben Widawsky
On Wed, Oct 21, 2015 at 06:40:34PM +0300, Imre Deak wrote: > In an upcoming patch we'll need the actual mask of slices in addition to > their count, so replace the count field with a mask. > > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/i915_debugfs.c | 14 +++--- > drivers/gpu

Re: [Intel-gfx] [PATCH 3/7] drm/i915: sseu: simplify debugfs status/info printing

2015-11-19 Thread Ben Widawsky
On Wed, Oct 21, 2015 at 06:40:33PM +0300, Imre Deak wrote: > Signed-off-by: Imre Deak Reviewed-by: Ben Widawsky > --- > drivers/gpu/drm/i915/i915_debugfs.c | 55 > +++-- > 1 file changed, 29 insertions(+), 26 deletions(-) > > diff --git a/drivers/gpu/drm/i915/

Re: [Intel-gfx] [PATCH 2/7] drm/i915: sseu: use sseu_dev_info in device info

2015-11-19 Thread Ben Widawsky
On Wed, Oct 21, 2015 at 06:40:32PM +0300, Imre Deak wrote: > Move all slice/subslice/eu related properties to the sseu_dev_info > struct. > > No functional change. > > Signed-off-by: Imre Deak Reviewed-by: Ben Widawsky > --- > drivers/gpu/drm/i915/i915_debugfs.c | 25

Re: [Intel-gfx] [PATCH 1/7] drm/i915: sseu: move sseu_dev_status to i915_drv.h

2015-11-19 Thread Ben Widawsky
On Wed, Oct 21, 2015 at 06:40:31PM +0300, Imre Deak wrote: > The data in this struct is provided both by getting the > slice/subslice/eu features available on a given platform and the actual > runtime state of these same features which depends on the HW's current > power saving state. > > Atm memb

Re: [Intel-gfx] [PATCH v3 1/2] drm/i915: Tear down fbdev if initialization fails

2015-11-19 Thread Lukas Wunner
Hi Chris, On Thu, Nov 19, 2015 at 09:46:34PM +, Chris Wilson wrote: > On Thu, Nov 19, 2015 at 04:58:44PM +0100, Daniel Vetter wrote: > > On Wed, Nov 18, 2015 at 04:29:51PM +0100, Lukas Wunner wrote: > > > @@ -727,7 +730,8 @@ void intel_fbdev_fini(struct drm_device *dev) > > > > > > flush_w

Re: [Intel-gfx] [PATCH 1/2] drm/i915: take a power domain ref only when needed during HDMI detect

2015-11-19 Thread Imre Deak
On Thu, 2015-11-19 at 23:50 +0200, Imre Deak wrote: > On Thu, 2015-11-19 at 21:38 +, Chris Wilson wrote: > > On Thu, Nov 19, 2015 at 11:01:49PM +0200, Imre Deak wrote: > > > On Thu, 2015-11-19 at 20:51 +, Chris Wilson wrote: > > > > On Thu, Nov 19, 2015 at 08:55:00PM +0200, Imre Deak wrote:

Re: [Intel-gfx] [PATCH 1/2] drm/i915: take a power domain ref only when needed during HDMI detect

2015-11-19 Thread Imre Deak
On Thu, 2015-11-19 at 21:38 +, Chris Wilson wrote: > On Thu, Nov 19, 2015 at 11:01:49PM +0200, Imre Deak wrote: > > On Thu, 2015-11-19 at 20:51 +, Chris Wilson wrote: > > > On Thu, Nov 19, 2015 at 08:55:00PM +0200, Imre Deak wrote: > > > > Suggested by Ville. > > > > > > Do you mind explai

Re: [Intel-gfx] [PATCH v3 1/2] drm/i915: Tear down fbdev if initialization fails

2015-11-19 Thread Chris Wilson
On Thu, Nov 19, 2015 at 04:58:44PM +0100, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 04:29:51PM +0100, Lukas Wunner wrote: > > @@ -727,7 +730,8 @@ void intel_fbdev_fini(struct drm_device *dev) > > > > flush_work(&dev_priv->fbdev_suspend_work); > > > > - async_synchronize_full(); > > +

Re: [Intel-gfx] [PATCH 1/2] drm/i915: take a power domain ref only when needed during HDMI detect

2015-11-19 Thread Chris Wilson
On Thu, Nov 19, 2015 at 11:01:49PM +0200, Imre Deak wrote: > On Thu, 2015-11-19 at 20:51 +, Chris Wilson wrote: > > On Thu, Nov 19, 2015 at 08:55:00PM +0200, Imre Deak wrote: > > > Suggested by Ville. > > > > Do you mind explaining why this is done at the hdmi level and not the > > gmbus level

Re: [Intel-gfx] [PATCH] drm/i915: Try to fix MST for SKL

2015-11-19 Thread Kenneth Johansson
On 2015-11-10 21:15, Jesse Barnes wrote: On 08/17/2015 08:46 AM, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä Set up the DDI->PLL mapping on SKL also for MST links. Might help make MST operational on SKL. Cc: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i

Re: [Intel-gfx] [PATCH 11/9] drm/i915: Opt out of vblank disable timer on >gen2

2015-11-19 Thread Chris Wilson
On Thu, Nov 19, 2015 at 10:06:01PM +0200, Ville Syrjälä wrote: > On Thu, Nov 19, 2015 at 05:44:51PM -0200, Paulo Zanoni wrote: > > 2014-05-26 11:26 GMT-03:00 : > > > From: Ville Syrjälä > > > > > > Now that the vblank races are plugged, we can opt out of using > > > the vblank disable timer and j

Re: [Intel-gfx] [PATCH 11/9] drm/i915: Opt out of vblank disable timer on >gen2

2015-11-19 Thread Ville Syrjälä
On Thu, Nov 19, 2015 at 10:53:30PM +0200, Ville Syrjälä wrote: > On Thu, Nov 19, 2015 at 06:35:04PM -0200, Paulo Zanoni wrote: > > 2015-11-19 18:06 GMT-02:00 Ville Syrjälä : > > > On Thu, Nov 19, 2015 at 05:44:51PM -0200, Paulo Zanoni wrote: > > >> 2014-05-26 11:26 GMT-03:00 : > > >> > From: Ville

Re: [Intel-gfx] [PATCH] drm/sysfs: Send out uevent when connector->force changes

2015-11-19 Thread Chris Wilson
On Thu, Nov 19, 2015 at 05:46:50PM +0100, Daniel Vetter wrote: > To avoid even more code duplication punt this all to the probe worker, > which needs some slight adjustment to also generate a uevent when the > status has changed to due connector->force. > > v2: Instead of running the output_poll_w

Re: [Intel-gfx] [PATCH] igt/gem_request_retire: Provoke context destruction with active VMAs

2015-11-19 Thread Chris Wilson
On Thu, Nov 19, 2015 at 05:24:03PM +, Tvrtko Ursulin wrote: > >>+ while (i % 4) > >>+ batch[i++] = MI_NOOP; > > Is this ok? I arrived at it by experimentation, kernel was > complaining that relocations are not 4-byte aligned without it. batch is u32, so all is good

Re: [Intel-gfx] [PATCH 1/2] drm/i915: take a power domain ref only when needed during HDMI detect

2015-11-19 Thread Imre Deak
On Thu, 2015-11-19 at 20:51 +, Chris Wilson wrote: > On Thu, Nov 19, 2015 at 08:55:00PM +0200, Imre Deak wrote: > > Suggested by Ville. > > Do you mind explaining why this is done at the hdmi level and not the > gmbus level? To reduce the on/off toggling, since we don't have delayed power-off

Re: [Intel-gfx] [PATCH 11/9] drm/i915: Opt out of vblank disable timer on >gen2

2015-11-19 Thread Ville Syrjälä
On Thu, Nov 19, 2015 at 06:35:04PM -0200, Paulo Zanoni wrote: > 2015-11-19 18:06 GMT-02:00 Ville Syrjälä : > > On Thu, Nov 19, 2015 at 05:44:51PM -0200, Paulo Zanoni wrote: > >> 2014-05-26 11:26 GMT-03:00 : > >> > From: Ville Syrjälä > >> > > >> > Now that the vblank races are plugged, we can opt

Re: [Intel-gfx] [PATCH 1/2] drm/i915: take a power domain ref only when needed during HDMI detect

2015-11-19 Thread Chris Wilson
On Thu, Nov 19, 2015 at 08:55:00PM +0200, Imre Deak wrote: > Suggested by Ville. Do you mind explaining why this is done at the hdmi level and not the gmbus level? -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list I

Re: [Intel-gfx] [PATCH 11/9] drm/i915: Opt out of vblank disable timer on >gen2

2015-11-19 Thread Paulo Zanoni
2015-11-19 18:06 GMT-02:00 Ville Syrjälä : > On Thu, Nov 19, 2015 at 05:44:51PM -0200, Paulo Zanoni wrote: >> 2014-05-26 11:26 GMT-03:00 : >> > From: Ville Syrjälä >> > >> > Now that the vblank races are plugged, we can opt out of using >> > the vblank disable timer and just let vblank interrupts

Re: [Intel-gfx] [PATCH v3 1/2] drm/i915: Tear down fbdev if initialization fails

2015-11-19 Thread Lukas Wunner
Hi again, On Thu, Nov 19, 2015 at 05:02:04PM +0100, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 01:43:20PM +0100, Lukas Wunner wrote: > > --- a/drivers/gpu/drm/i915/intel_dp_mst.c > > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c > > @@ -408,7 +408,10 @@ static void intel_connector_add_to_fbdev(str

[Intel-gfx] [PATCH 06/12] drm/i915: alloc/free the FBC CFB during enable/disable

2015-11-19 Thread Paulo Zanoni
One of the problems with the current code is that it frees the CFB and releases its drm_mm node as soon as we flip FBC's enable bit. This is bad because after we disable FBC the hardware may still use the CFB for the rest of the frame, so in theory we should only release the drm_mm node one frame a

Re: [Intel-gfx] [PATCH 11/9] drm/i915: Opt out of vblank disable timer on >gen2

2015-11-19 Thread Ville Syrjälä
On Thu, Nov 19, 2015 at 05:44:51PM -0200, Paulo Zanoni wrote: > 2014-05-26 11:26 GMT-03:00 : > > From: Ville Syrjälä > > > > Now that the vblank races are plugged, we can opt out of using > > the vblank disable timer and just let vblank interrupts get > > disabled immediately when the last refere

Re: [Intel-gfx] [Announcement] 2015-Q3 release of XenGT - a Mediated Graphics Passthrough Solution from Intel

2015-11-19 Thread Alex Williamson
Hi Kevin, On Thu, 2015-11-19 at 04:06 +, Tian, Kevin wrote: > > From: Alex Williamson [mailto:alex.william...@redhat.com] > > Sent: Thursday, November 19, 2015 2:12 AM > > > > [cc +qemu-devel, +paolo, +gerd] > > > > On Tue, 2015-10-27 at 17:25 +0800, Jike Song wrote: > > > Hi all, > > > > >

Re: [Intel-gfx] [PATCH 11/9] drm/i915: Opt out of vblank disable timer on >gen2

2015-11-19 Thread Paulo Zanoni
2014-05-26 11:26 GMT-03:00 : > From: Ville Syrjälä > > Now that the vblank races are plugged, we can opt out of using > the vblank disable timer and just let vblank interrupts get > disabled immediately when the last reference is dropped. > > Gen2 is the exception since it has no hardware frame c

Re: [Intel-gfx] [PATCH 2/2] drm/i915: take a power domain reference while checking the HDMI live status

2015-11-19 Thread Ville Syrjälä
On Thu, Nov 19, 2015 at 09:13:04PM +0200, Imre Deak wrote: > On Thu, 2015-11-19 at 21:08 +0200, Ville Syrjälä wrote: > > On Thu, Nov 19, 2015 at 08:55:01PM +0200, Imre Deak wrote: > > > There are platforms that don't need the full GMBUS power domain > > > (PCH, BXT) while others do (VLV/CHV). For o

Re: [Intel-gfx] [PATCH 2/2] drm/i915: take a power domain reference while checking the HDMI live status

2015-11-19 Thread Imre Deak
On Thu, 2015-11-19 at 21:08 +0200, Ville Syrjälä wrote: > On Thu, Nov 19, 2015 at 08:55:01PM +0200, Imre Deak wrote: > > There are platforms that don't need the full GMBUS power domain > > (PCH, BXT) while others do (VLV/CHV). For optimizing this we > > would need to add a new power domain, but it'

Re: [Intel-gfx] [PATCH 2/2] drm/i915: take a power domain reference while checking the HDMI live status

2015-11-19 Thread Ville Syrjälä
On Thu, Nov 19, 2015 at 08:55:01PM +0200, Imre Deak wrote: > There are platforms that don't need the full GMBUS power domain > (PCH, BXT) while others do (VLV/CHV). For optimizing this we > would need to add a new power domain, but it's not clear how much we > would benefit given the short time we

[Intel-gfx] [PATCH 2/2] drm/i915: take a power domain reference while checking the HDMI live status

2015-11-19 Thread Imre Deak
There are platforms that don't need the full GMBUS power domain (PCH, BXT) while others do (VLV/CHV). For optimizing this we would need to add a new power domain, but it's not clear how much we would benefit given the short time we hold the reference. So for now let's keep things simple. Signed-of

[Intel-gfx] [PATCH 1/2] drm/i915: take a power domain ref only when needed during HDMI detect

2015-11-19 Thread Imre Deak
Suggested by Ville. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/intel_hdmi.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index fd86cef..17ced03 100644 --- a/drivers/gpu/drm/i915/intel_hdmi

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Also delay first activation for SKL+

2015-11-19 Thread Vivi, Rodrigo
On Thu, 2015-11-19 at 08:44 +, Daniel Stone wrote: > Hi Rodrigo, > > On 19 November 2015 at 00:39, Rodrigo Vivi > wrote: > > @@ -441,15 +438,14 @@ void intel_psr_enable(struct intel_dp > > *intel_dp) > > /* > > * FIXME: Activation should happen immediately since this > > f

Re: [Intel-gfx] [PATCH 1/2] drm/i915/pm: Unconstify power_domain_str

2015-11-19 Thread Ville Syrjälä
On Thu, Nov 19, 2015 at 06:26:23PM +, Daniel Stone wrote: > Hey, > > On 19 November 2015 at 18:24, Ville Syrjälä > wrote: > > On Thu, Nov 19, 2015 at 05:59:10PM +, Daniel Stone wrote: > >> +static inline const char * > >> +intel_display_power_domain_str(enum intel_display_power_domain dom

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Remove PSR Perf Counter for SKL+

2015-11-19 Thread Rodrigo Vivi
On Wed, Nov 18, 2015 at 11:45 PM, Jindal, Sonika wrote: > Hi Rodrigo, > > Which platform have you observed this issue on? Skylake and Kabylake > This looks really strange. It is expected actually. On DC5/6 states all read-only registers are reset and cannot be restored. including this counter.

Re: [Intel-gfx] [PATCH 1/2] drm/i915/pm: Unconstify power_domain_str

2015-11-19 Thread Daniel Stone
Hey, On 19 November 2015 at 18:24, Ville Syrjälä wrote: > On Thu, Nov 19, 2015 at 05:59:10PM +, Daniel Stone wrote: >> +static inline const char * >> +intel_display_power_domain_str(enum intel_display_power_domain domain) > > It's still const. And I assume now we end up duplicating these stri

Re: [Intel-gfx] [PATCH 1/2] drm/i915/pm: Unconstify power_domain_str

2015-11-19 Thread Ville Syrjälä
On Thu, Nov 19, 2015 at 05:59:10PM +, Daniel Stone wrote: > Let us print human-parseable values from the power domain code; upcoming > display code also wants to use it. > > Signed-off-by: Daniel Stone > --- > drivers/gpu/drm/i915/i915_debugfs.c | 67 > +

Re: [Intel-gfx] [PATCH] drm/i915/skl: enable PC9/10 power states during suspend-to-idle

2015-11-19 Thread Imre Deak
On to, 2015-11-19 at 19:00 +0100, Patrik Jakobsson wrote: > On Thu, Nov 19, 2015 at 04:06:47PM +0200, Imre Deak wrote: > > On to, 2015-11-19 at 14:34 +0100, Patrik Jakobsson wrote: > > > On Wed, Nov 18, 2015 at 06:44:43PM +0200, Imre Deak wrote: > > > > On ke, 2015-11-18 at 17:33 +0100, Daniel Vett

Re: [Intel-gfx] [PATCH] drm/i915/skl: re-enable power well support

2015-11-19 Thread Patrik Jakobsson
On Wed, Nov 18, 2015 at 07:53:50PM +0200, Imre Deak wrote: > Now that the known DMC/DC issues are fixed, let's try again and > re-enable the power well support. > > Signed-off-by: Imre Deak Together with the PC9/10 fix this is: Reviewed-by: Patrik Jakobsson > --- > drivers/gpu/drm/i915/intel

Re: [Intel-gfx] [PATCH] drm/i915/skl: enable PC9/10 power states during suspend-to-idle

2015-11-19 Thread Patrik Jakobsson
On Thu, Nov 19, 2015 at 04:06:47PM +0200, Imre Deak wrote: > On to, 2015-11-19 at 14:34 +0100, Patrik Jakobsson wrote: > > On Wed, Nov 18, 2015 at 06:44:43PM +0200, Imre Deak wrote: > > > On ke, 2015-11-18 at 17:33 +0100, Daniel Vetter wrote: > > > > On Wed, Nov 18, 2015 at 05:32:30PM +0200, Imre D

[Intel-gfx] [PATCH 1/2] drm/i915/pm: Unconstify power_domain_str

2015-11-19 Thread Daniel Stone
Let us print human-parseable values from the power domain code; upcoming display code also wants to use it. Signed-off-by: Daniel Stone --- drivers/gpu/drm/i915/i915_debugfs.c | 67 + drivers/gpu/drm/i915/i915_drv.h | 66 +++

[Intel-gfx] [PATCH 2/2] drm/i915/pm: Print offending domain in refcount failure

2015-11-19 Thread Daniel Stone
If we experience a refcounting failure in a power domain/well (unref'ing at least one too many times), log the name of the offending domain or well. Signed-off-by: Daniel Stone --- drivers/gpu/drm/i915/intel_runtime_pm.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a

[Intel-gfx] [PATCH i-g-t 2/2] lib/kbl: Add Kabylake GT4 PCI IDs

2015-11-19 Thread Wayne Boyer
Add the Kabylake GT4 PCI IDs as defined in this kernel patch. commit 8b10c0cf21ec84618d4bf02c73c0543500ece68d Author: Deepak S Date: Wed Oct 28 12:21:12 2015 -0700 drm/i915/kbl: Add Kabylake GT4 PCI ID Cc: Rodrigo Vivi Signed-off-by: Wayne Boyer --- lib/intel_chipset.h |

[Intel-gfx] [PATCH i-g-t 1/2] lib/kbl: move KBL check from IS_SKYLAKE() to IS_GEN9()

2015-11-19 Thread Wayne Boyer
Remove the KBL check from IS_SKYLAKE() following the kernel definition. Then, add the KBL check to IS_GEN9(). The idea is to avoid confusion. On the kernel side, the mix of SKY and KBL was nacked so the platforms are split. Cc: Rodrigo Vivi Signed-off-by: Wayne Boyer --- lib/intel_chipset.h |

Re: [Intel-gfx] [PATCH] igt/gem_request_retire: Provoke context destruction with active VMAs

2015-11-19 Thread Tvrtko Ursulin
Hi, On 19/11/15 16:58, Chris Wilson wrote: On Thu, Nov 19, 2015 at 03:06:05PM +, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Test designed to trigger the WARN_ON(!list_empty(&ppgtt->base.active_list)) in i915_gem_context_clean. Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson Cc: Daniel

[Intel-gfx] [PATCH] drm/i915/skl: CDCLK change during modeset based on VCO in use.

2015-11-19 Thread clinton . a . taylor
From: Clint Taylor Add SKL and KBL cdclk changes during modeset. Taking into account new linkrates available using 8640 VCO. Signed-off-by: Clint Taylor --- drivers/gpu/drm/i915/intel_display.c | 68 ++ 1 file changed, 68 insertions(+) diff --git a/drivers/gp

Re: [Intel-gfx] [PATCH RESEND 15/20] drm/exynos: drop struct_mutex from exynos_drm_gem_get_ioctl

2015-11-19 Thread Daniel Vetter
On Thu, Nov 19, 2015 at 04:50:11PM +, Daniel Stone wrote: > Hi, > > On 19 November 2015 at 16:46, Daniel Vetter wrote: > > @@ -367,7 +364,6 @@ int exynos_drm_gem_get_ioctl(struct drm_device *dev, > > void *data, > > args->size = exynos_gem->size; > > > > drm_gem_object_unrefe

Re: [Intel-gfx] [PATCH] igt/gem_request_retire: Provoke context destruction with active VMAs

2015-11-19 Thread Chris Wilson
On Thu, Nov 19, 2015 at 03:06:05PM +, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Test designed to trigger the > WARN_ON(!list_empty(&ppgtt->base.active_list)) > in i915_gem_context_clean. > > Signed-off-by: Tvrtko Ursulin > Cc: Chris Wilson > Cc: Daniel Vetter Wouldn't this be a be

[Intel-gfx] [PATCH RESEND 01/20] drm/armada: Plug leak in dumb_map_offset

2015-11-19 Thread Daniel Vetter
We need to drop the gem bo reference if it's an imported one. Cc: Russell King Signed-off-by: Daniel Vetter --- drivers/gpu/drm/armada/armada_gem.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/armada/armada_gem.c b/drivers/gpu/drm/armada/armada_gem.c in

[Intel-gfx] [PATCH RESEND 05/20] drm/tegra: don't take dev->struct_mutex in mmap offset ioctl

2015-11-19 Thread Daniel Vetter
Since David Herrmann's mmap vma manager rework we don't need to grab dev->struct_mutex any more to prevent races when looking up the mmap offset. Drop it and instead don't forget to use the unref_unlocked variant (since the drm core still cares). v2: Finally get rid of the copypasta from another c

[Intel-gfx] [PATCH RESEND 06/20] drm/tegra: Use drm_gem_object_unreference_unlocked

2015-11-19 Thread Daniel Vetter
This only grabs the mutex when really needed, but still has a might-acquire lockdep check to make sure that's always possible. With this patch tegra is officially struct_mutex free, yay! v2: refernce_unlocked doesn't exist as kbuild spotted. Cc: Thierry Reding Acked-by: Thierry Reding Signed-of

[Intel-gfx] [PATCH RESEND 02/20] drm/armada: Don't grab dev->struct_mutex for in mmap offset ioctl

2015-11-19 Thread Daniel Vetter
Since David Herrmann's mmap vma manager rework we don't need to grab dev->struct_mutex any more to prevent races when looking up the mmap offset. Drop it and instead don't forget to use the unref_unlocked variant (since the drm core still cares). v2: Split out the leak fix in dump_map_offset into

Re: [Intel-gfx] [PATCH 0/1] async: export current_is_async()

2015-11-19 Thread Daniel Vetter
On Thu, Nov 19, 2015 at 11:10:16AM -0500, Tejun Heo wrote: > Hello, Lukas. > > On Thu, Nov 19, 2015 at 04:31:11PM +0100, Lukas Wunner wrote: > > Hi Tejun, > > > > when you introduced current_is_async() with 84b233adcca3, was it a > > deliberate decision not to export it? All other non-static func

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Initialize HWS page address after GPU reset"

2015-11-19 Thread Daniel Vetter
On Thu, Nov 19, 2015 at 04:47:44PM +, Arun Siluvery wrote: > This reverts commit 2e5356da370e36ba7aab39d2800c7a2412630ae7. > > It is now redundant as it is already covered in below commit which introduced > the changes to reuse initialization of resources in resume/reset path. > > commit e84f

Re: [Intel-gfx] [PATCH RESEND 15/20] drm/exynos: drop struct_mutex from exynos_drm_gem_get_ioctl

2015-11-19 Thread Daniel Stone
Hi, On 19 November 2015 at 16:46, Daniel Vetter wrote: > @@ -367,7 +364,6 @@ int exynos_drm_gem_get_ioctl(struct drm_device *dev, void > *data, > args->size = exynos_gem->size; > > drm_gem_object_unreference(obj); > - mutex_unlock(&dev->struct_mutex); drm_gem_object_unrefe

[Intel-gfx] [PATCH] Revert "drm/i915: Initialize HWS page address after GPU reset"

2015-11-19 Thread Arun Siluvery
This reverts commit 2e5356da370e36ba7aab39d2800c7a2412630ae7. It is now redundant as it is already covered in below commit which introduced the changes to reuse initialization of resources in resume/reset path. commit e84fe80337dc85cca07d0417ea97edbec4789d8b Author: Nick Hoath Date: Fri Sep 11

[Intel-gfx] [PATCH RESEND 20/20] drm/vma_manage: Drop has_offset

2015-11-19 Thread Daniel Vetter
It's racy, creating mmap offsets is a slowpath, so better to remove it to avoid drivers doing broken things. The only user is i915, and it's ok there because everything (well almost) is protected by dev->struct_mutex in i915-gem. While at it add a note in the create_mmap_offset kerneldoc that dri

[Intel-gfx] [PATCH RESEND 13/20] drm/exynos: Drop dev->struct_mutex from mmap offset function

2015-11-19 Thread Daniel Vetter
Simply forgotten about this when I was doing my general cleansing of simple gem mmap offset functions. There's nothing but core functions called here, and they all have their own protection already. Aside: DRM_ERROR for userspace controlled input isn't great, but that's for another patch. Signed-

[Intel-gfx] [PATCH RESEND 07/20] drm/gma500: Use correct unref in the gem bo create function

2015-11-19 Thread Daniel Vetter
This is called without dev->struct_mutex held, we need to use the _unlocked variant. Never caught in the wild since you'd need an evil userspace which races a gem_close ioctl call with the in-progress open. Cc: Patrik Jakobsson Acked-by: Patrik Jakobsson Signed-off-by: Daniel Vetter --- drive

[Intel-gfx] [PATCH RESEND 08/20] drm/gma500: Drop dev->struct_mutex from modeset code

2015-11-19 Thread Daniel Vetter
It's either init code or already protected by other means. Note that psb_gtt_pin/unpin has it's own lock, and that's really the only piece of driver private state - all the modeset state is protected with modeset locks already. The only important bit is to switch all gem_obj_unref calls to the _un

[Intel-gfx] [PATCH RESEND 12/20] drm/nouveau: Drop dev->struct_mutex from fbdev init

2015-11-19 Thread Daniel Vetter
Doesn't protect anything at all. With this patch nouveau is completely dev->struct_mutex free! Cc: Ben Skeggs Signed-off-by: Daniel Vetter --- drivers/gpu/drm/nouveau/nouveau_fbcon.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/

[Intel-gfx] [PATCH RESEND 17/20] drm/vgem: Simplify dum_map

2015-11-19 Thread Daniel Vetter
The offset manager already checks for existing offsets internally, while holding suitable locks. We can drop this check. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/vgem/vgem_drv.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/vgem/vgem_drv.c b/

[Intel-gfx] [PATCH RESEND 16/20] drm/exynos: drop struct_mutex from fbdev setup

2015-11-19 Thread Daniel Vetter
Doesn't protect anything at all, and probably just here because a long time ago dev->struct_mutex was required to allocate gem objects. With this patch exynos is completely struct_mutex free! Signed-off-by: Daniel Vetter --- drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 22 --

[Intel-gfx] [PATCH RESEND 19/20] drm/vgem: Drop dev->struct_mutex

2015-11-19 Thread Daniel Vetter
With the previous two changes it doesn't protect anything any more. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/vgem/vgem_drv.c | 14 +++--- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/vgem/vgem_drv.c b/drivers/gpu/drm/vgem/vgem_drv.c index 1a60934

[Intel-gfx] [PATCH RESEND 14/20] drm/exynos: drop struct_mutex from exynos_gem_map_sgt_with_dma

2015-11-19 Thread Daniel Vetter
The sg table isn't refcounted, there's no corresponding locking for unmapping and drm_map_sg is ok with being called concurrently. So drop the locking since it doesn't protect anything. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/exynos/exynos_drm_gem.c | 4 1 file changed, 4 deletion

[Intel-gfx] [PATCH RESEND 10/20] drm/gma500: Drop dev->struct_mutex from mmap offset function

2015-11-19 Thread Daniel Vetter
Simply forgotten about this when I was doing my general cleansing of simple gem mmap offset functions. There's nothing but core functions called here, and they all have their own protection already. Cc: Patrik Jakobsson Acked-by: Patrik Jakobsson Signed-off-by: Daniel Vetter --- drivers/gpu/dr

[Intel-gfx] [PATCH] drm/sysfs: Send out uevent when connector->force changes

2015-11-19 Thread Daniel Vetter
To avoid even more code duplication punt this all to the probe worker, which needs some slight adjustment to also generate a uevent when the status has changed to due connector->force. v2: Instead of running the output_poll_work (which is kinda the wrong thing and a layering violation since it's a

[Intel-gfx] [PATCH RESEND 11/20] drm/gma500: Add driver private mutex for the fault handler

2015-11-19 Thread Daniel Vetter
There's currently two places where the gma500 fault handler relies upon dev->struct_mutex: - To protect r->mappping - To make sure vm_insert_pfn isn't called concurrently (in which case the 2nd thread would get an error code). Everything else (specifically psb_gtt_pin) is already protected by so

[Intel-gfx] [PATCH RESEND 03/20] drm/armada: Drop struct_mutex from cursor paths

2015-11-19 Thread Daniel Vetter
The kms state itself is already protected by the modeset locks acquired by the drm core. The only thing left is gem bo state, and since the cursor code expects small objects which are statically mapped at create time and then invariant over the lifetime of the gem bo there's nothing to protect. Se

[Intel-gfx] [PATCH RESEND 09/20] drm/gma500: Drop dev->struct_mutex from fbdev init/teardown code

2015-11-19 Thread Daniel Vetter
This is init/teardown code, locking is just to appease locking checks. And since gem create/free doesn't need this any more there's really no reason for grabbing dev->struct_mutex. Again important to switch obj_unref to _unlocked variants. Cc: Patrik Jakobsson Acked-by: Patrik Jakobsson Signed-

[Intel-gfx] [PATCH RESEND 15/20] drm/exynos: drop struct_mutex from exynos_drm_gem_get_ioctl

2015-11-19 Thread Daniel Vetter
The only things this protects is reading ->flags and ->size, both of which are invariant over the lifetime of an exynos gem bo. So no locking needed at all (besides that, nothing protects the writers anyway). Aside: exynos_gem_obj->size is redundant with exynos_gem_obj->base.size and probably shou

[Intel-gfx] [PATCH RESEND 18/20] drm/vgem: Move get_pages to gem_create

2015-11-19 Thread Daniel Vetter
vgem doesn't have a shrinker or anything like that and drops backing storage only at object_free time. There's no use in trying to be clever and allocating backing storage delayed, it only causes trouble by requiring locking. Instead grab pages when we allocate the object right away. Signed-off-b

[Intel-gfx] [PATCH RESEND 04/20] drm/armada: Use a private mutex to protect priv->linear

2015-11-19 Thread Daniel Vetter
Reusing the Big DRM Lock just leaks, and the few things left that dev->struct_mutex protected are very well contained - it's just the linear drm_mm manager. With this armada is completely struct_mutex free! Cc: Russell King Signed-off-by: Daniel Vetter --- drivers/gpu/drm/armada/armada_debugfs

[Intel-gfx] [PATCH RESEND 00/20] dev->struct_mutex locking crusade

2015-11-19 Thread Daniel Vetter
Hi all, Here's my resend of the dev->struct_mutex locking removal patches. I'd like to get them all into 4.5, so please pick them either up into your tree or ack them. I'll send a pull request for the remaining in a few weeks. Thanks, Daniel Daniel Vetter (20): drm/armada: Plug leak in dumb_ma

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Serialise updates to GGTT with access through GGTT on Braswell

2015-11-19 Thread Jesse Barnes
On 11/19/2015 01:35 AM, Chris Wilson wrote: > On Thu, Nov 19, 2015 at 10:14:08AM +0100, Daniel Vetter wrote: >> On Wed, Nov 18, 2015 at 03:08:47PM -0800, Jesse Barnes wrote: >>> On 11/17/2015 08:37 AM, Daniel Vetter wrote: On Fri, Oct 30, 2015 at 04:58:41PM +, Chris Wilson wrote: > On

Re: [Intel-gfx] Limit busywaiting

2015-11-19 Thread Jens Axboe
On 11/18/2015 02:56 AM, Chris Wilson wrote: This should filter out all explicit wait requests from userspace and only apply busywaiting to circumstances where we are forced to drain the GPU of old requests. With the 2 microsecond timeout from before, this still seems to preserve the speed up in s

Re: [Intel-gfx] [PATCH] drm/sysfs: Grab lock for edid/modes_show

2015-11-19 Thread Daniel Vetter
On Fri, Oct 02, 2015 at 01:08:40PM +0100, Emil Velikov wrote: > On 2 October 2015 at 12:01, Daniel Vetter wrote: > > We chase pointers/lists without taking the locks protecting them, > > which isn't that good. > > > > Fix it. > > > > v2: Actually unlock properly, spotted by Julia. > > > > v3: Put

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: Fix oops caused by fbdev initialization failure

2015-11-19 Thread Lukas Wunner
Hi, On Thu, Nov 19, 2015 at 05:02:04PM +0100, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 01:43:20PM +0100, Lukas Wunner wrote: > > intelfb_create() is called once on driver initialization. If it fails, > > ifbdev->helper.fbdev, ifbdev->fb or ifbdev->fb->obj may be NULL. > > > > Further up in

Re: [Intel-gfx] [PATCH 0/1] async: export current_is_async()

2015-11-19 Thread Tejun Heo
Hello, Lukas. On Thu, Nov 19, 2015 at 04:31:11PM +0100, Lukas Wunner wrote: > Hi Tejun, > > when you introduced current_is_async() with 84b233adcca3, was it a > deliberate decision not to export it? All other non-static functions > in async.c are exported as well. > > I'm asking because I would

Re: [Intel-gfx] [PATCH v3 1/2] drm/i915: Tear down fbdev if initialization fails

2015-11-19 Thread Lukas Wunner
Hi, On Thu, Nov 19, 2015 at 04:58:44PM +0100, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 04:29:51PM +0100, Lukas Wunner wrote: > > Currently if intelfb_create() errors out, it unrefs the bo even though > > the fb now owns that reference. (Spotted by Ville Syrjälä.) We should > > unref the fb i

Re: [Intel-gfx] [PATCH] drm/i915: Don't override output type for DDI HDMI

2015-11-19 Thread Takashi Iwai
On Thu, 19 Nov 2015 16:51:05 +0100, Daniel Vetter wrote: > > On Thu, Nov 19, 2015 at 12:09:56PM +0100, Takashi Iwai wrote: > > Currently a DDI port may register the DP hotplug handler even though > > it's used with HDMI, and the DP HPD handler overrides the encoder > > type forcibly to DP. This c

Re: [Intel-gfx] [PATCH V2 1/1] drm/i915/audio: apply SKL codec wake up patch to BXT

2015-11-19 Thread Jani Nikula
On Thu, 19 Nov 2015, Daniel Vetter wrote: > On Thu, Nov 19, 2015 at 10:44:48PM +0800, han...@intel.com wrote: >> From: "Lu, Han" >> >> For SKL we added a commit 632f3ab95fe2 ("drm/i915/audio: add codec wakeup >> override enabled/disable callback"), in order to enable codec wakeup >> override sig

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: Fix oops caused by fbdev initialization failure

2015-11-19 Thread Daniel Vetter
On Wed, Nov 18, 2015 at 01:43:20PM +0100, Lukas Wunner wrote: > intelfb_create() is called once on driver initialization. If it fails, > ifbdev->helper.fbdev, ifbdev->fb or ifbdev->fb->obj may be NULL. > > Further up in the call stack, intel_fbdev_initial_config() calls > intel_fbdev_fini() to tea

[Intel-gfx] [PULL] topic/drm-fixes

2015-11-19 Thread Jani Nikula
Hi Dave - Here are some drm core fixes for v4.4 that I've picked up. Atomic fixes from Maarten, and atomic helper fixes from Ville and Daniel. Admittedly the topmost commit didn't sit in our tree for very long, but does come with reviews and testing from trustworthy people. BR, Jani. The follo

Re: [Intel-gfx] [PATCH v3 1/2] drm/i915: Tear down fbdev if initialization fails

2015-11-19 Thread Daniel Vetter
On Wed, Nov 18, 2015 at 04:29:51PM +0100, Lukas Wunner wrote: > Currently if intelfb_create() errors out, it unrefs the bo even though > the fb now owns that reference. (Spotted by Ville Syrjälä.) We should > unref the fb instead of the bo. > > However the fb was not necessarily allocated by intel

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