;drm_agp_info_ioctl" [drivers/gpu/drm/drm.ko] undefined!
> ERROR: "drm_agp_enable_ioctl" [drivers/gpu/drm/drm.ko] undefined!
> ERROR: "drm_agp_release_ioctl" [drivers/gpu/drm/drm.ko] undefined!
> ERROR: "drm_agp_bind_ioctl" [drivers/gpu/drm/drm.ko] undefi
Hi All,
I'm using a 6 bit display unit with a native resolution of 1024x600
connected via DP to a box with a Core i7 4770S CPU. The system is running
kernel 4.2.0 and the X.Org Intel video driver version is 2.99.917. There's
noticeable banding on the screen when displaying images with gradient
fi
; [drivers/gpu/drm/drm.ko] undefined!
ERROR: "drm_agp_bind_ioctl" [drivers/gpu/drm/drm.ko] undefined!
ERROR: "drm_agp_acquire_ioctl" [drivers/gpu/drm/drm.ko] undefined!
ERROR: "drm_agp_free_ioctl" [drivers/gpu/drm/drm.ko] undefined!
Not quite sure which commit cau
On 9/30/2015 2:14 PM, Daniel Vetter wrote:
On Wed, Sep 30, 2015 at 02:50:40AM +0200, Rafael J. Wysocki wrote:
On 9/29/2015 10:51 AM, Daniel Vetter wrote:
On Tue, Sep 29, 2015 at 01:54:53AM +0200, Rafael J. Wysocki wrote:
On 9/28/2015 8:52 AM, Daniel Vetter wrote:
On Wed, Sep 23, 2015 at 10:49
> > @@ -14241,6 +14241,7 @@ static int intel_framebuffer_init(struct
> drm_device *dev,
> > {
> > unsigned int aligned_height;
> > int ret;
> > + int i;
> > u32 pitch_limit, stride_alignment;
> >
> > WARN_ON(!mutex_is_locked(&dev->struct_mutex));
> > @@ -14255,7 +14256,8 @@ stati
Em Qua, 2015-09-30 às 17:20 +0200, Daniel Vetter escreveu:
> On Thu, Sep 24, 2015 at 03:53:05PM -0700, Matt Roper wrote:
> > Previous version of the series was here:
> > http://lists.freedesktop.org/archives/intel-gfx/2015-September/07
> > 5883.html
> >
> > Pretty minimal changes since the last
Em Qua, 2015-09-23 às 17:59 +0100, Chris Wilson escreveu:
> On Wed, Sep 23, 2015 at 12:52:25PM -0300, Paulo Zanoni wrote:
> > According to my experiments, the maximum sizes mentioned in the
> > specification delimit how far in the buffer the hardware tracking
> > can
> > go. And the hardware seems
We were considering the whole framebuffer height, but the spec says we
should only consider the active display height size. There were still
some unclear questions based on the spec, but the hardware guys
clarified them for us. According to them:
- CFB size = CFB stride * Number of lines FBC write
According to my experiments (and later confirmation from the hardware
developers), the maximum sizes mentioned in the specification delimit
how far in the buffer the hardware tracking can go. And the hardware
calculates the size based on the plane address we provide - and the
provided plane address
The comment suggests the check was there for some non-fully-atomic
case, and I couldn't find a case where we wouldn't correctly
initialize plane_state, so remove the check.
Let's leave a WARN there just in case.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 34 +
This patchset from Ben helps debugging GPU hangs on new platforms. While
going through it I noticed that our existing INSTDONE register
definitions are somewhat unclear, so I tried to clean those up.
Ben sent me these patches way back on the BXT power-on event, apologies
for delaying it until now.
From: Ben Widawsky
Consolidate the instdone logic so we can get a bit fancier. This patch also
removes the duplicated print of INSTDONE[0].
Signed-off-by: Ben Widawsky
---
Changes: (Imre)
- keep capturing GEN4_INSTDONE1 too
- don't save GEN7 registers on GEN4-6
---
drivers/gpu/drm/i915/i915_
We have a bunch of INSTDONE registers for different platforms and
purposes and it's not immediately clear which instance they are just by
looking at the register name. This one was added on GEN2, where it was
the only INSTDONE register, so mark it as such.
Signed-off-by: Imre Deak
---
drivers/gp
We use 3 different names to refer to the same render ring INSTDONE
register. This can be confusing when comparing two parts of the code
accessing the register via different names. Although the GEN4 version's
layout is different, we treat it the same way as the GEN7+ version, in
that we simply read
This register was added on GEN4, by the name INSTDONE_1 whereas the GEN6
specification calls it INSTDONE_2. Keep the original name with a
platform prefix to make it clearer which INSTDONE register instance this
is. Also add a comment about the SNB alternative name.
Signed-off-by: Imre Deak
---
d
From: Ben Widawsky
Signed-off-by: Ben Widawsky
---
Changes (Imre):
- use the new INSTDONE capturing by default on new GENs (On Ben's request)
- keep printing the render ring INSTDONE to dmesg
- don't hard code the extra_instdone array sizes
- fix typo in GEN8_MCR_SLICE/GEN8_MCR_SUBSLICE
- fix t
Hi Shashank, some feedback on the CSC code below.
On Thu, 2015-08-06 at 22:08 +0530, Shashank Sharma wrote:
> From: Kausal Malladi
>
> BDW/SKL/BXT support Color Space Conversion (CSC) using a 3x3 matrix
> that needs to be programmed into respective CSC registers.
>
> This patch does the follow
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: c668cde5a3b5a1326923f341885ce9660d15091e
commit: a7fb8a23c1afa607ec8ce9f61df645f37c529434 [3/8] drm: Remove __OS_HAS_AGP
config: i386-allmodconfig (attached as .config)
reproduce:
git checkout a7fb8a23c1afa607ec8ce9f61df645f37
>-Original Message-
>From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
>Sent: Tuesday, September 29, 2015 2:35 PM
>To: R, Durgadoss
>Cc: Daniel Vetter; Jani Nikula; intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [RFC DP-typeC 0/2] Support USB typeC ba
On Wed, Sep 30, 2015 at 09:57:37AM -0700, yu@intel.com wrote:
> From: Sagar Arun Kamble
>
> Due to flip interrupts GuC stays awake always and GT does not enter
> RC6. Do not route those interrupts to GuC for now. Driver won't touch
> DE_GUCRMR register and leave it as what default value.
>
>
Hi Annie,
This might add a day or two, but considering this is a long weekend in India,
you can expect the patches by mid next week.
Regards
Shashank
-Original Message-
From: Matheson, Annie J
Sent: Wednesday, September 30, 2015 10:01 PM
To: Sharma, Shashank
Cc: Bradford, Robert; Roper
From: Sagar Arun Kamble
Due to flip interrupts GuC stays awake always and GT does not enter
RC6. Do not route those interrupts to GuC for now. Driver won't touch
DE_GUCRMR register and leave it as what default value.
Signed-off-by: Sagar Arun Kamble
Signed-off-by: Alex Dai
---
drivers/gpu/drm
From: Alex Dai
Add host2guc interface to notify GuC power state changes when
enter or resume from power saving state.
v3: Move intel_guc_suspend to i915_drm_suspend for consistency.
v2: Add GuC suspend/resume to runtime suspend/resume too
v1: Change to a more flexible way when fill host to GuC
On Wed, Sep 30, 2015 at 03:31:34PM +0100, Rob Bradford wrote:
> Hi Shashank, some feedback below that you would be great to get
> addressed before your next version.
>
> On Wed, 2015-09-16 at 23:07 +0530, Shashank Sharma wrote:
> > BDW/SKL/BXT platforms support various Gamma correction modes
> > w
On Wed, Sep 30, 2015 at 04:13:43PM +0530, Sagar Arun Kamble wrote:
> When using RC6 timeout mode, the timeout value
> should be written to GEN6_RC6_THRESHOLD.
>
> v2: Updated commit message. (Tom)
>
> Signed-off-by: Sagar Arun Kamble
Reviewed-by: Tom O'Rourke
> ---
> drivers/gpu/drm/i915/int
From: Sunil Kamath
Latest VBT mentions which set of registers will be used for BLC,
as controller number field. Making use of this field in BXT
BLC implementation. Also, the registers are used in case control
pin indicates display DDI. Adding a check for this.
According to Bspec, BLC_PWM_*_2 uses
From: Shashank Sharma
SKL and BXT qualifies the HAS_DDI() check, and hence haswell
modeset functions are re-used for modeset sequence. But DDI
interface doesn't include support for DSI.
This patch adds:
1. cases for DSI encoder, in those modeset functions and allows
a CRTC modeset
2. Adds call
>-Original Message-
>From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
>Sent: Tuesday, September 29, 2015 12:59 PM
>To: Shankar, Uma; intel-gfx@lists.freedesktop.org
>Cc: Kumar, Shobhit; Deak, Imre; Sharma, Shashank
>Subject: RE: [BXT MIPI PATCH v4 05/14] drm/i915/bxt: DSI encoder su
On Wed, Sep 30, 2015 at 08:59:21AM -0700, Yu Dai wrote:
>
>
> On 09/30/2015 03:46 AM, Kamble, Sagar A wrote:
> >Thanks for the updated patch. Minor comment below.
> >
> >Thanks
> >Sagar
> >
> >On 9/26/2015 12:16 AM, yu@intel.com wrote:
> >> From: Alex Dai
> >>
> >> Add host2guc interfaces to
Shashank,
Please let us know when the next patch series would be ready assuming you
incorporate the feedback from Rob.
I would like to hope we're done with feedback at this point.
Thanks.
Annie Matheson
> On Sep 30, 2015, at 9:25 AM, Sharma, Shashank
> wrote:
>
> Hey Rob,
>
> Thanks f
Hey Rob,
Thanks for the feedback, and the testing efforts.
I will check into your suggestions and get back.
Regards
Shashank
-Original Message-
From: Bradford, Robert
Sent: Wednesday, September 30, 2015 8:02 PM
To: Sharma, Shashank; Roper, Matthew D; Bish, Jim; Smith, Gary K;
dri-de.
On 09/30/2015 03:46 AM, Kamble, Sagar A wrote:
Thanks for the updated patch. Minor comment below.
Thanks
Sagar
On 9/26/2015 12:16 AM, yu@intel.com wrote:
> From: Alex Dai
>
> Add host2guc interfaces to nofigy GuC power state changes when
> enter or resume from power saving state.
>
> v2:
On Wed, Sep 30, 2015 at 04:45:18PM +0100, Tvrtko Ursulin wrote:
>
> Hi,
>
> On 30/09/15 15:36, Michel Thierry wrote:
> >diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> >index 67ef118..6ca39c1 100644
> >--- a/drivers/gpu/drm/i915/i915_gem_
Hi,
On 30/09/15 15:36, Michel Thierry wrote:
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 67ef118..6ca39c1 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -589,11 +589,20 @
On Thu, Sep 24, 2015 at 03:53:05PM -0700, Matt Roper wrote:
> Previous version of the series was here:
> http://lists.freedesktop.org/archives/intel-gfx/2015-September/075883.html
>
> Pretty minimal changes since the last series:
> * General rebasing on di-nightly
> * Some minor SKL-specific b
On Wed, Sep 30, 2015 at 02:22:12PM +0200, Daniel Vetter wrote:
> On Tue, Sep 29, 2015 at 08:47:15PM +0300, Ville Syrjälä wrote:
> > On Fri, Sep 04, 2015 at 07:32:59PM -0700, Chandra Konduru wrote:
> > > This patch sets appropriate scaler mode for NV12 format.
> > > In this mode, skylake scaler does
On Thu, Sep 24, 2015 at 03:53:10PM -0700, Matt Roper wrote:
> A bunch of SKL watermark-related structures have the cursor plane as a
> separate entry from the rest of the planes. Since a previous patch
> updated I915_MAX_PLANES such that those plane arrays now have a slot for
> the cursor, update
On Mon, Sep 14, 2015 at 10:43:51PM +0300, ville.syrj...@linux.intel.com wrote:
[...]
> @@ -167,7 +238,7 @@ static void drm_update_vblank_count(struct drm_device
> *dev, unsigned int pipe,
> if (!rc)
> t_vblank = (struct timeval) {0, 0};
>
> - store_vblank(dev, pipe, diff,
On Wed, Sep 30, 2015 at 03:36:18PM +0100, Michel Thierry wrote:
I made one more change based on profiling:
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 67ef118..6ca39c1 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>
Fix the following warnings:
CC drivers/gpu/drm/i915/intel_audio.o
drivers/gpu/drm/i915/intel_audio.c: In function ‘hsw_audio_codec_enable’:
drivers/gpu/drm/i915/intel_audio.c:332:39: warning: passing argument 2 of
‘audio_rate_need_prog’ discards ‘const’ qualifier from pointer target type
Use 48b addresses if hw supports it (i915.enable_ppgtt=3).
Update the sanitize_enable_ppgtt for 48 bit PPGTT mode.
Note, aliasing PPGTT remains 32b only.
v2: s/full_64b/full_48b/. (Akash)
v3: Add sanitize_enable_ppgtt changes until here. (Akash)
v4: Update param description (Chris)
Cc: Akash Goe
There are some allocations that must be only referenced by 32-bit
offsets. To limit the chances of having the first 4GB already full,
objects not requiring this workaround use DRM_MM_SEARCH_BELOW/
DRM_MM_CREATE_TOP flags
In specific, any resource used with flat/heapless (0x-0xf000)
Gen
I am resending the 2 remaining patches to enable 48-bit PPGTT, now that the
userland usage has been defined and acknowledged.
These patches are exactly the same that were sent with the rest of the 48-bit
PPGTT implementation that are already merged.
There are 2 hardware workarounds needed to allow
This patch adds support for backlight control using DPCD registers
for eDP displays.
It depends on a previous patch by Jani Nikula to move the backlight
hooks from dev_priv->display to intel_panel [1]
Yetunde Adebisi (1):
drm/i915: Add Backlight Control using DPCD for eDP connectors
drivers/
This patch adds support for eDP backlight control using DPCD registers to
backlight hooks in intel_panel.
It checks for backlight control over AUX channel capability and sets up
function pointers to get and set the backlight brightness level if
supported.
Cc: Bob Paauwe
Cc: Jani Nikula
Cc: Deep
Hi Shashank, some feedback below that you would be great to get
addressed before your next version.
On Wed, 2015-09-16 at 23:07 +0530, Shashank Sharma wrote:
> BDW/SKL/BXT platforms support various Gamma correction modes
> which are:
> 1. Legacy 8-bit mode
> 2. 10-bit mode
> 3. 10-bit Split Gamma
On Wed, 30 Sep 2015, Geliang Tang wrote:
> Fix the following warnings:
>
> CC drivers/gpu/drm/i915/intel_audio.o
> drivers/gpu/drm/i915/intel_audio.c: In function ‘hsw_audio_codec_enable’:
> drivers/gpu/drm/i915/intel_audio.c:332:39: warning: passing argument 2 of
> ‘audio_rate_need_prog’
On ke, 2015-08-26 at 16:58 +0530, Animesh Manna wrote:
> From: Daniel Vetter
>
> If we really want to we can be more verbose here, but we really don't
> need an entire function for this.
>
> Cc: Damien Lespiau
> Cc: Imre Deak
> Cc: Sunil Kamath
> Signed-off-by: Daniel Vetter
> Signed-off-by:
On ke, 2015-08-26 at 16:58 +0530, Animesh Manna wrote:
> Note that for bxt without dmc, display engine can go to lowest
> possible state (dc9), so releasing the rpm reference.
>
> Cc: Daniel Vetter
> Cc: Damien Lespiau
> Cc: Imre Deak
> Cc: Sunil Kamath
> Signed-off-by: Animesh Manna
> ---
>
From: Ville Syrjälä
v2: Use SKL_DPLLx symbolic names instead of raw numbers
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
drivers/gpu/drm/i915/intel_ddi.c | 16
2 files changed, 10 insertions(+), 10 deletions(-)
diff --
Jani Nikula writes:
> On Wed, 30 Sep 2015, Daniel Vetter wrote:
> > On Wed, Sep 30, 2015 at 05:09:04PM +0800, kbuild test robot wrote:
> >> tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
> >> head: ad96c5f13442b17fafccc30f81efae2f08351f99
> >> commit: 10d3a5618b3aba24d
On Wed, Sep 30, 2015 at 04:58:34PM +0300, Jani Nikula wrote:
> On Fri, 18 Sep 2015, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 2 +-
> > drivers/gpu/drm/i915/intel_ddi.c | 8
> >
On Wed, Sep 30, 2015 at 04:44:21PM +0300, Jani Nikula wrote:
> On Fri, 18 Sep 2015, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Signed-off-by: Ville Syrjälä
>
> Reviewed-by: Jani Nikula
>
>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 4 ++--
> > drivers/gpu/drm/i
On Fri, 18 Sep 2015, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> drivers/gpu/drm/i915/intel_ddi.c | 8
> drivers/gpu/drm/i915/intel_display.c | 4 ++--
> 3 files changed, 7 inserti
On Fri, 18 Sep 2015, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++--
> drivers/gpu/drm/i915/intel_ddi.c | 16
> 2 files changed, 10 insertions(+), 10 dele
On Wed, Sep 30, 2015 at 10:46:59AM +0200, Daniel Vetter wrote:
> This was only used for the ums+gem combo, so ripe for removal now that
> we only have kms code left.
>
> v2: Drop fence_reg_start since it's now unused, noticed by Ville.
>
> Cc: Ville Syrjälä
> Signed-off-by: Daniel Vetter
lgtm
On Wed, Sep 30, 2015 at 9:30 AM, Chris Wilson
wrote:
> On Tue, Sep 29, 2015 at 03:39:03PM +0100, Robert Bragg wrote:
> > Updating Mesa and GPU Top to experiment with this was straightforward
> > given the similarity to the perf interface. The main difference is that
> > it only supports forwardi
On Wed, 30 Sep 2015, Daniel Vetter wrote:
> On Wed, Sep 30, 2015 at 05:09:04PM +0800, kbuild test robot wrote:
>> tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
>> head: ad96c5f13442b17fafccc30f81efae2f08351f99
>> commit: 10d3a5618b3aba24d6388ccdff2d0182b72a6e8d [3/4] drm:
On Wed, 30 Sep 2015 14:31:31 +0200,
Daniel Vetter wrote:
>
> On Wed, Sep 30, 2015 at 09:45:03AM +0200, Takashi Iwai wrote:
> > The lack of const leads to a compile warning after merging i915
> > upstream tree:
> >drivers/gpu/drm/i915/intel_audio.c:147:13: note: expected 'struct
> > drm_displa
On Wed, Sep 30, 2015 at 05:09:04PM +0800, kbuild test robot wrote:
> tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
> head: ad96c5f13442b17fafccc30f81efae2f08351f99
> commit: 10d3a5618b3aba24d6388ccdff2d0182b72a6e8d [3/4] drm: Add a non-locking
> version of drm_kms_helper_p
On Wed, Sep 30, 2015 at 09:45:03AM +0200, Takashi Iwai wrote:
> The lack of const leads to a compile warning after merging i915
> upstream tree:
>drivers/gpu/drm/i915/intel_audio.c:147:13: note: expected 'struct
> drm_display_mode *' but argument is of type 'const struct drm_display_mode *'
>
On Tue, Sep 29, 2015 at 10:03:43PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 29, 2015 at 04:28:46PM +0300, Imre Deak wrote:
> > The RC6 residency time unit is 833.33ns on BXT according to the
> > specification, so update the calculation accordingly. Use the same way
> > as CHV/VLV to divide by the
On Tue, Sep 29, 2015 at 07:32:51PM -0700, O'Rourke, Tom wrote:
> On Fri, Sep 25, 2015 at 11:46:56AM -0700, yu@intel.com wrote:
> > From: Alex Dai
> >
> > GuC expects two bits for Render and Media domain separately when
> > driver sends data via host2guc SAMPLE_FORCEWAKE. Bit 0 is for
> > Rend
On Tue, Sep 29, 2015 at 08:47:15PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 04, 2015 at 07:32:59PM -0700, Chandra Konduru wrote:
> > This patch sets appropriate scaler mode for NV12 format.
> > In this mode, skylake scaler does either chroma-upsampling or
> > chroma-upsampling and resolution scali
On Tue, Sep 29, 2015 at 08:45:05PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 04, 2015 at 07:32:57PM -0700, Chandra Konduru wrote:
> > Properly allocate min blocks per hw requirements.
> >
> > v2:
> > - changed helper functional param to bool, some code simplification (Ville)
> >
> > Signed-off-by
On Wed, Sep 30, 2015 at 02:50:40AM +0200, Rafael J. Wysocki wrote:
> On 9/29/2015 10:51 AM, Daniel Vetter wrote:
> >On Tue, Sep 29, 2015 at 01:54:53AM +0200, Rafael J. Wysocki wrote:
> >>On 9/28/2015 8:52 AM, Daniel Vetter wrote:
> >>>On Wed, Sep 23, 2015 at 10:49:36PM +0200, Rafael J. Wysocki wrot
On Wed, 2015-09-23 at 15:35 +0100, Chris Wilson wrote:
> On Tue, Sep 15, 2015 at 02:03:23PM +0530, ankitprasad.r.sha...@intel.com
> wrote:
> > From: Ankitprasad Sharma
> >
> > This patch series adds support for creating/using Stolen memory backed
> > objects.
>
> Note that we still need somethi
Thanks for the updated patch. Minor comment below.
Thanks
Sagar
On 9/26/2015 12:16 AM, yu@intel.com wrote:
From: Alex Dai
Add host2guc interfaces to nofigy GuC power state changes when
enter or resume from power saving state.
v2: Add GuC suspend/resume to runtime suspend/resume too
v1:
When using RC6 timeout mode, the timeout value
should be written to GEN6_RC6_THRESHOLD.
v2: Updated commit message. (Tom)
Signed-off-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_pm.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_
tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
head: ad96c5f13442b17fafccc30f81efae2f08351f99
commit: 10d3a5618b3aba24d6388ccdff2d0182b72a6e8d [3/4] drm: Add a non-locking
version of drm_kms_helper_poll_enable(), v2
reproduce: make htmldocs
All warnings (new ones prefixed
On Wed, Sep 30, 2015 at 10:46:59AM +0200, Daniel Vetter wrote:
> This was only used for the ums+gem combo, so ripe for removal now that
> we only have kms code left.
>
> v2: Drop fence_reg_start since it's now unused, noticed by Ville.
>
> Cc: Ville Syrjälä
> Signed-off-by: Daniel Vetter
I can
This was only used for the ums+gem combo, so ripe for removal now that
we only have kms code left.
v2: Drop fence_reg_start since it's now unused, noticed by Ville.
Cc: Ville Syrjälä
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_debugfs.c | 1 -
drivers/gpu/drm/i915/i915_dma.c
On Sun, Sep 13, 2015 at 02:15:25PM +0200, Julia Lawall wrote:
> Remove unneeded NULL test.
>
> The semantic patch that makes this change is as follows:
> (http://coccinelle.lip6.fr/)
>
> //
> @@ expression x; @@
> -if (x != NULL)
> \(kmem_cache_destroy\|mempool_destroy\|dma_pool_destroy\)(x);
On Wed, 23 Sep 2015, Daniel Vetter wrote:
> On Wed, Sep 23, 2015 at 04:13:00PM +0200, Egbert Eich wrote:
>> drm_kms_helper_poll_enable() was converted to lock the mode_config
>> mutex in commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f
>> ("drm/probe-helper: Grab mode_config.mutex in poll_init/enab
On Tue, Sep 29, 2015 at 03:39:03PM +0100, Robert Bragg wrote:
> Updating Mesa and GPU Top to experiment with this was straightforward
> given the similarity to the perf interface. The main difference is that
> it only supports forwarding metrics via read()s instead of an mmaped
> circular buffer.
On Wed, Sep 30, 2015 at 10:45:00AM +0300, Jani Nikula wrote:
>
> These are fixed already, see below for references.
Not really, it's a problem with lack of merges. I'm rebasing the tree atm
again to get rid of this interim fail. This was all held up because it
took a bit of time to get drm-misc m
The lack of const leads to a compile warning after merging i915
upstream tree:
drivers/gpu/drm/i915/intel_audio.c:147:13: note: expected 'struct
drm_display_mode *' but argument is of type 'const struct drm_display_mode *'
Reported-by: kbuild test robot
Signed-off-by: Takashi Iwai
---
drive
These are fixed already, see below for references.
BR,
Jani.
On Tue, 29 Sep 2015, kbuild test robot wrote:
> tree: git://anongit.freedesktop.org/drm-intel for-linux-next
> head: 22f146cd928e834c7eec724b6816e24cc29b59fb
> commit: 67d92bb51cff3596b0ee660eef26f5c7017e3509 [746/778] drm/i915: C
->stolen->start has type u64 aka unsigned long long; relying on the
difference (effectively cast to int) for sorting is wrong.
It wouldn't be a problem in practice if the values compared are always
within INT_MAX of each other (so that the difference is actually
representable in an int), but 440fd
On 09/29/2015 01:56 AM, Daniel Vetter wrote:
With atomic drivers we need to make sure that (at least in general)
property reads hold the right locks. But the legacy dpms property is
special and can be read locklessly. Since userspace loves to just
randomly look at that all the time (like with "st
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