> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Tuesday, August 25, 2015 12:27 AM
> To: Yang, Libin
> Cc: alsa-de...@alsa-project.org; ti...@suse.de; intel-
> g...@lists.freedesktop.org; daniel.vet...@ffwll.ch;
> jani.nik...@linux.intel.com
> Subje
Hi Chris,
On Mon, Aug 24, 2015 at 11:23:13AM +0100, Chris Wilson wrote:
> On Mon, Aug 24, 2015 at 06:04:28PM +0800, Zhiyuan Lv wrote:
> > Hi Chris,
> >
> > On Thu, Aug 20, 2015 at 09:36:00AM +0100, Chris Wilson wrote:
> > > On Thu, Aug 20, 2015 at 03:45:21PM +0800, Zhiyuan Lv wrote:
> > > > Intel
On Mon, 2015-08-17 at 01:50 +, Zhang, Xiong Y wrote:
> Sorry, but I don't get how this enables power_well_2 as well. I just
> see it enabling ddi A/E as the other.
>
> Maybe Paulo or Imre are the best one to review this.
>
> On Thu, Aug 13, 2015 at 2:54 AM Xiong Zhang
> wrote:
> From B
SKL-Y can now use the same programming for all VccIO values after an adjustment
to I_boost.
SKL-U DP table adjustments.
1. Remove SKL Y 0.95V from "SKL H and S" columns in all tables. The
other SKL Y column removes the "0.85V VccIO" so it now applies to all voltages.
2. DP table chan
We also need to call the frontbuffer flip to trigger proper
invalidations when disabling planes. Otherwise we will miss
screen updates when disabling sprites or cursor.
On core platforms where HW tracking also works, this issue
is totally masked because HW tracking triggers PSR exit
however on VLV
On Mon, 2015-08-24 at 17:03 +, Zanoni, Paulo R wrote:
> Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> > This affects PSR on VLV, CHV, HSW and BDW.
> >
> > When debuging the frozen screen caused by HW tracking with low
> > power state I noticed that if we keep moving the mouse non
On Mon, 2015-08-24 at 14:29 +, Zanoni, Paulo R wrote:
> Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> > Many reasons here:
> >
> > - Hardware tracking also has hidden corner cases
>
> Can you please elaborate more on that? I really really really really
> really think we should t
On Mon, 2015-08-24 at 14:14 +, Zanoni, Paulo R wrote:
> Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> > According to spec the disable sequence is:
> > Driver will do the following on PSR Disable.
> > 1. Disable PSR in PSR control register, SRD_CTL[bit 31].
> > 2. Poll on PSR idle
On Mon, 2015-08-24 at 14:04 +, Zanoni, Paulo R wrote:
> Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> > This is wrong since my commit (89251b17). The intention of that
> > commit was to remove this one here that is also wrong anyway,
> > but it was forgotten.
>
> You mentioned th
On Mon, 2015-08-24 at 19:54 +, Zanoni, Paulo R wrote:
> Em Qui, 2015-08-20 às 16:23 -0700, Rodrigo Vivi escreveu:
> > Let's use a native read with retry as suggested per spec to
> > fix Sink CRC on SKL when PSR is enabled.
> >
> > With PSR enabled panel is probably taking more time to wake
> >
Em Qui, 2015-08-20 às 16:23 -0700, Rodrigo Vivi escreveu:
> Let's use a native read with retry as suggested per spec to
> fix Sink CRC on SKL when PSR is enabled.
>
> With PSR enabled panel is probably taking more time to wake
> and dpcd read is faling.
Does this commit actually fix any known pro
Attach the big picture to help the discussion:
Windows Guest Linux Guest Linux Guest (i915 guest mode) * We are here
+--+ +--+ +---+
| | | | |Guest Context Lifecycle Management |
|Windows D
Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> This affects PSR on VLV, CHV, HSW and BDW.
>
> When debuging the frozen screen caused by HW tracking with low
> power state I noticed that if we keep moving the mouse non stop
> you will miss the screen updates for a while. At least
> unt
Cc: intel-gfx@lists.freedesktop.org
Signed-off-by: Emil Velikov
---
intel/intel_bufmgr_fake.c | 2 +-
intel/intel_bufmgr_gem.c | 7 +++
intel/intel_decode.c | 7 ++-
3 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/intel/intel_bufmgr_fake.c b/intel/intel_bufmgr_fake.c
Just like we do for the original exec()
Cc: intel-gfx@lists.freedesktop.org
Signed-off-by: Emil Velikov
---
intel/intel_bufmgr_gem.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index cf55a53..5287419 100644
--- a/intel/intel_bufmgr_g
On Mon, Aug 24, 2015 at 03:35:33PM +, Yang, Libin wrote:
> > -Original Message-
> > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> > Sent: Monday, August 24, 2015 8:53 PM
> > To: Yang, Libin
> > Cc: alsa-de...@alsa-project.org; ti...@suse.de; intel-
> > g...@lists.freedesk
> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Monday, August 24, 2015 8:53 PM
> To: Yang, Libin
> Cc: alsa-de...@alsa-project.org; ti...@suse.de; intel-
> g...@lists.freedesktop.org; daniel.vet...@ffwll.ch;
> jani.nik...@linux.intel.com
> Subject:
On Fri, 2015-08-21 at 16:39 -0300, Danilo Cesar Lemes de Paula wrote:
> Using pandoc as the Markdown engine cause some minor side effects as
> pandoc includes main tags for almost everything.
> Original Markdown support approach removes those main tags, but it
> caused
> some inconsistencies when
Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> Many reasons here:
>
> - Hardware tracking also has hidden corner cases
Can you please elaborate more on that? I really really really really
really think we should try as hard as possible to cook some IGT cases
if something is affecting
Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> According to spec the disable sequence is:
> Driver will do the following on PSR Disable.
> 1. Disable PSR in PSR control register, SRD_CTL[bit 31].
> 2. Poll on PSR idle
> 3. Wait for VBlank
> 4. Disable VSC DIP.
Shouldn't this be done a
Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> This is wrong since my commit (89251b17). The intention of that
> commit was to remove this one here that is also wrong anyway,
> but it was forgotten.
You mentioned the current code is wrong, but it would be really nice if
you could desc
In commit
d1675198e: drm/i915: Integrate GuC-based command submission
the drm.tmpl include lines reference the intel_guc_submission.c but the
patch adds the file i915_guc_submission.c. drm.tmpl fails to build with:
docproc: .//drivers/gpu/drm/i915/intel_guc_submission.c:
No such file or direct
On 20 August 2015 at 15:43, Ander Conselvan de Oliveira
wrote:
> The drm core doesn't check unused fields of ADDFB2 for pre-FB_MODIFIERS
> userspace, so require that and use the local version of the defines.
>
> Signed-off-by: Ander Conselvan de Oliveira
>
> ---
> tests/kms_addfb_basic.c | 19 +
On Fri, Jul 17, 2015 at 07:20:41PM +0530, Kumar, Mahesh wrote:
> GEN >= 9 supports YUV format for all planes, but it's not exported in
> Capability list of primary plane. Add YUV formats in skl_primary_formats
> list.
> Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not
> filling bit
On Mon, 24 Aug 2015 14:53:19 +0200,
Ville Syrjälä wrote:
>
> On Mon, Aug 24, 2015 at 02:38:14AM +, Yang, Libin wrote:
> > > -Original Message-
> > > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> > > Sent: Friday, August 21, 2015 11:14 PM
> > > To: Yang, Libin
> > > Cc: a
On Mon, Aug 24, 2015 at 02:38:14AM +, Yang, Libin wrote:
> > -Original Message-
> > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> > Sent: Friday, August 21, 2015 11:14 PM
> > To: Yang, Libin
> > Cc: alsa-de...@alsa-project.org; ti...@suse.de; intel-
> > g...@lists.freedes
On Mon, Aug 24, 2015 at 05:28:16PM +0530, ankitprasad.r.sha...@intel.com wrote:
> + /*
> + * the cached mapping could lead to stale cachelines, so an
> + * invalidation is needed for the object pages, when they are
> + * released back to kernel
> +
On Mon, Aug 24, 2015 at 05:28:15PM +0530, ankitprasad.r.sha...@intel.com wrote:
> From: Ankitprasad Sharma
>
> This patch provides a support for the User to immediately flush
> out the cachelines for the pre-populated pages of an object, at the
> time of its creation. This will not lead to any re
This set of patches adds a dispatcher for handling DRM ioctls. The
kernel headers for DRM might not be available on all distributions
so we depend on libdrm for those. If libdrm is not available we fall
back on the kernel headers. Since DRM drivers share the same range of
private ioctl numbers I've
We need to be able to store private data in the tcb across it's
lifetime. To ensure proper destruction of the data a free_priv_data
callback must be provided if an allocation is stored in priv_data. The
callback is executed automatically when the life of the tcb ends.
* defs.h: Add extern declarat
* Makefile.am: Add compilation of drm.c.
* defs.h: Add extern declaration of drm_ioctl when drm headers are found.
* drm.c: New file.
* ioctl.c (ioctl_decode): Dispatch drm ioctls when drm headers are found.
Signed-off-by: Patrik Jakobsson
---
Makefile.am | 1 +
defs.h | 3 ++
drm.c
First batch of drm / kms ioctls.
* drm.c (drm_version, drm_get_unique, drm_get_magic, drm_wait_vblank,
drm_mode_get_resources, drm_mode_print_modeinfo, drm_mode_get_crtc,
drm_mode_set_crtc, drm_mode_cursor, drm_mode_cursor2,
drm_mode_get_gamma, drm_mode_set_gamma, drm_mode_get_encoder,
drm_mode_ge
First batch of i915 drm ioctls
* Makefile.am: Add compilation of drm_i915.c.
* defs.h: Add extern i915 declarations
* drm.c (drm_ioctl): Dispatch i915 ioctls.
* drm_i915.c: New file.
* xlat/drm_i915_getparams.in: New file.
* xlat/drm_i915_setparams.in: New file.
* xlat/drm_i915_ioctls.in: New file
Use pkg-config to try to find libdrm headers. If that fails look for
the kernel headers. If no headers are found, drm support will not be
compiled.
* configure.ac: Use pkg-config to find libdrm
Signed-off-by: Patrik Jakobsson
---
configure.ac | 5 +
1 file changed, 5 insertions(+)
diff --g
On pe, 2015-08-21 at 10:24 +0800, Zhiyuan Lv wrote:
> Hi Joonas,
>
> Thanks for the review! And my reply inline.
>
> Regards,
> -Zhiyuan
>
> On Thu, Aug 20, 2015 at 02:23:11PM +0300, Joonas Lahtinen wrote:
> > Hi,
> >
> > On to, 2015-08-20 at 17:40 +0800, Zhiyuan Lv wrote:
> > > On Thu, Aug 20,
On Mon, Aug 24, 2015 at 05:28:14PM +0530, ankitprasad.r.sha...@intel.com wrote:
> +static int
> +__i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
> +{
> + const struct drm_i915_gem_object_ops *ops = obj->ops;
> + int ret;
> +
> + WARN_ON(obj->pages);
> +
> + if (obj->mad
From: Chris Wilson
We have for a long time been ultra-paranoid about the situation whereby
we hand back pages to the system that have been written to by the GPU
and potentially simultaneously by the user through a CPU mmapping. We
can relax this restriction when we know that the cache domain trac
From: Ankitprasad Sharma
This patch provides support for the User to populate the object
with system pages at its creation time. Since this can be safely
performed without holding the 'struct_mutex', it would help to reduce
the time 'struct_mutex' is kept locked especially during the exec-buffer
From: Ankitprasad Sharma
We are trying to reduce the time for which the global 'struct_mutex'
is locked. Execbuffer ioctl is one place where it is generally held
for the longest time. And sometimes because of this occasional
glitches/flickers are observed in 60 fps playback (due to miss of
V-bla
From: Ankitprasad Sharma
This patch provides a support for the User to immediately flush
out the cachelines for the pre-populated pages of an object, at the
time of its creation. This will not lead to any redundancy and would
further reduce the time for which the 'struct_mutex' is kept locked in
Ok..., Will resubmit the patch with suggested changes.
Regards,
-Mahesh
On 8/24/2015 3:53 PM, Jindal, Sonika wrote:
Can you please add the test case name to the commit message?
Also, this should be split into two patches one addressing the divide by zero
error and another one to add plane form
Can you please add the test case name to the commit message?
Also, this should be split into two patches one addressing the divide by zero
error and another one to add plane formats.
Regards,
Sonika
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Be
On Mon, Aug 24, 2015 at 06:04:28PM +0800, Zhiyuan Lv wrote:
> Hi Chris,
>
> On Thu, Aug 20, 2015 at 09:36:00AM +0100, Chris Wilson wrote:
> > On Thu, Aug 20, 2015 at 03:45:21PM +0800, Zhiyuan Lv wrote:
> > > Intel GVT-g will perform EXECLIST context shadowing and ring buffer
> > > shadowing. The s
Hi Chris,
On Thu, Aug 20, 2015 at 09:36:00AM +0100, Chris Wilson wrote:
> On Thu, Aug 20, 2015 at 03:45:21PM +0800, Zhiyuan Lv wrote:
> > Intel GVT-g will perform EXECLIST context shadowing and ring buffer
> > shadowing. The shadow copy is created when guest creates a context.
> > If a context cha
Hi
Find a simple buildfix against current intel-gpu-tools git sources attached.
Thanks,
Stefan
Public Key available
--
Stefan Dirsch (Res. & Dev.) SUSE LINUX GmbH
Tel: 0911-740 53 0Maxfeldstraße 5
FAX: 0911-740 53 479 D-9
On Fri, 2015-08-21 at 16:26 +0300, Ander Conselvan De Oliveira wrote:
> On Fri, 2015-08-07 at 15:53 +0300, David Weinehall wrote:
> > On Thu, Aug 06, 2015 at 11:33:00PM +0200, Daniel Vetter wrote:
> > > This reverts commit 0b45b0746f45deea11670a8b2c949776bbbef55c.
> > >
> > > The point of testing
On Fri, 21 Aug 2015, Ville Syrjälä wrote:
> On Fri, Aug 21, 2015 at 04:52:01PM +0300, Jani Nikula wrote:
>> From: David Weinehall
>>
>> VBT version 196 increased the size of common_child_dev_config. The
>> parser code assumed that the size of this structure would not change.
>>
>> The modified
On Tue, 18 Aug 2015, Sivakumar Thulasimani
wrote:
> From: "Thulasimani,Sivakumar"
>
> This patch fixes the bug that SKL SKUs before B0 might return
> HBR2 as supported even though it is not supposed to be enabled
> on such platforms.
>
> v2: optimize if else condition (Jani)
>
> Reviewed-by: Vil
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