Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6051
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV 276/276
On 03/26/2015 at 07:32 AM, Xi Ruoyao wrote:
在 03/26/2015 03:40 AM, Josh Boyer 写道:
Sorry for these Chinese charactor. Thunderbird generated them
and I forgot to change.
On Wed, Mar 25, 2015 at 01:37:41PM -0400, Josh Boyer wrote:
Yeah that fail looks like we're freeing an fb that's still in
在 03/26/2015 03:40 AM, Josh Boyer 写道:
On Wed, Mar 25, 2015 at 01:37:41PM -0400, Josh Boyer wrote:
Yeah that fail looks like we're freeing an fb that's still in use.
Hilarity happens and since that happens under console_lock at boot-up your
machine dies.
Does that machine die the same way in d
This function is called from commit path of a plane or crtc.
It programs scaler registers to detach (aka. unbinds) scaler
from requested plane or crtc if it isn't in use. It also resets
scaler_id in crtc/plane state.
v2:
-improved a log message (me)
v3:
-improved commentary (Matt)
-added a case w
intel_atomic_setup_scalers sets up scalers based on staged scaling
requests coming from a crtc and its planes. This function should be
called from crtc level check path.
If staged requests are supportable, function assigns scalers to
requested planes and crtc. This function also takes into account
This helper function stages a scaler request for a plane/crtc into
crtc_state->scaler_users (which is a bit field). It also performs
required checks before staging any change into scaler_state.
v2:
-updates to use single copy of scaler limits (Matt)
-added force detach parameter for pfit disable p
Helper function updates supported scaling ratios based on cdclk and
crtc clocks.
v2:
-update single copy of scaling ratios (Matt)
v3:
-min scaling ratio is limited by either display engine limit or clocks,
it is not related to previous ratio (Matt, me)
Signed-off-by: Chandra Konduru
---
drive
Initializing scalers with supported values during crtc init.
v2:
-initialize single copy of min/max values (Matt)
v3:
-moved gen check to callsite (Matt)
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_display.c | 52 ++
1 file changed, 52 insert
> -Original Message-
> From: Roper, Matthew D
> Sent: Wednesday, March 25, 2015 1:59 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 08/21 v2] drm/i915: Add helper function to update
> scaler_users in c
> -Original Message-
> From: Roper, Matthew D
> Sent: Wednesday, March 25, 2015 2:30 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 21/21 v2] drm/i915: Enable skylake sprite plane scaling
> using share
From: Paulo Zanoni
While it is nice to have shorter names for the most-accessed
variables, it makes the code more difficult to read since it's not
clear to the code reader whether that "gem_handle" is from some FB or
something else. The reader also has to audit the code to see if, for
example, th
From: Paulo Zanoni
When we're doing the context subtest, at the end of prepare_test() we
exec a single nop batch on the front buffer, which invalidates FBC.
With the new frontbuffer tracking scheme it may take a while for FBC
to be reenabled, so we end up failing the first fbc_enabled()
assertion
From: Paulo Zanoni
For all those IGT tests that need an easy way to draw rectangles on
buffers using different methods. Current planned users: FBC and PSR
CRC tests.
There is also a lib/tests/igt_draw program to check if the library is
sane.
Signed-off-by: Paulo Zanoni
---
lib/Makefile.source
From: Paulo Zanoni
The way kms_fbc_crc works is that it does an operation that may
trigger/invalidate/update FBC, then it sleeps for 300ms to wait for
FBC to kick in again, then it calls "igt_assert(fbc_enabled())".
This was causing problems where the BLT test would eventually fail in
the fbc_ea
From: Paulo Zanoni
The code has a common pattern of "wait 300ms, then check if FBC is
enabled". Most of the time FBC is enabled in either 50ms or 0ms, so
introduce wait_for_fbc_enabled(), which can return much earlier if FBC
is actually enabled before the 300ms timeout.
Signed-off-by: Paulo Zano
From: Paulo Zanoni
Instead of its hardcoded implementation.
Signed-off-by: Paulo Zanoni
---
tests/kms_fbc_crc.c | 29 +++--
1 file changed, 7 insertions(+), 22 deletions(-)
diff --git a/tests/kms_fbc_crc.c b/tests/kms_fbc_crc.c
index d81f4a2..f1888c4 100644
--- a/tests
From: Paulo Zanoni
Just a little helper for code that needs to wait for a certain
condition to happen. It has the nice advantage that it can survive the
signal helper.
Despite the callers added in this patch, there is another that will go
in a separate patch, and another in a new IGT test file t
2015-03-25 17:15 GMT-03:00 Daniel Vetter :
> And use the same colors for both flip and fills so that we can reuse
> crcs. Some details:
> - For the flip_and_foo tests flip twice so that we again start with
> the black framebuffer and hence have a real change when painting it
> white.
But you d
On Fri, Mar 20, 2015 at 05:04:42PM -0700, Chandra Konduru wrote:
> This patch enables skylake sprite plane display scaling using shared
> scalers atomic desgin.
>
> v2:
> -use single copy of scaler limits (Matt)
>
> Signed-off-by: Chandra Konduru
> ---
> drivers/gpu/drm/i915/intel_sprite.c |
> -Original Message-
> From: Roper, Matthew D
> Sent: Wednesday, March 25, 2015 2:14 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 10/21 v2] drm/i915: Helper function to detach a scaler
> from
> a pl
On Wed, Mar 25, 2015 at 01:14:40PM -0700, Konduru, Chandra wrote:
>
>
> > -Original Message-
> > From: Roper, Matthew D
> > Sent: Tuesday, March 24, 2015 10:16 PM
> > To: Konduru, Chandra
> > Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> > Ander
> > Subjec
On Wed, Mar 25, 2015 at 12:20:08PM -0700, Konduru, Chandra wrote:
...
> >
> > We're already calculating this in the plane check function; we should
> > probably
> > just store the result in a plane_state field at that point so we don't have
> > to re-
> > calculate it here.
>
> I think you are
Signed-off-by: Daniel Vetter
---
lib/intel_batchbuffer.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index fa8875b3e472..8b440ca84824 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -175,6 +175,7 @@ intel_batchbuffer_
And use the same colors for both flip and fills so that we can reuse
crcs. Some details:
- For the flip_and_foo tests flip twice so that we again start with
the black framebuffer and hence have a real change when painting it
white.
- The upload for the rendercopy source isn't fast, but hey I'm
On Tue, 2015-03-17 at 10:49 -0700, Rodrigo Vivi wrote:
> Does BXT really has fbc?
Yes.
> And same implementation and registers as HSW?
Yes, but actually the selection for BXT would be incorrect in
i915_setup_compression(), I can follow up with a fix for that in this
patchset. In addition we also
On Wed, 2015-03-25 at 20:31 +, Chris Wilson wrote:
> On Wed, Mar 25, 2015 at 01:11:57PM -0700, Rodrigo Vivi wrote:
> > From: Chris Wilson
> >
> > Let userspace know the status of Panel Self-Refresh by virtue of a
> > property on the appropriate connector.
> >
> > v2: Only attach the property
On Wed, Mar 25, 2015 at 01:11:57PM -0700, Rodrigo Vivi wrote:
> From: Chris Wilson
>
> Let userspace know the status of Panel Self-Refresh by virtue of a
> property on the appropriate connector.
>
> v2: Only attach the property if the driver is capable of PSR.
> v3: Add docbook courtesy of Damie
On Wed, Mar 25, 2015 at 12:04 AM, Sivakumar Thulasimani
wrote:
>
>> _crtc_state *pipe_config)
>> {
>> @@ -5812,6 +5844,8 @@ static int intel_crtc_compute_config(struct
>> intel_crtc *crtc,
>> pipe_config->pipe_bpp = 8*3;
>> }
>> + intel_compute_psr_config(crtc, pipe
> -Original Message-
> From: Roper, Matthew D
> Sent: Tuesday, March 24, 2015 10:16 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 10/21 v2] drm/i915: Helper function to detach a scaler
> from
> a pla
From: Chris Wilson
Let userspace know the status of Panel Self-Refresh by virtue of a
property on the appropriate connector.
v2: Only attach the property if the driver is capable of PSR.
v3: Add docbook courtesy of Damien.
v4: Mark the initial value as 'unsupported' - it will be determined
c
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6050
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -2 269/269
> -Original Message-
> From: Roper, Matthew D
> Sent: Tuesday, March 24, 2015 10:15 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 09/21 v2] drm/i915: Add atomic function to setup scalers
> scalers for
On Wed, Mar 25, 2015 at 07:27:35PM +, Vivi, Rodrigo wrote:
> On Tue, 2015-03-24 at 22:05 +, ch...@chris-wilson.co.uk wrote:
> > On Tue, Mar 24, 2015 at 08:55:04PM +, Vivi, Rodrigo wrote:
> > > On Tue, 2015-03-24 at 10:08 +, Chris Wilson wrote:
> > > > On Tue, Mar 24, 2015 at 11:03:3
On Wed, Mar 25, 2015 at 01:37:41PM -0400, Josh Boyer wrote:
>>> >> Yeah that fail looks like we're freeing an fb that's still in use.
>>> >> Hilarity happens and since that happens under console_lock at boot-up
>>> >> your
>>> >> machine dies.
>>> >>
>>> >> Does that machine die the same way in dr
On Tue, 2015-03-24 at 22:05 +, ch...@chris-wilson.co.uk wrote:
> On Tue, Mar 24, 2015 at 08:55:04PM +, Vivi, Rodrigo wrote:
> > On Tue, 2015-03-24 at 10:08 +, Chris Wilson wrote:
> > > On Tue, Mar 24, 2015 at 11:03:30AM +0100, Daniel Vetter wrote:
> > > > On Mon, Mar 23, 2015 at 01:20:0
> -Original Message-
> From: Roper, Matthew D
> Sent: Tuesday, March 24, 2015 10:15 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 08/21 v2] drm/i915: Add helper function to update
> scaler_users in cr
psr.active is being unset out of the if so this here is useless and
duplicated.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_psr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index a1f67c6..d3fdb993 100644
From: Ville Syrjälä
New stuff has been added to the end of the child device block at various
times, so using a hardcoded size for the block is a bad idea.
Fortunately the size of the block is listed in the VBT just before the
blocks themselves, so grab it from there.
Signed-off-by: Ville Syrjälä
From: Ville Syrjälä
Check that the offset where expect to find the device id is withing the
BIOS image, instead of accessing whatever (if anything) happens to be
there.
Signed-off-by: Ville Syrjälä
---
tools/intel_bios_reader.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff
On Wed, Mar 25, 2015 at 05:34:26PM +, Thomas Wood wrote:
> Add rules to fix unused-result warnings when compiling with
> _FORTIFY_SOURCE defined and apply them to the library and tests.
>
> Signed-off-by: Thomas Wood
I wasn't sure whether this is really worth the trouble. But since you've
do
On 25 March 2015 at 02:50, He, Shuang wrote:
> (He Shuang on behalf of Liu Lei)
> Tested-by: Lei,Liu lei.a@intel.com
Thanks, both patches in this series are now merged.
>
> I-G-T test result:
> ./pm_sseu
> IGT-Version: 1.9-g07be8fe (x86_64) (Linux:
> 4.0.0-rc3_drm-intel-nightly_c09a3b_2015
On Wed, Mar 25, 2015 at 1:17 PM, Daniel Vetter wrote:
> On Wed, Mar 25, 2015 at 12:42:46PM -0400, Josh Boyer wrote:
>> On Wed, Mar 25, 2015 at 11:53 AM, Josh Boyer
>> wrote:
>> > On Wed, Mar 25, 2015 at 11:50 AM, Daniel Vetter wrote:
>> >> On Wed, Mar 25, 2015 at 11:37:35AM -0400, Josh Boyer wr
> -Original Message-
> From: Roper, Matthew D
> Sent: Tuesday, March 24, 2015 10:14 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 07/21 v2] drm/i915: Helper function to update skylake
> scaling ratio.
Add rules to fix unused-result warnings when compiling with
_FORTIFY_SOURCE defined and apply them to the library and tests.
Signed-off-by: Thomas Wood
---
lib/igt.cocci | 28
lib/igt_core.c| 20
lib/igt_debugfs.c | 6 +++---
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6049
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -6 269/269
> -Original Message-
> From: Roper, Matthew D
> Sent: Wednesday, March 25, 2015 10:22 AM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 12/21 v2] drm/i915: Ensure colorkey and scaling aren't
> enabled at
This is a very similar bug in the load detect code fixed in
commit 9128b040eb774e04bc23777b005ace2b66ab2a85
Author: Daniel Vetter
Date: Tue Mar 3 17:31:21 2015 +0100
drm/i915: Fix modeset state confusion in the load detect code
But this time around it was the initial fb code that forgot t
From: Ville Syrjälä
Replace the hardcoded 9 with a call to intel_freq_opcode(450).
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 75
> -Original Message-
> From: Roper, Matthew D
> Sent: Wednesday, March 25, 2015 10:22 AM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 16/21 v2] drm/i915: Ensure setting up scalers into staged
> crtc_stat
On Wed, Mar 25, 2015 at 08:47:59AM -0700, Jesse Barnes wrote:
> On 03/25/2015 06:28 AM, Daniel Vetter wrote:
> > On Tue, Mar 24, 2015 at 10:19:59AM +0200, Jani Nikula wrote:
> >> On Mon, 23 Mar 2015, Jesse Barnes wrote:
> >>> Or users can just spam the log all they want.
> >>>
> >>> References: ht
On Fri, Mar 20, 2015 at 05:04:33PM -0700, Chandra Konduru wrote:
> Plane scaling and colorkey are mutually exclusive. Ensure scaling
> isn't active at the time of enabling colorkey.
>
> Signed-off-by: Chandra Konduru
I guess this is fine for now, but eventually we're going to need to get
colorke
On Fri, Mar 20, 2015 at 05:04:37PM -0700, Chandra Konduru wrote:
> From intel_atomic_check, call intel_atomic_setup_scalers() to
> assign scalers based on staged scaling requests. Fail the
> transaction if setup returns error.
>
> Setting up of scalers should be moved to atomic crtc check once
>
On Wed, Mar 25, 2015 at 12:42:46PM -0400, Josh Boyer wrote:
> On Wed, Mar 25, 2015 at 11:53 AM, Josh Boyer
> wrote:
> > On Wed, Mar 25, 2015 at 11:50 AM, Daniel Vetter wrote:
> >> On Wed, Mar 25, 2015 at 11:37:35AM -0400, Josh Boyer wrote:
> >>> On Wed, Mar 25, 2015 at 10:00 AM, Daniel Vetter w
On Wed, Mar 25, 2015 at 04:53:38PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> New kernels add the ability to pad objects to specified size at execbuf time.
>
> Add the drm_intel_bo_pad_to_size API via which this padded size can be set.
Looks good, exactly what I had in mind.
> st
> -Original Message-
> From: Roper, Matthew D
> Sent: Tuesday, March 24, 2015 10:14 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 05/21 v2] drm/i915: Initialize skylake scalers
>
> On Fri, Mar 20, 20
> -Original Message-
> From: Roper, Matthew D
> Sent: Tuesday, March 24, 2015 10:14 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira,
> Ander
> Subject: Re: [PATCH 04/21 v2] drm/i915: skylake scaler structure definitions
>
> On Fri,
From: Tvrtko Ursulin
New kernels add the ability to pad objects to specified size at execbuf time.
Add the drm_intel_bo_pad_to_size API via which this padded size can be set.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
---
include/drm/i915_drm.h| 5 +++--
intel/intel_bufmgr.c |
On Tue, 17 Mar 2015, Imre Deak wrote:
> From: "A.Sunil Kamath"
>
> This patch will WARN if unused gmbus ports gets accessed for
> BXT using gmbus_get_adapter also ensure that only valid ports
> of BXT gets used. For BXT its more important to do this as it
> has only 3 valid ports and structure ha
On 3/25/2015 1:42 PM, Mika Kuoppala wrote:
These two registers contains the 48bit fault address.
Signed-off-by: Mika Kuoppala
---
tools/intel_error_decode.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/tools/intel_error_decode.c b/tools/intel_error_
On Tue, 17 Mar 2015, Imre Deak wrote:
> From: "A.Sunil Kamath"
>
> For BXT gmbus is pulled from GPU to CPU. From implementation
> point of view only pin pair configuration will change. The
> existing implementation supports all platforms previous to GEN8
> and also SKL. But for BXT pin pair confi
On 3/25/2015 4:13 PM, Mika Kuoppala wrote:
Add decodings for FAULT_REG
v2: fix fault encodings and ignore addr type for gen8+ (Michel)
fix engine mask
Signed-off-by: Mika Kuoppala
---
tools/intel_error_decode.c | 42 ++
1 file changed, 42 inserti
From: Ville Syrjälä
Recent BSW VBT has a VBT child device size 37 bytes instead of the 33
bytes our code assumes. This means we fail to parse the VBT and thus
fail to detect eDP ports properly and just register them as DP ports
instead.
Fix it up by using the reported child device size from the
On 3/25/2015 1:42 PM, Mika Kuoppala wrote:
Add ERROR decodings for gen8
Signed-off-by: Mika Kuoppala
---
tools/intel_error_decode.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c
index 035b17f..fb4a2a4 100644
-
On Wed, Mar 25, 2015 at 11:53 AM, Josh Boyer wrote:
> On Wed, Mar 25, 2015 at 11:50 AM, Daniel Vetter wrote:
>> On Wed, Mar 25, 2015 at 11:37:35AM -0400, Josh Boyer wrote:
>>> On Wed, Mar 25, 2015 at 10:00 AM, Daniel Vetter wrote:
>>> > On Wed, Mar 25, 2015 at 09:11:17AM -0400, Josh Boyer wrote:
Add decodings for FAULT_REG
v2: fix fault encodings and ignore addr type for gen8+ (Michel)
fix engine mask
Signed-off-by: Mika Kuoppala
---
tools/intel_error_decode.c | 42 ++
1 file changed, 42 insertions(+)
diff --git a/tools/intel_error_decode.c
On Tue, 17 Mar 2015, Imre Deak wrote:
> From: Vandana Kannan
>
> The port detection register flags in SFUSE_STRAP and DDI_BUF_CTL_A are
> not defined for BXT, so don't use them.
>
> Suggested by Satheesh.
>
> v2:
> - DDI_BUF_CTL_A bit 0 is not useful on BXT. Making changes to use this
> bit whe
On Wed, Mar 25, 2015 at 11:50 AM, Daniel Vetter wrote:
> On Wed, Mar 25, 2015 at 11:37:35AM -0400, Josh Boyer wrote:
>> On Wed, Mar 25, 2015 at 10:00 AM, Daniel Vetter wrote:
>> > On Wed, Mar 25, 2015 at 09:11:17AM -0400, Josh Boyer wrote:
>> >> On Wed, Mar 25, 2015 at 4:54 AM, Daniel Vetter wro
On Wed, Mar 25, 2015 at 11:37:35AM -0400, Josh Boyer wrote:
> On Wed, Mar 25, 2015 at 10:00 AM, Daniel Vetter wrote:
> > On Wed, Mar 25, 2015 at 09:11:17AM -0400, Josh Boyer wrote:
> >> On Wed, Mar 25, 2015 at 4:54 AM, Daniel Vetter wrote:
> >> >> >> commit f55548b5af87ebfc586ca75748947f1c1b1a4a5
On 03/25/2015 06:28 AM, Daniel Vetter wrote:
> On Tue, Mar 24, 2015 at 10:19:59AM +0200, Jani Nikula wrote:
>> On Mon, 23 Mar 2015, Jesse Barnes wrote:
>>> Or users can just spam the log all they want.
>>>
>>> References: https://bugs.freedesktop.org/show_bug.cgi?id=89628
>>> Signed-off-by: Jesse
On Wed, Mar 25, 2015 at 03:55:43PM +0100, Linus Walleij wrote:
> On Wed, Mar 25, 2015 at 2:13 PM, Daniel Vetter wrote:
>
> > I quickly checked out your linux-gpio and it only has patch 2 to implement
> > the gpio. We also need patch 1 (but with the leak Thierry spotted fixed).
> > Should we drop
On Wed, 2015-03-25 at 16:08 +0530, Ramalingam C wrote:
> On Wednesday 25 March 2015 12:42 AM, Rodrigo Vivi wrote:
> > With PSR enabled being pre computed on pipe_config we can now
> > prevent DRRS to be enabled along with PSR.
> >
> > Cc: Ramalingam C
> > Signed-off-by: Rodrigo Vivi
> > ---
> >
On Wed, Mar 25, 2015 at 10:00 AM, Daniel Vetter wrote:
> On Wed, Mar 25, 2015 at 09:11:17AM -0400, Josh Boyer wrote:
>> On Wed, Mar 25, 2015 at 4:54 AM, Daniel Vetter wrote:
>> >> >> commit f55548b5af87ebfc586ca75748947f1c1b1a4a52
>> >> >> Author: Damien Lespiau
>> >> >> Date: Thu Feb 5 18:30:
At Wed, 25 Mar 2015 15:00:08 +0100,
Daniel Vetter wrote:
>
> On Wed, Mar 25, 2015 at 09:11:17AM -0400, Josh Boyer wrote:
> > On Wed, Mar 25, 2015 at 4:54 AM, Daniel Vetter wrote:
> > >> >> commit f55548b5af87ebfc586ca75748947f1c1b1a4a52
> > >> >> Author: Damien Lespiau
> > >> >> Date: Thu Feb
On Wed, 25 Mar 2015, Xi Ruoyao wrote:
> It's annoying to see my code caused so much trouble. I didn't test my code
> with a HDMI device or I should've found this trouble before commiting. I
> apologize for that again.
Don't worry about it. It's our fail, not yours.
BR,
Jani.
--
Jani Nikula, I
On 03/25/2015 01:29 PM, Chris Wilson wrote:
Our GPUs impose certain requirements upon buffers that depend upon how
exactly they are used. Typically this is expressed as that they require
a larger surface than would be naively computed by pitch * height.
Normally such requirements are hidden away
On 03/25/2015 at 10:56 PM, Xi Ruoyao wrote:
On 03/25/2015 at 10:00 PM, Daniel Vetter wrote:
On Wed, Mar 25, 2015 at 09:11:17AM -0400, Josh Boyer wrote:
On Wed, Mar 25, 2015 at 4:54 AM, Daniel Vetter wrote:
commit f55548b5af87ebfc586ca75748947f1c1b1a4a52
Author: Damien Lespiau
Date: Thu
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6048
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -2 269/269
On Mon, Mar 23, 2015 at 04:21:07PM +0530, Sivakumar Thulasimani wrote:
> > void intel_prepare_ddi(struct drm_device *dev)
> > {
> >-int port;
> >+struct intel_digital_port *intel_dig_port;
> >+bool visited[I915_MAX_PORTS] = { 0, };
> > if (!HAS_DDI(dev))
> > return;
>
On 03/25/2015 02:41 PM, Chris Wilson wrote:
On Wed, Mar 25, 2015 at 02:32:05PM +, Tvrtko Ursulin wrote:
On 03/25/2015 02:28 PM, Chris Wilson wrote:
What's important to make this trick work is to allocate new handles
every time. That way we fill up the GTT and thereby hope to skip over
the
On 03/25/2015 at 10:00 PM, Daniel Vetter wrote:
On Wed, Mar 25, 2015 at 09:11:17AM -0400, Josh Boyer wrote:
On Wed, Mar 25, 2015 at 4:54 AM, Daniel Vetter wrote:
commit f55548b5af87ebfc586ca75748947f1c1b1a4a52
Author: Damien Lespiau
Date: Thu Feb 5 18:30:20 2015 +
drm/i915: Don'
On Wed, Mar 25, 2015 at 2:13 PM, Daniel Vetter wrote:
> I quickly checked out your linux-gpio and it only has patch 2 to implement
> the gpio. We also need patch 1 (but with the leak Thierry spotted fixed).
> Should we drop Shobit's patch until that's done?
Nah I trust that Lee will merge it to
On Thu, Mar 12, 2015 at 5:31 PM, Shobhit Kumar wrote:
> On some Intel SoC platforms, the panel enable/disable signals are
> controlled by CRC PMIC. Add those control as a new GPIO in a lookup
> table for gpio-crystalcove chip during CRC driver load
>
> CC: Samuel Ortiz
> Cc: Linus Walleij
> Cc:
On 20/03/2015 10:37, Deak, Imre wrote:
On Fri, 2015-03-20 at 09:08 +, Nick Hoath wrote:
On 17/03/2015 13:06, Imre Deak wrote:
On ti, 2015-03-17 at 11:35 +0100, Daniel Vetter wrote:
On Tue, Mar 17, 2015 at 11:39:40AM +0200, Imre Deak wrote:
Signed-off-by: Imre Deak
---
drivers/gpu/drm/
On 20/03/2015 10:25, Deak, Imre wrote:
On Fri, 2015-03-20 at 09:05 +, Nick Hoath wrote:
On 17/03/2015 09:39, Imre Deak wrote:
From: Ben Widawsky
Signed-off-by: Ben Widawsky
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_rin
On Thu, Mar 12, 2015 at 5:31 PM, Shobhit Kumar wrote:
> Export PANEL_EN/DISABLE (offset 0x52) as additional GPIO. Needed
> by display driver to enable the DSI panel on BYT platform where
> the Panel EN/Disable control is routed thorugh CRC PMIC
>
> CC: Samuel Ortiz
> Cc: Linus Walleij
> Cc: Ale
On Wed, Mar 25, 2015 at 02:32:05PM +, Tvrtko Ursulin wrote:
>
> On 03/25/2015 02:28 PM, Chris Wilson wrote:
> >What's important to make this trick work is to allocate new handles
> >every time. That way we fill up the GTT and thereby hope to skip over
> >the fragmented part.
>
> It does do th
Avoid producing longs lists of subtests in the documentation and instead
provide instructions on how to obtain the full list.
Signed-off-by: Thomas Wood
---
docs/reference/intel-gpu-tools/Makefile.am | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/docs
On Wed, Mar 25, 2015 at 3:15 PM, Kumar, Shobhit wrote:
> On Wed, 2015-03-25 at 13:27 +0100, Linus Walleij wrote:
>> On Wed, Feb 18, 2015 at 1:18 PM, Shobhit Kumar
>> wrote:
>>
>> > Export Panel BACKLIGHT_EN(offset 0x51) and PANEL_EN(offset 0x52) as two
>> > additional GPIOs. Needed by display dr
Include debugging symbols in tests by default to improve stack traces
and also set the compiler optimisation level to improve the debugging
experience.
Signed-off-by: Thomas Wood
---
configure.ac | 14
m4/as-compiler-flag.m4 | 62 +++
On Wed, Mar 25, 2015 at 09:56:28AM +0100, Daniel Vetter wrote:
> > I've started seeing this one too as of rc5.
> > Along with..
>
> Yeah we're freeing memory too early with these bugs. To get up to the
> current debug state can you please cherry-pick
>
> commit f55548b5af87ebfc586ca757489
At Wed, 25 Mar 2015 14:26:50 +0100,
Daniel Vetter wrote:
>
> On Tue, Mar 24, 2015 at 07:09:03PM +0100, Sedat Dilek wrote:
> > On Mon, Mar 23, 2015 at 9:25 AM, Daniel Vetter wrote:
> > > On Mon, Mar 23, 2015 at 07:25:27AM +0100, Sedat Dilek wrote:
> > >> Hi,
> > >>
> > >> I did my weekly update of
On 03/25/2015 02:28 PM, Chris Wilson wrote:
On Wed, Mar 25, 2015 at 02:21:00PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
This tests the new EXEC_OBJECT_PAD_TO_SIZE exec_object2 flag.
It uses the fact DRM allocation policy is set as ABI and allocates
space in order.
Ssh. That's not
On Wed, Mar 25, 2015 at 02:21:00PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> This tests the new EXEC_OBJECT_PAD_TO_SIZE exec_object2 flag.
>
> It uses the fact DRM allocation policy is set as ABI and allocates
> space in order.
Ssh. That's not what I meant to say. I meant that the
From: Tvrtko Ursulin
This tests the new EXEC_OBJECT_PAD_TO_SIZE exec_object2 flag.
It uses the fact DRM allocation policy is set as ABI and allocates
space in order. That means that we should be able to easily get
two bos mapped at adjacent GTT addresses and then test that the
pad to size flag w
On 03/25/2015 06:43 PM, Daniel Vetter wrote:
> On Wed, Mar 25, 2015 at 01:24:01PM +0100, Linus Walleij wrote:
>> On Tue, Mar 24, 2015 at 11:53 AM, Daniel Vetter wrote:
>>> On Tue, Mar 24, 2015 at 11:16 AM, Linus Walleij
>>> wrote:
>>
>>> So summary:
>>> - Reusing the dynamic gpio lookup stuff wou
On Wed, 2015-03-25 at 13:27 +0100, Linus Walleij wrote:
> On Wed, Feb 18, 2015 at 1:18 PM, Shobhit Kumar
> wrote:
>
> > Export Panel BACKLIGHT_EN(offset 0x51) and PANEL_EN(offset 0x52) as two
> > additional GPIOs. Needed by display driver to enable the DSI panel on
> > BYT platform where the Pan
On Wed, Mar 25, 2015 at 09:11:17AM -0400, Josh Boyer wrote:
> On Wed, Mar 25, 2015 at 4:54 AM, Daniel Vetter wrote:
> >> >> commit f55548b5af87ebfc586ca75748947f1c1b1a4a52
> >> >> Author: Damien Lespiau
> >> >> Date: Thu Feb 5 18:30:20 2015 +
> >> >>
> >> >> drm/i915: Don't try to refer
On Tue, Mar 24, 2015 at 10:05:03PM +, ch...@chris-wilson.co.uk wrote:
> On Tue, Mar 24, 2015 at 08:55:04PM +, Vivi, Rodrigo wrote:
> > On Tue, 2015-03-24 at 10:08 +, Chris Wilson wrote:
> > > On Tue, Mar 24, 2015 at 11:03:30AM +0100, Daniel Vetter wrote:
> > > > On Mon, Mar 23, 2015 at
On Tue, Mar 24, 2015 at 06:51:43PM +, Konduru, Chandra wrote:
> > Please use igt_interactive_debug if you want to make a testcase useful for
> > visual
> > inspection. But igts _really_ must run fully automated, and that's possible
> > using
> > crc checksums. I.e. you need to draw reference
On Tue, Mar 24, 2015 at 06:39:03PM +, Mike Lothian wrote:
> Hi
>
> Since [31c946e85ce6b48ce0f25e3cdca8362e4fe8b300] drm: If available use
> atomic state in getcrtc ioctl, X doesn't start correctly on my
> Sandybridge machine
>
> I've tried reverting this commit and my X session still starts u
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