Removing bits that become reserved on bdw and organizing 3DSTATE_PS header.
Signed-off-by: Rodrigo Vivi
---
src/sna/gen8_render.h | 28
1 file changed, 8 insertions(+), 20 deletions(-)
diff --git a/src/sna/gen8_render.h b/src/sna/gen8_render.h
index 29f3e97..eb4928e
Unfortunatelly this doesn't the bug I was hunting, but let's follow
the spec.
Signed-off-by: Rodrigo Vivi
---
src/sna/gen8_render.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/sna/gen8_render.h b/src/sna/gen8_render.h
index 0bcdf10..29f3e97 100644
--- a/src/sna/gen8_r
On 10/07/2014 01:52 AM, Ville Syrjälä wrote:
On Mon, Oct 06, 2014 at 03:01:46PM -0700, Clint Taylor wrote:
On 09/26/2014 09:28 AM, Ville Syrjälä wrote:
On Thu, Sep 25, 2014 at 09:26:36AM -0700, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
HDMI audio clock config was incorrectly choos
=
[ INFO: possible recursive locking detected ]
3.17.0 #50 Not tainted
-
Xorg/1170 is trying to acquire lock:
(&dev->struct_mutex){+.+.+.}, at: []
i915_gem_unmap_dma_buf+0x33/0xc0 [i915]
but task is already h
On Thu, Oct 09, 2014 at 07:37:15PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> On CHV the display DDC pins may be muxed to an alternate function if
> there's no need for DDC on a specific port, which is the case for eDP
> ports since there's no way to plug in a DP++ HDMI
This reverts
commit d190a1f9668680c7a429110c91f8faa27949b220.
Author: Rodrigo Vivi
Date: Wed Sep 3 21:26:29 2014 -0400
tests/kms_psr_sink_crc: Wait 2 vblanks before grabing the new crc.
Sink CRC is fixed on kernel to wait as many vblanks as needed. It was fixed by:
This reverts
commit d92fbc23138b1014e8574daf29dbb06b8c81aa7a.
Author: Rodrigo Vivi
Date: Tue Sep 9 12:25:47 2014 -0400
tests/kms_sink_crc_basic: Wait 2 vblanks before grabing the new crc.
Sink CRC is fixed on kernel to wait as many vblanks as needed. It was fixed b
On 07/10/2014 15:21, Mika Kuoppala wrote:
As the workaround list has the value as initialization time
constant, we can do the simple checking on the go without
negleting igt.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_debugfs.c | 14 +++---
1 file changed, 7 insertion
On 07/10/2014 15:21, Mika Kuoppala wrote:
If we build the workaround list in ring initialization
and decouple it from the actual writing of values, we
gain the ability to decide where and how we want to apply
the values.
The advantage of this will become more clear when
we need to initialize wor
Hi
> +static struct drm_ioctl_desc ipvr_gem_ioctls[] = {
> + DRM_IOCTL_DEF_DRV(IPVR_CONTEXT_CREATE,
> + ipvr_context_create_ioctl, DRM_UNLOCKED),
> + DRM_IOCTL_DEF_DRV(IPVR_CONTEXT_DESTROY,
> + ipvr_context_destroy_ioctl, DRM_UNLOCKED),
> +
Previously, this was restricted to only operate on bound objects - to
make pointer access through the GTT to the object coherent with writes
to and from the GPU. A second usecase is drm_intel_bo_wait_rendering()
which at present does not function unless the object also happens to
be bound into the
Setup following resources during i915_driver_load:
1. create a child platform and resource
2. allocate a new IRQ line and irq chip
3. set up IRQ mask/unmask callbacks
vxd392 driver (if installed) will bind itself to the
platform device and create new drm device
Signed-off-by: Yao Cheng
---
drive
drm/ipvr is a new GEM driver for baytrail's vxd392, which accelerates VP8 video
decoding.
The driver name "ipvr" means the PowerVR's IP wrapped by Intel. In the future,
ipvr may support other platforms such as Merrifield.
Code is placed at drivers/gpu/drm/ipvr and the following two new Kconfig ar
On Sat, Oct 11, 2014 at 01:29:35PM +0800, Fengguang Wu wrote:
> FYI, we noticed the below changes on
>
> git://gitorious.org/vsyrjala/linux cdclk_3
> commit 5ba60fc3d719988a404d35a3e46f109bea643fef ("drm/i915: BDW cdclk change
> support")
>
>
> [ 13.959092] WARNING: CPU: 0 PID: 75 at
> driv
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