On Wed, Sep 17, 2014 at 04:59:20PM -0400, Rodrigo Vivi wrote:
> If it wasn't never enabled by kernel parameter or platform default
> we can avoid reading registers so many times in vain
Nak.
> Cc: Paulo Zanoni
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_pm.c | 6 ++
>
As we use WC updates of the PTE, we are responsible for notifying the
hardware when to flush its TLBs. Do so after we zap all the PTEs before
suspend (and the BIOS tries to read our GTT).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82340
Tested-by: ming@intel.com
Signed-off-by: Chri
Where can I find these pch device id definitions?
On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau
wrote:
> From: Satheeshakrishna M
>
> This patch implements detection of SPT and SPT-LP PCH devices.
>
> v2: Added HAS_PCH_SPT macro
>
> Signed-off-by: Satheeshakrishna M
> Signed-off-by: Damien Le
Oh I think we should reorganize everything here now...
It got messy... Well it was messy anyway already...
not this patch's fault so:
Reviewed-by: Rodrigo Vivi
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
wrote:
> Gen9 is different enough (for instance, fetching the memory latency
> values
Reviewed-by: Rodrigo Vivi
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
wrote:
> It can be handy to get the number of planes for this pipe, ie including
> the primary plane to loop over them. Introduce a little function to do
> so.
>
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i9
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
wrote:
> This can be useful to declare structures around pipes and planes and
> don't have to go back auditing the code if the next platorm bump that
> number.
>
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/i915_drv.h | 8
>
Reviewed-by: Rodrigo VIvi
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
wrote:
> Let's put to good use the new PLANE_CTL macros.
>
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/intel_display.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/dri
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
wrote:
> SKL Uses the same hardware for all planes now, so called "universal"
> planes. Ie both the primary planes and sprite planes share the same
> logic. This patch implements the drm_plane vfuncs for "sprites" ie
> planes that aren't the primary
Reviewed-by: Rodrigo Vivi
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
wrote:
> On Skylake, we use plane1 as primary plane and plane2/3 as sprite
> planes.
>
> v2: Rebase on top of the for_each_pipe() change adding dev_priv as first
> argument.
>
> Signed-off-by: Damien Lespiau
> ---
>
Reviewed-by: Rodrigo Vivi
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
wrote:
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_pm.c | 8
> 2 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
On Wed, Sep 17, 2014 at 1:49 PM, Paulo Zanoni wrote:
> 2014-09-05 17:57 GMT-03:00 Rodrigo Vivi :
> > The sw cache clean on gen8 is a tempoorary workaround because we cannot
> > set cache clean on blt ring with risk of hungs. So we are doing the
> cache clean on sw.
> > However we are doing much m
If it wasn't never enabled by kernel parameter or platform default
we can avoid reading registers so many times in vain
Cc: Paulo Zanoni
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_pm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/dr
2014-09-05 17:57 GMT-03:00 Rodrigo Vivi :
> The sw cache clean on gen8 is a tempoorary workaround because we cannot
> set cache clean on blt ring with risk of hungs. So we are doing the cache
> clean on sw.
> However we are doing much more than needed. Not only when using blt ring.
> So, with this
Please just ignore my latest comment here...
I confirm this works propperly with the PSR with my latest fixes...
On Fri, Sep 5, 2014 at 3:14 PM, Rodrigo Vivi wrote:
> Hey Daniel,
>
> funny story: Remember that with idle_frames=1 on BDW it was working but it
> was faililng on HSW?
> So, with thes
2014-09-05 17:57 GMT-03:00 Rodrigo Vivi :
> Avoid touching fbc register when fbc is disabled.
Just a note: we avoid touching _one_ fbc register, but now we touch
another one to check if FBC is enabled. OTOH
we probably want to modify intel_fbc_enabled() to also not touch
registers (since we run it
Cc: Ville Syrjälä
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 4e8b2ea..50d9169 100644
--- a/drivers/gpu/drm/i915/intel_ring
Although I believe that we could have a init_workaround function for skl as
we have for bdw and chv
On Wed, Sep 17, 2014 at 12:00 PM, Rodrigo Vivi
wrote:
> Reviewed-by: Rodrigo Vivi
>
> On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
> wrote:
>
>> Signed-off-by: Damien Lespiau
>> ---
>> drive
Reviewed-by: Rodrigo Vivi
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
wrote:
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/intel_pm.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 0dc1
Yeah, this might be only until B0 but useful for now anyway so feel free to
use
Reviewed-by: Rodrigo Vivi
On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
wrote:
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/intel_pm.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --gi
Oh cool here are the actual fixes on de_pipe int bits!
I agree with Daniel that a separated function would be better, but what is
here is right anyway so
Reviewed-by: Rodrigo Vivi
On Thu, Sep 4, 2014 at 6:19 AM, Daniel Vetter wrote:
> On Thu, Sep 04, 2014 at 12:26:58PM +0100, Damien Lespiau wr
On Wed, Sep 17, 2014 at 01:08:50PM -0400, Rodrigo Vivi wrote:
> v2: a more generic fix to cover current and future platforms (Damien).
>
> Cc: Damien Lespiau
> Signed-off-by: Rodrigo Vivi
(not needed for igt, but still)
Reviewed-by: Damien Lespiau
--
Damien
> ---
> tools/intel_reg_dumper.
2014-09-17 14:26 GMT-03:00 Jani Nikula :
> No functional changes.
http://patchwork.freedesktop.org/patch/24017/
But yeah, if you want to put more stuff there, intel_audio.c looks
like a better name.
>
> Signed-off-by: Jani Nikula
>
> ---
>
> I was looking at the audio stuff in connection with s
No functional changes.
Signed-off-by: Jani Nikula
---
I was looking at the audio stuff in connection with some bugs, and
thought the eld functions could use some love. But before proceeding, I
started wondering whether the audio functions would be better off in a
file of their own for starters,
Let's make sure PSR is propperly disabled before to re-enabled it.
According to Spec, after disabled PSR CTL, the Idle state might occur
up to 24ms, that is one full frame time (1/refresh rate),
plus SRD exit training time (max of 6ms),
plus SRD aux channel handshake (max of 1.5ms).
v2: The 24ms
v2: a more generic fix to cover current and future platforms (Damien).
Cc: Damien Lespiau
Signed-off-by: Rodrigo Vivi
---
tools/intel_reg_dumper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index 4bc299c..0b6d887 10064
On Wed, Sep 17, 2014 at 06:13:56PM +0200, Daniel Vetter wrote:
> On Wed, Sep 17, 2014 at 6:01 PM, Chris Wilson
> wrote:
> > On Wed, Sep 17, 2014 at 05:54:52PM +0200, Daniel Vetter wrote:
> >> On Wed, Sep 17, 2014 at 12:34:46PM +0100, Chris Wilson wrote:
> >> > At the end of a subtest, check for a
Yeah, this is true. I'm going to send a v2 with 50ms timeout. I forgot that.
I sign up Paulo for this review! :)
On Wed, Sep 17, 2014 at 8:50 AM, Daniel Vetter wrote:
> On Tue, Sep 16, 2014 at 07:19:08PM -0400, Rodrigo Vivi wrote:
> > Let's make sure PSR is propperly disabled before to re-enabl
Yeah, this is true. I'm going to send a v2 with 50ms timeout. I forgot that.
I sign up Paulo for this review! :)
On Wed, Sep 17, 2014 at 8:50 AM, Daniel Vetter wrote:
> On Tue, Sep 16, 2014 at 07:19:08PM -0400, Rodrigo Vivi wrote:
> > Let's make sure PSR is propperly disabled before to re-enabl
On Wed, Sep 17, 2014 at 6:01 PM, Chris Wilson wrote:
> On Wed, Sep 17, 2014 at 05:54:52PM +0200, Daniel Vetter wrote:
>> On Wed, Sep 17, 2014 at 12:34:46PM +0100, Chris Wilson wrote:
>> > At the end of a subtest, check for any WARNs or ERRORs (or worse!)
>> > emitted since the start of our test an
On Wed, Sep 17, 2014 at 05:54:52PM +0200, Daniel Vetter wrote:
> On Wed, Sep 17, 2014 at 12:34:46PM +0100, Chris Wilson wrote:
> > At the end of a subtest, check for any WARNs or ERRORs (or worse!)
> > emitted since the start of our test and FAIL the subtest if any are
> > found. This will prevent
On Wed, Sep 17, 2014 at 02:59:00PM +0100, Damien Lespiau wrote:
> On Wed, Sep 10, 2014 at 09:39:53PM +0300, Ville Syrjälä wrote:
> > > +struct skl_wm_values {
> > > + bool dirty[I915_MAX_PIPES];
> > > + uint32_t wm_linetime[I915_MAX_PIPES];
> > > + uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8]
On Wed, Sep 17, 2014 at 03:34:58PM +0300, Jani Nikula wrote:
> Check the correct bit for audio. Seems like a copy-paste error from the
> start:
>
> commit 9ed109a7b445e3f073d8ea72f888ec80c0532465
> Author: Daniel Vetter
> Date: Thu Apr 24 23:54:52 2014 +0200
>
> drm/i915: Track has_audio i
On Wed, Sep 17, 2014 at 12:34:46PM +0100, Chris Wilson wrote:
> At the end of a subtest, check for any WARNs or ERRORs (or worse!)
> emitted since the start of our test and FAIL the subtest if any are
> found. This will prevent silent failures due to oops from going amiss or
> being falsely reporte
On Tue, Sep 16, 2014 at 07:19:08PM -0400, Rodrigo Vivi wrote:
> Let's make sure PSR is propperly disabled before to re-enabled it.
>
> According to Spec, after disabled PSR CTL, the Idle state might occur
> up to 24ms, that is one full frame time (1/refresh rate),
> plus SRD exit training time (ma
On Mon, Sep 15, 2014 at 02:55:21PM +0200, Daniel Vetter wrote:
> Hi all,
>
> So I've tried to figure out a way how to clear up our irq setup mess, but
> instead only managed to get sidetracked on a spinlock usage review.
>
> Review highly welcome.
>
> Cheers, Daniel
>
> Daniel Vetter (11):
>
On Wed, Sep 17, 2014 at 10:38:36AM -0400, Rodrigo Vivi wrote:
> Signed-off-by: Rodrigo Vivi
> ---
> tools/intel_reg_dumper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
> index 4bc299c..f88bd9f 100644
> --- a/tools/
On 9/17/2014 11:20 AM, Jani Nikula wrote:
IMHO it would be perilous to apply these patches before we have root
caused https://bugs.freedesktop.org/show_bug.cgi?id=83482. I think we
need to be able to revert those changes if we can't fix the issue soon.
BR,
Jani.
Thanks Jani, I'll keep track
Oh Jani showed me that I was looking to the wrong spec.
So just ignore my previous comments and use:
Reviewed-by: Rodrigo Vivi
On Wed, Sep 17, 2014 at 6:46 AM, Rodrigo Vivi
wrote:
> besides the override bit,
> c8254h for bdw has the pwm frequency on 31:16 and on skl the frequency on
> same reg
On Wed, Sep 17, 2014 at 11:10:48AM -0300, Paulo Zanoni wrote:
> 2014-09-17 11:05 GMT-03:00 Paulo Zanoni :
> > 2014-09-15 4:22 GMT-03:00 Jani Nikula :
> >> On Fri, 12 Sep 2014, Ville Syrjälä wrote:
> >>> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
> On Fri, Sep 12, 2014 at 05
Signed-off-by: Rodrigo Vivi
---
tools/intel_reg_dumper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index 4bc299c..f88bd9f 100644
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -2972,7 +2972,7 @@ int ma
From: Paulo Zanoni
If we don't cancel them, we may end up running them while the device
is runtime suspended, which will trigger lots and lots of WARNs on
dmesg.
Regression introduced by:
commit c76bb61a71083b2d90504cc6d0dda2047c5d63ca
Author: Daisy Sun
Date: Mon Aug 11 11:08:38 2014 -0700
2014-09-17 11:05 GMT-03:00 Paulo Zanoni :
> 2014-09-15 4:22 GMT-03:00 Jani Nikula :
>> On Fri, 12 Sep 2014, Ville Syrjälä wrote:
>>> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrj...@linux.intel.com
wrote:
> From:
2014-09-15 4:22 GMT-03:00 Jani Nikula :
> On Fri, 12 Sep 2014, Ville Syrjälä wrote:
>> On Fri, Sep 12, 2014 at 04:42:33PM +0100, Chris Wilson wrote:
>>> On Fri, Sep 12, 2014 at 05:01:57PM +0300, ville.syrj...@linux.intel.com
>>> wrote:
>>> > From: Ville Syrjälä
>>> >
>>> > Bspec says we shouldn'
On Wed, Sep 10, 2014 at 09:39:53PM +0300, Ville Syrjälä wrote:
> > +struct skl_wm_values {
> > + bool dirty[I915_MAX_PIPES];
> > + uint32_t wm_linetime[I915_MAX_PIPES];
> > + uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8];
> > + uint32_t cursor[I915_MAX_PIPES][8];
> > + uint32_t plane
besides the override bit,
c8254h for bdw has the pwm frequency on 31:16 and on skl the frequency on
same register address is from 31:0 and also a pwm 2 register on c8354h.
So I think this patch can be right if there is an if IS_SKL without the >>
16 part inside bdw_enable_backlight.
On Wed, Sep 1
From: Pradeep Bhat
This patch defines SKL specific PLANE_WM Watermark registers. It also
defines macros to get the addresses of different LP levels within a pipe.
v2: Reworked the register definitions and associated macros to make it more
generic and be able to use for_each_pipe in values co
From: Deepak S
Based on the HW team inputs. We can should not wait for the old ack,
Waiting for old ack might fail, when other forcewake came before the
present one is desserted.
for example, if forcewake bit 0 was set and before it could get cleared
forcewake bit 1 got set, HW eventually clear
When handling the error on GEM_CLOSE, we weren't freeing the allocated
page. Plug that.
Signed-off-by: Damien Lespiau
---
intel/intel_bufmgr_gem.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index f378e5c..ce35bd4 1
Check the correct bit for audio. Seems like a copy-paste error from the
start:
commit 9ed109a7b445e3f073d8ea72f888ec80c0532465
Author: Daniel Vetter
Date: Thu Apr 24 23:54:52 2014 +0200
drm/i915: Track has_audio in the pipe config
Reported-by: Martin Andersen
Bugzilla: https://bugs.freed
On Thu, Sep 04, 2014 at 12:27:13PM +0100, Damien Lespiau wrote:
> From: Pradeep Bhat
>
> This patch implements the watermark algorithm and its necessary
> functions. Two function pointers skl_update_wm and
> skl_update_sprite_wm are provided. The skl_update_wm will update
> the watermarks for the
At the end of a subtest, check for any WARNs or ERRORs (or worse!)
emitted since the start of our test and FAIL the subtest if any are
found. This will prevent silent failures due to oops from going amiss or
being falsely reported as TIMEOUTs.
Signed-off-by: Chris Wilson
---
lib/igt_core.c | 114
On Thu, Jun 19, 2014 at 03:52:03PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Allow userptr objects to be created and used via libdrm_intel.
>
> At the moment tiling and mapping to GTT aperture is not supported
> due hardware limitations across different generations and uncertainty
On Thu, Sep 04, 2014 at 12:27:12PM +0100, Damien Lespiau wrote:
> We now need to allocate space in the DDB for planes being scanned out
> ourselves. The data structure to represent an allocation mirrors what
> we'll need to write in the registers later on: (start, end).
>
> We add that allocation
IMHO it would be perilous to apply these patches before we have root
caused https://bugs.freedesktop.org/show_bug.cgi?id=83482. I think we
need to be able to revert those changes if we can't fix the issue soon.
BR,
Jani.
On Tue, 16 Sep 2014, Michel Thierry wrote:
> Following the legacy ring su
On Wed, 17 Sep 2014, Rodrigo Vivi wrote:
> This is wrong.
>
> A skl_enable_backlight must be created setting c8254 propperly without the
> shift 16. Also maybe setting c8354h.
Nope, this is all right for skl/spt, with the small exception that it'll
need the equivalent of [1]. I'll post another ve
On Tue, 16 Sep 2014, "Carlos R. Mafra" wrote:
> Hi, the same happens with 3.17-rc5. The kernel is unfortunately
> unusable with my external monitor because after some plug, unplug
> and suspend to RAM cycles the behaviour is not good (sometimes
> it freezes, sometimes X needs a restart).
>
> Sorry
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