Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_display.c between commit a4bf214ffc72
("drm/i915: Move intel_ddi_set_vc_payload_alloc(false) to
haswell_crtc_disable()") from Linus' tree and commit 575f7ab754c4
("drm/i915: Pass intel_crtc to intel
On Wed, Sep 03, 2014 at 10:43:21AM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> This adds MST support to the UXA paths in the driver.
>
> Signed-off-by: Dave Airlie
I noticed that you changed the output naming scheme, so I restored the
current scheme and pushed,
aa10f48..908520a maste
On Sun, Sep 07, 2014 at 04:51:12PM +0100, Chris Wilson wrote:
> drm_send_vblank_event() demands that we hold the event spinlock whilst
> calling it, so do so.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/intel_display.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
drm_send_vblank_event() demands that we hold the event spinlock whilst
calling it, so do so.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_display.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/i
On Sun, Sep 07, 2014 at 09:08:31AM +0100, Chris Wilson wrote:
> Running igt, I was encountering the invalid TLB bug on my 845g, despite
> that it was using the CS workaround. Examining the w/a buffer in the
> error state, showed that the copy from the user batch into the
> workaround itself was suf
Running igt, I was encountering the invalid TLB bug on my 845g, despite
that it was using the CS workaround. Examining the w/a buffer in the
error state, showed that the copy from the user batch into the
workaround itself was suffering from the invalid TLB bug (the first
cacheline was broken with t
