On Fri, Jul 04, 2014 at 08:57:08AM +0100, Chris Wilson wrote:
> On Tue, Jul 01, 2014 at 11:17:43AM -0700, Ben Widawsky wrote:
> > Some of the original PPGTT patches in this area where unmerged, and this
> > left a lot of confusion in our error capture with regard to which vm/obj
> > we want to capt
On Fri, Jul 04, 2014 at 08:51:59AM +0100, Chris Wilson wrote:
> On Thu, Jul 03, 2014 at 03:01:49PM -0700, Ben Widawsky wrote:
> > This is a spec requirement for all rings.
> >
> > Signed-off-by: Ben Widawsky
> > ---
> > drivers/gpu/drm/i915/i915_gem_context.c | 3 +++
> > 1 file changed, 3 inser
From: Paulo Zanoni
Just like we do for the other encoders. This should fix some WARNs
when running pm_rpm on SNB.
Testcase: igt/pm_rpm
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80463
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_lvds.c | 5 +
1 file changed, 5 ins
From: Paulo Zanoni
And get/put it when needed. The special thing about this commit is
that it will now return false in ibx_pch_dpll_get_hw_state() in case
the power domain is not enabled. This will fix some WARNs we have when
we run pm_rpm on SNB.
Testcase: igt/pm_rpm
Bugzilla:https://bugs.freed
From: Paulo Zanoni
Just like we already do in haswell_get_pipe_config(). This should
prevent some WARNs when we run pm_rpm on SNB.
Testcase: igt/pm_rpm
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80463
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 4
1
From: Paulo Zanoni
Hi
When I originally wrote and tested SNB runtime PM it was working without any
errors, then I sent the patches to the mailing list and we ended up discarding
one of the patches that was needed. We ended up replacing that patch with a few
patches that only plugged the HSW hole
From: Paulo Zanoni
We may reach this point while the machine is still runtime suspended,
so we'll hit a WARN. The other encoders also don't touch registers at
this point, so instead of waking the machine up, write some code to
keep the register always at the same state, including after we runtime
On Fri, Jul 04, 2014 at 03:14:03PM +0530, sonika.jin...@intel.com wrote:
> From: Sonika Jindal
>
> Reset rotation property to 0 wherever applicable
>
> v2: Also calling set_property of the plane to set the rotation in the plane
> structure.
>
> Cc: damien.lesp...@intel.com
> Signed-off-by: Soni
On Fri, Jul 04, 2014 at 03:13:52PM +0530, sonika.jin...@intel.com wrote:
> From: Sonika Jindal
>
> Enables 180 degree rotation for sprite and primary planes.
> Updated the primary plane rotation support as per the new universal plane
> design.
>
> Most of these patches were already reviewed in i
From: Paulo Zanoni
On HSW, the D_COMP register can be accessed through the mailbox (read
and write) or through MMIO on a MCHBAR offset (read only). On BDW, the
access should be done through MMIO on another address. So to account
for all these cases, create hsw_read_dcomp() with the correct
implem
From: Paulo Zanoni
That function can be used to write anything on D_COMP, not just
disable it, so print a more appropriate message.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/inte
On Fri, Jul 04, 2014 at 03:14:02PM +0530, sonika.jin...@intel.com wrote:
> +static int intel_primary_plane_set_property(struct drm_plane *plane,
> + struct drm_property *prop,
> + uint64_t val)
> +{
> + struct drm_device *dev = pla
From: Paulo Zanoni
Move it from hsw_power_well_post_enable() (intel_pm.c) to i915_irq.c
so we can reuse the nice IRQ macros we have there. The main difference
is that now we're going to check if the IIR register is non-zero when
we try to re-enable the interrupts.
Signed-off-by: Paulo Zanoni
--
From: Paulo Zanoni
By the time I wrote this patch, it allowed me to catch some problems.
But due to patch reordering - in order to prevent fake "regression"
reports - this patch may be merged after the fixes of the problems
identified by this patch.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/
From: Paulo Zanoni
The current code only runs when we do an I915_WRITE operation. It
checks if the unclaimed register flag is set before we do the
operation, and then it checks it again after we do the operation. This
double check allows us to find out if the I915_WRITE operation in
question is t
From: Paulo Zanoni
Hi
Even though this feature is super useful for hardware enabling, we ended up not
enabling it on BDW, so we still silently hit some unclaimed registers on this
platform. This series first fixes the bugs fround by the feature, then
introduces the feature later. It also introdu
From: Paulo Zanoni
So don't write it, otherwise we will trigger unclaimed register
errors.
Testcase: igt/pm_rpm/rte
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
From: Paulo Zanoni
If we enable unclaimed register reporting on Gen 8, we will discover
that the IRQ registers for pipes B and C are also on the power well,
so writes to them when the power well is disabled result in unclaimed
register errors.
Also, hsw_power_well_post_enable() already takes car
On Fri, Jul 04, 2014 at 11:26:03AM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Don't let it fall in the HAS_PCH_SPLIT() case.
>
> Signed-off-by: Paulo Zanoni
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 d
From: Paulo Zanoni
Since we now have support for shared DPLLS.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index d5861bf..5187341 100644
From: Daniel Vetter
Still tacked onto the side, but slowly getting there.
v2: Don't forget the debugfs file.
v3 (from Paulo): Don't forget to check the power domains.
Signed-off-by: Daniel Vetter
Reviewed-by: Damien Lespiau
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_debugfs.
From: Paulo Zanoni
And get/put it when needed. The special thing about this commit is
that it will now return false in ibx_pch_dpll_get_hw_state() in case
the power domain is not enabled. This will fix some WARNs we have when
we run pm_rpm on SNB.
Testcase: igt/pm_rpm
Bugzilla:https://bugs.freed
On Thu, 03 Jul 2014, Chris Wilson wrote:
> On Thu, Jul 03, 2014 at 04:35:41PM +0530, Shobhit Kumar wrote:
>> We should keep DEVICE_READY bit set in the ULPS enter sequence. In
>> exit sequence also we should set DEVICE_READY, but thats causing
>> blankout for me. Also exit sequence is simplified a
From: Paulo Zanoni
Don't let it fall in the HAS_PCH_SPLIT() case.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b5ec489..aedce65 100644
From: Daniel Vetter
This way only the dynamic WRPLL selection for hdmi ddi mode is
done in intel_ddi_pll_select.
v2: Don't clobber the precomputed values when selecting clocks fro
hdmi encoders.
v3 (from Paulo): Rebase on top of the s/IS_HASWELL/HAS_DDI/ patch.
Signed-off-by: Daniel Vetter
---
On Fri, 04 Jul 2014, Damien Lespiau wrote:
> On Fri, Jul 04, 2014 at 08:20:11AM +0100, Chris Wilson wrote:
>> Inlcude the pipe-size and cursor-size in debugfs.
>>
>> Signed-off-by: Chris Wilson
>
> Reviewed-by: Damien Lespiau
Pushed to dinq, thanks for the patch and review.
BR,
Jani.
>
> --
2014-07-03 19:07 GMT-03:00 Clint Taylor :
> On 07/02/2014 07:40 AM, Paulo Zanoni wrote:
>>
>> 2014-07-02 5:35 GMT-03:00 Jani Nikula :
>>>
>>> From: Clint Taylor
>>>
>>> The panel power sequencer on vlv doesn't appear to accept changes to its
>>> T12 power down duration during warm reboots. This ch
On Fri, 04 Jul 2014, Scot Doyle wrote:
> Submitted with git to correct whitespace problems.
Pushed to drm-intel-fixes, thanks for the patches.
BR,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
___
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On Mon, Jun 30, 2014 at 04:44:21PM -0700, Matt Roper wrote:
> This patch set refactors the igt_kms library a bit to allow display state
> changes to be commited via different API's (with different "commit styles")
> and
> adds a new "universal" commit style that makes use of the universal plane AP
Doing otherwise breaks listing the subtests. The test was throwing an
error out when universal planes were disabled as well because of that.
Cc: Matt Roper
Signed-off-by: Damien Lespiau
---
tests/kms_universal_plane.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/tests/k
From: Ville Syrjälä
Propagate the error from intel_update_plane() up through
intel_plane_restore() to the caller. This will be used for
rollback purposes when setting properties fails.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
---
drivers/gpu/drm/
From: Ville Syrjälä
The sprite planes (in fact all display planes starting from gen4)
support 180 degree rotation. Add the relevant low level bits to the
sprite code to make use of that feature.
The upper layers are not yet plugged in.
v2: HSW handles the rotated buffer offset automagically
v3
From: Sonika Jindal
Reset rotation property to 0 wherever applicable
v2: Also calling set_property of the plane to set the rotation in the plane
structure.
Cc: damien.lesp...@intel.com
Signed-off-by: Sonika Jindal
---
drivers/gpu/drm/drm_fb_helper.c | 16 +++-
1 file changed, 15
From: Sonika Jindal
Primary planes support 180 degree rotation. Expose the feature
through rotation drm property.
v2: Calculating linear/tiled offsets based on pipe source width and
height. Added 180 degree rotation support in ironlake_update_plane.
v3: Checking if CRTC is active before issuein
From: Ville Syrjälä
drm_rotation_simplify() can be used to eliminate unsupported rotation
flags. It will check if any unsupported flags are present, and if so
it will modify the rotation to an alternate form by adding 180 degrees
to rotation angle, and flipping the reflect x and y bits. The hope
From: Ville Syrjälä
Add some helper functions to move drm_rects between different rotated
coordinate spaces. One function does the forward transform and
another does the inverse.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
---
drivers/gpu/drm/drm_re
From: Ville Syrjälä
Sprite planes support 180 degree rotation. The lower layers are now in
place, so hook in the standard rotation property to expose the feature
to the users.
v2: Moving rotation_property to drm_plane
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
Signed-off-
From: Ville Syrjälä
Use the new drm_mode_create_rotation_property() in omapdrm.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
Reviewed-by: Rob Clark
Reviewed-by: Imre Deak
Reviewed-by: Sagar Kamble
---
drivers/gpu/drm/omapdrm/omap_plane.c | 20 +++-
1 fi
From: Ville Syrjälä
The rotation property stuff should be standardized among all drivers.
Move the bits to drm_crtc.h from omap_drv.h.
Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
---
drivers/gpu/drm/omapdrm/omap_drv.h |7 ---
include/drm/drm_crtc.h |8
From: Sonika Jindal
Enables 180 degree rotation for sprite and primary planes.
Updated the primary plane rotation support as per the new universal plane
design.
Most of these patches were already reviewed in intel-gfx in February 2014 thats
why there is version history in few of them.
v2: Moved
From: Ville Syrjälä
Make drm_property_create_bitmask() a bit more generic by allowing the
caller to specify which bits are in fact supported. This allows multiple
callers to use the same enum list, but still create different versions
of the same property with different list of supported bits.
v2
From: Ville Syrjälä
Add a function to create a standards compliant rotation property.
Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
---
drivers/gpu/drm/drm_crtc.c | 18 ++
include/drm/drm_crtc.h |2 ++
2 files changed, 20 insertions(+)
diff --git a/drivers/gpu
On Fri, Jul 04, 2014 at 08:20:11AM +0100, Chris Wilson wrote:
> Inlcude the pipe-size and cursor-size in debugfs.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Damien Lespiau
--
Damien
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions
I've tested legacy boot. I have this bug.
On Fri, Jun 27, 2014 at 7:20 AM, Aaron Lu wrote:
> On 06/25/2014 07:08 PM, Jani Nikula wrote:
>> On Tue, 24 Jun 2014, Aaron Lu wrote:
>>> Some Thinkpad laptops' firmware will initiate a backlight level change
>>> request through operation region on the ev
On Tue, Jul 01, 2014 at 11:17:40AM -0700, Ben Widawsky wrote:
> As what was correctly debugged here:
> commit acc240d41ea1ab9c488a79219fb313b5b46265ae
> Author: Daniel Vetter
> Date: Thu Dec 5 15:42:34 2013 +0100
>
> drm/i915: Fix use-after-free in do_switch
>
> It then becomes apparent th
On Fri, 2014-06-27 at 11:20 +0800, Aaron Lu wrote:
> On 06/25/2014 07:08 PM, Jani Nikula wrote:
> > On Tue, 24 Jun 2014, Aaron Lu wrote:
> >> Some Thinkpad laptops' firmware will initiate a backlight level change
> >> request through operation region on the events of AC plug/unplug, but
> >> sinc
On Tue, Jul 01, 2014 at 11:17:51AM -0700, Ben Widawsky wrote:
> I was dealing with a bug recently where the system would hard hang
> somewhere between hangcheck and reset. There was time after error
> collection to actually get my error state out, but I couldn't get the
> reads to work.
>
> This p
On Tue, Jul 01, 2014 at 11:17:43AM -0700, Ben Widawsky wrote:
> Some of the original PPGTT patches in this area where unmerged, and this
> left a lot of confusion in our error capture with regard to which vm/obj
> we want to capture. There have been at least a couple of patches from
> Chris, and my
On Thu, Jul 03, 2014 at 03:01:49PM -0700, Ben Widawsky wrote:
> This is a spec requirement for all rings.
>
> Signed-off-by: Ben Widawsky
> ---
> drivers/gpu/drm/i915/i915_gem_context.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
> b/driv
Inlcude the pipe-size and cursor-size in debugfs.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_debugfs.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 0869df682f63..6d3f
Wrong patch escaped.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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---
drivers/gpu/drm/i915/i915_perf.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 7345b507a9dc..3741f69bc36f 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -46,6 +4
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