On 2014.06.19 17:53:51 +0800, Tiejun Chen wrote:
> Originally the reason to probe ISA bridge instead of Dev31:Fun0
> is to make graphics device passthrough work easy for VMM, that
> only need to expose ISA bridge to let driver know the real
> hardware underneath. This is a requirement from virtuali
Some Thinkpad laptops' firmware will initiate a backlight level change
request through operation region on the events of AC plug/unplug, but
since we are not using firmware's interface to do the backlight setting
on these affected laptops, we do not want the firmware to use some
arbitrary value fro
From: Chris Wilson
We neither report any unfinished operations during releasing GEM objects
associated with the file, and even if we did, it is bad form to report
-EINTR from a close().
The root cause of the bug that first showed itself during close is that
we do not do proper live tracking of v
This is just a cosmetic change to try to put do_switch_rcs on a diet. As
it stands, the function was quite complex, and error prone.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem_context.c | 32
1 file changed, 20 insertions(+), 12 deletions(-)
d
The simple explanation is, the docs say to do this for GEN8. Perhaps we
want to do this for GEN7 too, I am not certain.
PDPs are saved and restored with context. Contexts (without execlists)
only exist on the render ring. The docs say that PDPs are not power
context save/restored. I've learned th
From: Chris Wilson
Fallout from
commit 46470fc932ac8a0e8317a220b3f4ea4ed903338e
Author: Mika Kuoppala
Date: Wed May 21 19:01:06 2014 +0300
drm/i915: Add null state batch to active list
undid the earlier fix of only marking the ctx as initialised after it is
saved by the hardware during
There are two important reasons for this patch. It should make the
existing code a lot more readable. It also makes the next patch much
easier to understand in my opinion. There are 2 main variables that
effect this function, leaving 4 permutations:
ring: RCS vs !RCS
PPGTT: full or not
I didn't fi
Broadwell is perfectly capable of full PPGTT. I've been using it for
some time, and seen no especially ill effects.
Signed-off-by: Ben Widawsky
Conflicts:
drivers/gpu/drm/i915/i915_drv.h
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --gi
On Mon, Jun 23, 2014 at 02:35:38PM +, Mateo Lozano, Oscar wrote:
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Monday, June 23, 2014 2:42 PM
> > To: Mateo Lozano, Oscar
> > Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> > Subject: Re
Am Samstag, den 21.06.2014, 19:22 -1000 schrieb Linus Torvalds:
> It's a day early, but tomorrow ends up being inconvenient for me due
> to being on the road most of the day, so here you are. These days most
> people send me their pull requests and patches during the week, so
> it's not like I expe
Hi,
$ perf list
I see "net", "iommu" and other trace events listed however I do not see
any i915 ones. Is there anything in particular I need to do at build or
runtime to make them show up? i915 is loaded. I am using the perf tool
built under ~/tools/perf.
Thanks,
Mike
_
On Mon, Jun 23, 2014 at 07:35:38AM -0700, Mateo Lozano, Oscar wrote:
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Monday, June 23, 2014 2:42 PM
> > To: Mateo Lozano, Oscar
> > Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> > Subject: Re
On Mon, Jun 23, 2014 at 12:55:47PM +0300, Jani Nikula wrote:
> On Fri, 30 May 2014, Chris Wilson wrote:
> > Fallout from
> >
> > commit 46470fc932ac8a0e8317a220b3f4ea4ed903338e
> > Author: Mika Kuoppala
> > Date: Wed May 21 19:01:06 2014 +0300
> >
> > drm/i915: Add null state batch to activ
> -Original Message-
> From: Volkin, Bradley D
> Sent: Friday, June 20, 2014 10:18 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 27/53] drm/i915/bdw: GEN-specific logical
> ring emit request
>
> On Fri, Jun 13, 2014 at 08:37:45AM -0700
> -Original Message-
> From: Volkin, Bradley D
> Sent: Monday, June 23, 2014 4:06 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 12/53] drm/i915/bdw: Populate LR contexts
> (somewhat)
>
> On Mon, Jun 23, 2014 at 05:42:50AM -0700, Mateo
On Mon, Jun 23, 2014 at 05:42:50AM -0700, Mateo Lozano, Oscar wrote:
> > -Original Message-
> > From: Volkin, Bradley D
> > > + reg_state[CTX_RING_HEAD+1] = 0;
> > > + reg_state[CTX_RING_TAIL] = RING_TAIL(ring->mmio_base);
> > > + reg_state[CTX_RING_TAIL+1] = 0;
> > > + reg_state[CTX_RING_B
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, June 23, 2014 2:42 PM
> To: Mateo Lozano, Oscar
> Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical ring
> submission mechanism
On Mon, Jun 23, 2014 at 01:36:07PM +, Mateo Lozano, Oscar wrote:
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Monday, June 23, 2014 2:27 PM
> > To: Mateo Lozano, Oscar
> > Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> > Subject: Re
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, June 23, 2014 2:27 PM
> To: Mateo Lozano, Oscar
> Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical ring
> submission mechanism
On Mon, Jun 23, 2014 at 01:18:35PM +, Mateo Lozano, Oscar wrote:
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Monday, June 23, 2014 2:14 PM
> > To: Mateo Lozano, Oscar
> > Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> > Subject: Re
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, June 23, 2014 2:14 PM
> To: Mateo Lozano, Oscar
> Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical ring
> submission mechanism
On Mon, Jun 23, 2014 at 01:09:37PM +, Mateo Lozano, Oscar wrote:
> So far, yes, but that´s only because I artificially made intel_lrc.c
> self-contained, as Daniel requested. What if we need to execute commands from
> somewhere else, like in intel_gen7_queue_flip()?
>
> And this takes me to
> -Original Message-
> From: Volkin, Bradley D
> Sent: Friday, June 20, 2014 10:01 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical ring
> submission mechanism
>
> On Fri, Jun 13, 2014 at 08:37:44AM -0700,
> -Original Message-
> From: Volkin, Bradley D
> Sent: Friday, June 20, 2014 9:28 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 25/53] drm/i915/bdw: GEN-specific logical
> ring submit context (somewhat)
>
> On Fri, Jun 13, 2014 at 08:3
-
Intel Corporation (UK) Limited
Registered No. 1134945 (England)
Registered Office: Pipers Way, Swindon SN3 1RJ
VAT No: 860 2173 47
> -Original Message-
> From: Volkin, Bradley D
> Sent: Thursday, June 19, 2014 12:43 A
To achieve further power savings during system freeze (aka connected
standby, or s0ix) we have to send a PCI_D1 opregion notification. As
the information about the state we're entering (system freeze,
suspend to ram or suspend to disk) is only available through the ACPI
subsystem, make this support
> -Original Message-
> From: Volkin, Bradley D
> Sent: Thursday, June 19, 2014 12:24 AM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 12/53] drm/i915/bdw: Populate LR contexts
> (somewhat)
>
> On Fri, Jun 13, 2014 at 08:37:30AM -0700, osc
-
Intel Corporation (UK) Limited
Registered No. 1134945 (England)
Registered Office: Pipers Way, Swindon SN3 1RJ
VAT No: 860 2173 47
> -Original Message-
> From: Volkin, Bradley D
> Sent: Wednesday, June 18, 2014 11:19
Hi Chris/Daniel,
The patch is helping in some of the side-effects due to gpu boost. I still
need to get more data. I will keep the thread updated.
Thanks
Deepak
On Thursday 12 June 2014 03:02 PM, Daniel Vetter wrote:
Adding Deepak for testing, this hopefully alleviates the bad
side-effects o
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 18, 2014 9:49 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 41/53] drm/i915/bdw: Avoid non-lite-restore
> pr
On 06/19/2014 03:37 PM, Daniel Vetter wrote:
On Thu, Jun 19, 2014 at 03:34:34PM +0300, Ander Conselvan de Oliveira wrote:
From: Rob Bradford
The aim is that this is functionally equivalent to using the
I915_GEM_MMAP ioctl.
v2: Add aperture check limit, limit to SNB+ and improve error handling
On Mon, Jun 23, 2014 at 12:47:13PM +0200, Krzysztof Halasa wrote:
> Chris Wilson writes:
>
> > Hmm. Whilst it seems odd to have a negative linear offset, I have seen
> > it work elsewhere. Could you try setting
> > options i915 i915_enable_fbc=0 enable_fbc=0
> > in /etc/modprobe.conf/intel.conf
Adding relevant read out comparison code, in check_crtc_state, for the new
member of crtc_config, dp_m2_n2, which was introduced to store link_m_n
values for a DP downclock mode (if available). Suggested by Daniel.
v2: Changed patch title.
Daniel's review comments incorporated.
Added relevant stat
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Tuesday, June 17, 2014 11:38 PM
> To: Wang, Quanxian
> Cc: intel-gfx@lists.freedesktop.org; Daniel Vetter
> Subject: RE: [Intel-gfx] [PATCH] drm/i915/vlv: DP_SINK_COUNT is not reliable
> for valleyview p
For Gen < 8, set M2_N2 registers on every mode set. This is required to make
sure M2_N2 registers are set during boot, resume from sleep for cross-
checking the state. The register is set only if DRRS is supported.
v2: Patch rebased
v3: Daniel's review comments
- Removed HAS_DRRS(dev) and
On Wed, Jun 18, 2014 at 10:04:48PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> We're forgetting to unpin the last_context from the ggtt at GPU reset
> time. This leads to the vma pin_count leaking at every reset if the
> last context wasn't the ring default context. Furt
On Mon, Jun 23, 2014 at 11:33:52AM +0200, Krzysztof Halasa wrote:
> Chris Wilson writes:
>
> >> switch to mode 1920x1200@60.0 on pipe 0 using HDMI1, position (2176, 7),
> >> rotation normal
> >>
> >> Now I scroll down 1 pixel:
> >> switch to mode 1920x1200@60.0 on pipe 0 using HDMI1, position (
On Fri, 30 May 2014, Chris Wilson wrote:
> Fallout from
>
> commit 46470fc932ac8a0e8317a220b3f4ea4ed903338e
> Author: Mika Kuoppala
> Date: Wed May 21 19:01:06 2014 +0300
>
> drm/i915: Add null state batch to active list
>
> undid the earlier fix of only marking the ctx as initialised after
From: Akash Goel
This patch changes the return type of 'crtc_restore_mode'
function from 'void', so that an error could be returned back to
User space, from the set property ioctl call, if the configuation
is not valid.
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/intel_display.c | 5 ++
From: Akash Goel
Added new drm crtc properties which provides control
to vary the size of horizontal & vertical borders.
With this the size of the Panel fitter output or
display window can be controlled.
Also added a return type to panel fitter config & crtc retsore mode
functions, so that an
From: Akash Goel
Updated drm documentation to include description of
border size property
Signed-off-by: Akash Goel
---
Documentation/DocBook/drm.tmpl | 36 ++--
1 file changed, 34 insertions(+), 2 deletions(-)
diff --git a/Documentation/DocBook/drm.tmpl b/Docu
From: Akash Goel
This patch defines a new function & assigns that to the 'set_property'
function pointer field of the 'intel_crtc_funcs' structure.
Signed-off-by: Akash Goel
---
drivers/gpu/drm/i915/intel_display.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i9
From: Akash Goel
This patch adds a new drm crtc property for varying the size of
the horizontal & vertical borers of the output/display window.
This will control the output of Panel fitter.
There are actually 4 separate properties so as to allow a
control on the size of each border left/top/botto
From: Akash Goel
This patch changes the return type of panel fitter configuration
functions from 'void', so that an error could be returned back to
User space, either during the modeset time or when some property
is being set, if the configuation is not valid.
v2: Removed the interface change fo
On Fri, 2014-06-20 at 15:07 +0100, Damien Lespiau wrote:
> On Fri, Jun 20, 2014 at 07:25:51PM +0530, akash.g...@intel.com wrote:
> > From: Akash Goel
> >
> > Added new drm crtc properties which provides control
> > to vary the size of horizontal & vertical borders.
> > With this the size of the
On Fri, 2014-06-20 at 15:03 +0100, Chris Wilson wrote:
> On Fri, Jun 20, 2014 at 07:25:52PM +0530, akash.g...@intel.com wrote:
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 912e9c4..6117639 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++
On Mon, Jun 23, 2014 at 09:49:07AM +0200, Krzysztof Halasa wrote:
> khal...@piap.pl (Krzysztof Hałasa) writes:
>
> > I'm having screen update problems problems with an Intel HD 4600 with
> > panning + virtual screen. Fedora 20 + updates, CPU is Core i7 4770K,
> > I'm using xrandr --output HDMI1 --
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