Re: [Intel-gfx] [PATCH 5/8] gem_exec_nop.c: add vebox test case

2013-04-27 Thread Li, Zhong
Sorry for the copy error. In fact, I was going to send out patches which fix it. Thanks -Original Message- From: Ben Widawsky [mailto:benjamin.widaw...@intel.com] Sent: Sunday, April 28, 2013 2:46 AM To: Li, Zhong Cc: intel-gfx@lists.freedesktop.org; Xiang, Haihao; Vetter, Daniel Subject:

[Intel-gfx] [PATCH 15/18] drm/i915: Enable vebox interrupts

2013-04-27 Thread Ben Widawsky
Similar to a patch originally written by: v2: Reversed the meanings of masked and enabled (Haihao) Made non-destructive writes in case enable/disabler rps runs first (Haihao) CC: Xiang, Haihao Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_irq.c | 26

[Intel-gfx] [PATCH 18/18] drm/i915: add I915_PARAM_HAS_VEBOX to i915_getparam

2013-04-27 Thread Ben Widawsky
From: "Xiang, Haihao" This will let userland only try to use the new ring when the appropriate kernel is present Signed-off-by: Xiang, Haihao [Order changed, and merge conflict resolved by] Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_dma.c | 3 +++ include/uapi/drm/i915_drm.h

[Intel-gfx] [PATCH 13/18] drm/i915: consolidate interrupt naming scheme

2013-04-27 Thread Ben Widawsky
The motivation here is we're going to add some new interrupt definitions and handling outside of the GT interrupts which is all we've managed so far (with some RPS exceptions). By consolidating the names in the future we can make thing a bit cleaner as we don't need to define register names twice,

[Intel-gfx] [PATCH 17/18] drm/i915: add I915_EXEC_VEBOX to i915_gem_do_execbuffer()

2013-04-27 Thread Ben Widawsky
From: "Xiang, Haihao" A user can run batchbuffer via VEBOX ring. Signed-off-by: Xiang, Haihao [Order changed by] Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 9 + include/uapi/drm/i915_drm.h| 1 + 2 files changed, 10 insertions(+) diff

[Intel-gfx] [PATCH 16/18] drm/i915: add VEBOX into debugfs

2013-04-27 Thread Ben Widawsky
From: "Xiang, Haihao" v2 (Ben): s/hsw/hws Signed-off-by: Xiang, Haihao [Order changed, and modified by] Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 14/18] drm/i915: vebox interrupt get/put

2013-04-27 Thread Ben Widawsky
v2: Use the correct lock to protect PM interrupt regs, this was accidentally lost from earlier (Haihao) Fix return types (Ben) CC: Xiang, Haihao Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_ringbuffer.c | 46 +++-- drivers/gpu/drm/i915/intel_ringbuffer.

[Intel-gfx] [PATCH 12/18] drm/i915: Convert irq_refounct to struct

2013-04-27 Thread Ben Widawsky
It's overkill on older gens, but it's useful for newer gens. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_ringbuffer.c | 16 drivers/gpu/drm/i915/intel_ringbuffer.h | 4 +++- 2 files changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/inte

[Intel-gfx] [PATCH 11/18] drm/i915: Add PM regs to pre install

2013-04-27 Thread Ben Widawsky
Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_irq.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 21b09cd..4a1b7f5 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -

[Intel-gfx] [PATCH 09/18] drm/i915: make PM interrupt writes non-destructive

2013-04-27 Thread Ben Widawsky
PM interrupts have an expanded role on HSW. It helps route the EBOX interrupts. This patch is necessary to make the existing code which touches the mask, and enable registers more friendly to other code paths that also will need these registers. To be more explicit: At preinstall all interrupts ar

[Intel-gfx] [PATCH 10/18] drm/i915: Create an ivybridge_irq_preinstall

2013-04-27 Thread Ben Widawsky
Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_irq.c | 27 ++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 13ea6c2..21b09cd 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++

[Intel-gfx] [PATCH 08/18] drm/i915: Create a more generic pm handler for hsw+

2013-04-27 Thread Ben Widawsky
HSW has some special requirements for the VEBOX. Splitting out the interrupt handler will make the code a bit nicer and less error prone when we begin to handle those. The slight functional change in this patch (queueing work while holding the spinlock) is intentional as it makes a subsequent patc

[Intel-gfx] [PATCH 05/18] drm/i915: Rename ring flush functions

2013-04-27 Thread Ben Widawsky
Historically we considered the render ring to have special flush semantics and everything else to fall under a more general umbrella. Probably by coincidence more than anything we decided to make the bsd ring have the default *other* flush. As the new vebox ring exposes, the bsd ring is actually th

[Intel-gfx] [PATCH 07/18] drm/i915: Vebox ringbuffer init

2013-04-27 Thread Ben Widawsky
v2: Add set_seqno which didn't exist before rebase (Haihao) Signed-off-by: Ben Widawsky Signed-off-by: Xiang, Haihao --- drivers/gpu/drm/i915/i915_gem.c | 11 ++- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ringbuffer.c | 35 +++

[Intel-gfx] [PATCH 06/18] drm/i915: add HAS_VEBOX

2013-04-27 Thread Ben Widawsky
From: "Xiang, Haihao" The flag will be useful to help share code between IVB, and HSW as the programming is similar in many places with this as one of the major differences. v2 (Ben): used the new dev info macros Signed-off-by: Xiang, Haihao [Commit message + small fix by] Signed-off-by: Ben W

[Intel-gfx] [PATCH 04/18] drm/i915: Add VECS semaphore bits

2013-04-27 Thread Ben Widawsky
Like the other rings, the VECS supports semaphores. The semaphore stuff is a bit wonky so this patch on it's own should be nice for review. This patch should have no functional impact. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_reg.h | 40 ++---

[Intel-gfx] [PATCH 03/18] drm/i915: Introduce VECS: the 4th ring

2013-04-27 Thread Ben Widawsky
The video enhancement command streamer is a new ring on HSW which does what it sounds like it does. This patch provides the most minimal inception of the ring. In order to support a new ring, we need to bump the number. The patch may look trivial to the untrained eye, but bumping the number of rin

[Intel-gfx] [PATCH 02/18] drm/i915: Semaphore MBOX update generalization

2013-04-27 Thread Ben Widawsky
This replaces the existing MBOX update code with a more generalized calculation for emitting mbox updates. We also create a sentinel for doing the updates so we can more abstractly deal with the rings. When doing MBOX updates the code must be aware of the /other/ rings. Until now the platforms whi

[Intel-gfx] [PATCH 01/18] drm/i915: Comments for semaphore clarification

2013-04-27 Thread Ben Widawsky
Semaphores are tied very closely to the rings in the GPU. Trivial patch adds comments to the existing code so that when we add new rings we can include comments there as well. It also helps distinguish the ring to semaphore mailbox interactions by using the ringname in the semaphore data structures

[Intel-gfx] [PATCH 00/18] Introduce the Haswell VECS

2013-04-27 Thread Ben Widawsky
Here is the original post with the RFC for these patches. http://lists.freedesktop.org/archives/intel-gfx/2012-November/022330.html I don't believe there have been any major changes in the driver code. So, what's changed since last time? I've pushed 4 patches which implement tests for the new ri

Re: [Intel-gfx] [PATCH v3] drm/i915: Always normalize return timeout for wait_timeout_ioctl

2013-04-27 Thread Ben Widawsky
On Fri, Apr 26, 2013 at 04:22:46PM +0300, ville.syrj...@linux.intel.com wrote: > From: Chris Wilson > > As we recompute the remaining timeout after waiting, there is a > potential for that timeout to be less than zero and so need sanitizing. > The timeout is always returned to userspace and valid

Re: [Intel-gfx] [PATCH 0/8] i-g-t: vebox test case

2013-04-27 Thread Ben Widawsky
On Tue, Apr 23, 2013 at 03:06:40PM +0800, Zhong Li wrote: > Add vebox test cases for intel-gfx-tool I've modified and pushed everything in this series except for the secure stuff. Daniel, now is the time to chime in if you want more tests. [snip] -- Ben Widawsky, Intel Open Source Technology Cen

Re: [Intel-gfx] [PATCH 8/8] gem_ring_sync_loop.c: fix an operator error

2013-04-27 Thread Ben Widawsky
On Tue, Apr 23, 2013 at 03:06:48PM +0800, Zhong Li wrote: > Signed-off-by: Zhong Li > --- > tests/gem_ring_sync_loop.c |6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/tests/gem_ring_sync_loop.c b/tests/gem_ring_sync_loop.c > index 955bf34..cb79e7c 100644 > --- a

Re: [Intel-gfx] [PATCH 5/8] gem_exec_nop.c: add vebox test case

2013-04-27 Thread Ben Widawsky
On Tue, Apr 23, 2013 at 03:06:45PM +0800, Zhong Li wrote: > Signed-off-by: Zhong Li > --- > tests/gem_exec_nop.c |5 - > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/tests/gem_exec_nop.c b/tests/gem_exec_nop.c > index 8608592..d0fa5d5 100644 > --- a/tests/gem_exec_nop.

Re: [Intel-gfx] [PATCH 4/8] gem_cs_tlb.c: add vebox test case

2013-04-27 Thread Ben Widawsky
On Tue, Apr 23, 2013 at 03:06:44PM +0800, Zhong Li wrote: > Signed-off-by: Zhong Li > --- > tests/gem_cs_tlb.c |6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/tests/gem_cs_tlb.c b/tests/gem_cs_tlb.c > index 9f49ac9..6c190d7 100644 > --- a/tests/gem_cs_tlb.c > +++

Re: [Intel-gfx] [PATCH 4/8] gem_cs_tlb.c: add vebox test case

2013-04-27 Thread Ben Widawsky
On Tue, Apr 23, 2013 at 03:06:44PM +0800, Zhong Li wrote: > Signed-off-by: Zhong Li > --- > tests/gem_cs_tlb.c |6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/tests/gem_cs_tlb.c b/tests/gem_cs_tlb.c > index 9f49ac9..6c190d7 100644 > --- a/tests/gem_cs_tlb.c > +++

Re: [Intel-gfx] [PATCH 2/2] intel: Add support for VEBOX ring (v2)

2013-04-27 Thread Ben Widawsky
On Wed, Nov 14, 2012 at 12:46:39PM +0800, Xiang, Haihao wrote: > From: "Xiang, Haihao" > > v2: Fix the test for has_vebox > > Signed-off-by: Xiang, Haihao I've pushed a conflict resolved version of this patch. [snip] -- Ben Widawsky, Intel Open Source Technology Center __

Re: [Intel-gfx] [PATCH] drm/i915: correct the calculation of first_pd_entry_in_global_pt

2013-04-27 Thread Ben Widawsky
On Sat, Apr 27, 2013 at 01:40:57PM +0200, Daniel Vetter wrote: > On Sat, Apr 27, 2013 at 09:53:33AM +, Zhang, Xiong Y wrote: > > When ppgtt is enabled, dev_priv->gtt.total has excluded the gtt space > > occupied by ppgtt table in i915_gem_init_global_gtt() function. So the > > calculation of

Re: [Intel-gfx] [PATCH] drm/i915: Only print the info message about incresing stolen size for FBC once

2013-04-27 Thread Daniel Vetter
On Sat, Apr 27, 2013 at 12:44:16PM +0100, Chris Wilson wrote: > Instead of repeatedly bombarding the user with a request to reboot and > increase the stolen size with every fb refresh, just inform them the > first time only. > > v2: Rearrange code so the hint to increase the amount of memory stole

[Intel-gfx] [PATCH] drm/i915: Only print the info message about incresing stolen size for FBC once

2013-04-27 Thread Chris Wilson
Instead of repeatedly bombarding the user with a request to reboot and increase the stolen size with every fb refresh, just inform them the first time only. v2: Rearrange code so the hint to increase the amount of memory stolen by the BIOS is only emitted if we fail to find sufficient stolen memor

Re: [Intel-gfx] [PATCH] drm/i915: correct the calculation of first_pd_entry_in_global_pt

2013-04-27 Thread Daniel Vetter
On Sat, Apr 27, 2013 at 09:53:33AM +, Zhang, Xiong Y wrote: > When ppgtt is enabled, dev_priv->gtt.total has excluded the gtt space > occupied by ppgtt table in i915_gem_init_global_gtt() function. So the > calculation of first_pd_entry_in_global_pt doesn't need to subtract > I915_PPGTT_PD_E

Re: [Intel-gfx] [PATCH] drm/i915: Add private api for power well usage -- alignment between graphic team and audio team

2013-04-27 Thread Daniel Vetter
On Sat, Apr 27, 2013 at 09:20:39AM +, Wang, Xingchao wrote: > Let me throw a basic proposal on Audio driver side, please give your > comments freely. > > it contains the power well control usage points: > #1: audio request power well at boot up. > I915 may shut down power well after bootup i

[Intel-gfx] [PATCH] drm/i915: correct the calculation of first_pd_entry_in_global_pt

2013-04-27 Thread Zhang, Xiong Y
When ppgtt is enabled, dev_priv->gtt.total has excluded the gtt space occupied by ppgtt table in i915_gem_init_global_gtt() function. So the calculation of first_pd_entry_in_global_pt doesn't need to subtract I915_PPGTT_PD_ENTRIES again. Or else PPGTT directory table will be destroyed by global

Re: [Intel-gfx] [PATCH] drm/i915: Add private api for power well usage -- alignment between graphic team and audio team

2013-04-27 Thread Wang, Xingchao
Hi Daniel/Takashi, > -Original Message- > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter > Sent: Saturday, April 27, 2013 1:18 AM > To: Takashi Iwai > Cc: Daniel Vetter; Li, Jocelyn; Daniel Vetter; Wang, Xingchao; Zanoni, Paulo > R; > ville.syrj...@linux.in

Re: [Intel-gfx] [PATCH] drm/i915: Add private api for power well usage -- alignment between graphic team and audio team

2013-04-27 Thread Wang, Xingchao
Hi Takashi, > -Original Message- > From: Takashi Iwai [mailto:ti...@suse.de] > Sent: Friday, April 26, 2013 11:13 PM > To: Daniel Vetter > Cc: Li, Jocelyn; Daniel Vetter; Wang, Xingchao; Zanoni, Paulo R; > ville.syrj...@linux.intel.com; Lin, Mengdong; Girdwood, Liam R; > intel-gfx@lists.f

Re: [Intel-gfx] [PATCH] drm/i915: Add private api for power well usage -- alignment between graphic team and audio team

2013-04-27 Thread Wang, Xingchao
Hi Daniel, > -Original Message- > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter > Sent: Friday, April 26, 2013 10:57 PM > To: Li, Jocelyn > Cc: Daniel Vetter; Wang, Xingchao; Zanoni, Paulo R; > ville.syrj...@linux.intel.com; Lin, Mengdong; Girdwood, Liam R;