[Intel-gfx] [PATCH 6/6] drm/i915: More HSW PM clean up.

This is the last cleaning up patch for HSW, letting render standby programming sequence like the documented one at HSW PM programing guide. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_pm.c | 9 - 1 file changed, 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c

[Intel-gfx] [PATCH 5/6] drm/i915: Use all PM deferred events for HSW.

Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_reg.h | 7 +++ drivers/gpu/drm/i915/intel_pm.c | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ef47cee..7977b65 100644 --- a/drivers/gpu/drm/

[Intel-gfx] [PATCH 4/6] drm/i915: HSW PM - removing pcode read/write.

Yet according to pm spec pcode read/write operations aren't necessary for HSW. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_pm.c | 26 -- 1 file changed, 26 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 32

[Intel-gfx] [PATCH 3/6] drm/i915: HSW PM Cleaning - Removing unecessary register/bits set.

According to HSW PM Programming guide it is not needed touch this registers or setting these values anymore. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_pm.c | 11 ++- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/g

[Intel-gfx] [PATCH 2/6] drm/i915: HSW PM Frequency bits fix

According to HSW PM programming guide, frequency bits starts at 24 instead of 25 Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drive

[Intel-gfx] [PATCH 1/6] drm/i915: creating Haswell rc6 function

Power management, in special RC6 enabling, differs across platforms. This patch just split out enabling function for HSW. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_pm.c | 158 1 file changed, 145 insertions(+), 13 deletions(-) diff --git

[Intel-gfx] [PATCH 0/6] HSW PM - RC6 clean up and fixes.

Since the patch I sent last week was big and difficult for reviews I split out it in these 6 patches, where I create a hsw_enable_rps function to receive the sequence documented at HSW PM programming guide. Since it has many differences when compared to SNB enable I decided to split enable function

[Intel-gfx] [PATCH 8/8] drm/i915: Hook PSR functionality

PSR must be enabled after transcoder and port are running. And it is only available for HSW. v2: move enable/disable to intel_ddi Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_ddi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu

[Intel-gfx] [PATCH 7/8] drm/i915: Added debugfs support for PSR Status

Adding support for PSR Status, PSR entry counter and performance counters. Heavily based on initial work from Shobhit. Credits-by: Shobhit Kumar Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_debugfs.c | 92 + drivers/gpu/drm/i915/i915_reg.h |

[Intel-gfx] [PATCH 6/8] drm/i915: Enable/Disable PSR

Adding Enable and Disable PSR functionalities. This includes setting the PSR configuration over AUX, sending SDP VSC DIP over the eDP PIPE config, enabling PSR in the sink via DPCD register and finally enabling PSR on the host. This patch is heavily based on initial PSR code by Sateesh Kavuri and

[Intel-gfx] [PATCH 5/8] drm/i915: VBT Parsing for the PSR Feature Block for HSW

From: Shobhit Kumar Parse and store useful information in i915_dev_private Signed-off-by: Shobhit Kumar v2: Add to new vbt struct and call them psr_* Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_drv.h | 7 +++ drivers/gpu/drm/i915/intel_bios.c | 30 ++

[Intel-gfx] [PATCH 4/8] drm/i915: Read the EDP DPCD and PSR Capability

From: Shobhit Kumar Signed-off-by: Shobhit Kumar v2: reuse of just created is_edp_psr and put it at right place. Signed-off-by: Rodrigo Vivi Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dp.c | 13 + drivers/gpu/drm/i915/intel_drv.h | 1 + 2 files changed, 14 inserti

[Intel-gfx] [PATCH 3/8] drm/i915: Added SDP and VSC structures for handling PSR for eDP

From: Shobhit Kumar Signed-off-by: Sateesh Kavuri v2: Modified and corrected the structures to be more in line for kernel coding guidelines and rebased the code on Paulo's DP patchset Signed-off-by: Shobhit Kumar v3: removing unecessary identation at DP_RECEIVER_CAP_SIZE v4: moving them to i

[Intel-gfx] [PATCH 2/8] drm/i915: Use cpu_transcoder for HSW_TVIDEO_DIP_* instead of pipe

While old platforms had 3 transcoders and 3 pipes (1:1), HSW has 4 transcoders and 3 pipes. These regs were being used only by HDMI code where pipe is always the same thing as cpu_transcoder. This patch allow us to use them for DP, specially for TRANSCODER_EDP. v2: Adding HSW_TVIDEO_DIP_VSC_DATA t

[Intel-gfx] [PATCH 1/8] drm/i915: Organize VBT stuff inside drm_i915_private

drm_i915_private is getting bigger and bigger when adding new vbt stuff. So, the better way of getting drm_i915_private organized is to create a special structure for vbt stuff. Signed-off-by: Rodrigo Vivi Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/i915_dma.c | 8 +-- drivers/gpu/d

[Intel-gfx] [PATCH 0/8] Enable eDP PSR functionality at HSW - v3

PSR is an eDP feature that allows power saving even with static image at eDP screen. v3: Accepted many suggestions that I received at v2 review, fixing, cleaning and improving the code. v2: Main differences in this v2: - Created vbt struct to get i915 dev_priv more organized and to avoid adding

Re: [Intel-gfx] VT switchless suspend/resume

On Mon, 25 Feb 2013 16:19:53 -0300 Paulo Zanoni wrote: > Hi > > 2013/2/19 Paulo Zanoni : > > 2013/2/19 Jesse Barnes : > >> Updated with the fix from Ville. > > > > Very briefly tested on SNB (LVDS) and HSW (eDP + DP). Suspend-to-ram + > > resume still work. > > So, today I looked at the patches

Re: [Intel-gfx] [PATCH 2/2] drm/i915: gen2 has no tv out support

Hi 2013/2/21 Daniel Vetter : > So ditch that if clause from the i8xx pll update code. > > Signed-off-by: Daniel Vetter Reviewed-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_display.c | 6 +- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/inte

[Intel-gfx] [PATCH v.2 12/12] DRM/i915: Only reprobe display on encoder which has received an HPD event.

Instead of calling into the DRM helper layer to poll all connectors for changes in connected displays probe only those connectors which have received a hotplug event. Signed-off-by: Egbert Eich --- drivers/gpu/drm/i915/i915_irq.c | 37 +++-- 1 files changed, 31

[Intel-gfx] [PATCH v.2 11/12] DRM/i915: Add bit field to record which pins have received HPD events.

This way it is possible to limit 're'-detect() of displays to connectors which have received an HPD event. Signed-off-by: Egbert Eich --- drivers/gpu/drm/i915/i915_drv.h |1 + drivers/gpu/drm/i915/i915_irq.c | 10 ++ 2 files changed, 11 insertions(+), 0 deletions(-) diff --git a/d

[Intel-gfx] [PATCH v.2 10/12] DRM/i915: Add Reenable Timer to turn Hotplug Detection back on.

We disable hoptplug detection when we encounter a hotplug event storm. Still hotplug detection is required on some outputs (like Display Port). The interrupt storm may be only temporary (on certain Dell Laptops for instance it happens at certain charging states of the system). Thus we enable it aft

[Intel-gfx] [PATCH v.2 09/12] DRM/i915: Disable HPD interrupt on pin when irq storm is detected.

This patch disables hotplug interrupts if an 'interrupt storm' has been detected. Noise on the interrupt line renders the hotplug interrupt useless: each hotplug event causes the devices to be rescanned which will will only increase the system load. Thus disable the hotplug interrupts and fall back

[Intel-gfx] [PATCH v.2 08/12] DRM/i915: Treat hpd_irq_setup() for ironake and older generations the same way.

When switching to enabling HPD IRQs only for lines where needed and supported this will ensure that the right lines will be enabled on all generations when intel_hpd_init() is called. Signed-off-by: Egbert Eich --- drivers/gpu/drm/i915/i915_irq.c | 10 +- 1 files changed, 5 insertions(

[Intel-gfx] [PATCH v.2 05/12] DRM/i915: Get rid if the 'hotplug_supported_mask' in struct drm_i915_private.

Now since we have replaced the bits to show interest in hotplug IRQs we can go and nuke the 'hotplug_supported_mask'. Signed-off-by: Egbert Eich --- drivers/gpu/drm/i915/i915_drv.h |1 - drivers/gpu/drm/i915/intel_crt.c |2 -- drivers/gpu/drm/i915/intel_dp.c |3 --- drivers/gpu/

[Intel-gfx] [PATCH v.2 07/12] DRM/i915: (re)init HPD interrupt storm statistics.

When an encoder is shared on several connectors there is only one hotplug line, thus this line needs to be shared among these connectors. If HPD detect only works reliably on a subset of those connectors, we want to poll the others. Thus we need to make sure that storm detection doesn't mess up the

[Intel-gfx] [PATCH v.2 06/12] DRM/i915: Add HPD IRQ storm detection.

Add a hotplug IRQ storm detection (triggered when a hotplug interrupt fires more than 5 times / sec). Mask out this specific interrupt and revert to polling on the associated output. Rationale: Despite of the many attempts to fix the problem with noisy hotplug interrupt lines we are still seeing sy

[Intel-gfx] [PATCH v.2 02/12] DRM/I915: Add enum hpd_pin to intel_encoder.

To clean up hotplug support we add a new enum to intel_encoder: enum hpd_pin. It allows the encoder to request a hpd line but leave the details which IRQ is responsible on which chipset generation to i915_irq.c. This way requesting hotplug support will become really simple on the encoder/connector

[Intel-gfx] [PATCH v.2 03/12] DRM/i915: Convert HPD interrupts to make use of HPD pin assignment in encoders.

This allows to enable HPD interrupts for individual pins to only receive hotplug events from lines which are connected and working. Signed-off-by: Egbert Eich --- drivers/gpu/drm/i915/i915_irq.c | 160 -- drivers/gpu/drm/i915/i915_reg.h | 32 - 2 fi

[Intel-gfx] [PATCH v.2 01/12] DRM/i915: Remove valleyview_hpd_irq_setup.

It's basically identical to i915_hpd_irq_setup(). Signed-off-by: Egbert Eich --- drivers/gpu/drm/i915/i915_irq.c | 26 +- 1 files changed, 1 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 2cd97d1..5fd

[Intel-gfx] [PATCH v.2 04/12] DRM/i915: Remove i965_hpd_irq_setup.

After "Convert HPD interrupts to make use of HPD pin assignment in encoders." This function is now basically the same as i915_hpd_irq_setup(). Consolidating both functions in one requires one more check for I915_HAS_HOTPLUG(dev) in the i965 code path and one more check for IS_G4X(dev) in the i915

[Intel-gfx] [PATCH v.2 00/12] Detect and deal with Interrupt 'Storms' from noisy Hotplug Lines.

I've reworked my 'hotplug interrupt storm detection'-patches and included most of Daniel's suggestions. I've looked into adding EDID caching but since this requires some larger scale changes and some changes outside of the Intel driver it seemed to be a good idea to propose those changes at a late

Re: [Intel-gfx] [PATCH] drm/i915: Increase the RC6p threshold.

How does the watt-hour result compare to before the patch? Thanks, Jesse On Mon, 25 Feb 2013 07:33:38 + "Zhang, Ouping" wrote: > running video workload, video avg watt = 38.4 and watt-hour = 6.9 > cat /sys/class/drm/card0/power/rc6_residency_ms > cat /sys/class/drm/card0/power/rc6p_residenc

Re: [Intel-gfx] [PATCH v2] drm/i915: Don't clobber crtc->fb when queue_flip fails

ville.syrj...@linux.intel.com writes: > From: Ville Syrjälä > > Restore crtc->fb to the old framebuffer if queue_flip fails. > > While at it, kill the pointless intel_fb temp variable. > > v2: Update crtc->fb before queue_flip and restore it back > after a failure. > > Cc: sta...@vger.kernel.

Re: [Intel-gfx] [PATCH 0/4] FIFO underrun reporting v2

On Fri, Feb 22, 2013 at 05:05:27PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > Hi > > Here's a new series that tries to report FIFO underruns. The new > implementation > is completely different from the old one, due to the reviews I received. Now > we > don't just "ignore" the FIFO und

Re: [Intel-gfx] [PATCH] drm/i915: Add to_user_ptr()

On Fri, Feb 22, 2013 at 12:16:58PM -0800, Andi Kleen wrote: > ville.syrj...@linux.intel.com writes: > > > From: Ville Syrjälä > > > > to_user_ptr() simply casts a pointer passed as u64 from user space > > to void __user * correctly. Using this lets us get rid of all the > > tiresome casts. > > T

Re: [Intel-gfx] [PATCH 3/3] [v2] drm/i915: Capture current context on error

On Sun, Feb 24, 2013 at 06:10:02PM -0800, Ben Widawsky wrote: > On error, this represents the state of the currently running context at > the time it was loaded. > > Unfortunately, since we're hung and can't switch out the context this > may not tell us too much about the most current state of the