Signed-off-by: Ben Widawsky
---
tools/quick_dump/quick_dump.py | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/tools/quick_dump/quick_dump.py b/tools/quick_dump/quick_dump.py
index 44aa2ba..5c88ef1 100755
--- a/tools/quick_dump/quick_dump.py
+++ b/tools/quick_dump/
Make a register access library with sample to do register reads
Signed-off-by: Ben Widawsky
---
tools/quick_dump/Makefile.am | 14 +-
tools/quick_dump/chipset.i | 16 ++--
tools/quick_dump/intel_chipset.c | 7 +++
tools/quick_dump/quick_dump.py | 5 ++---
This isn't strictly necessary it would have been easy enough to simply
convert intel_chipset.h but this should be nice prep work for directly
doing MMIO. It also serves as a nice review point.
It's demonstrated with an autodetect function in the script. That
autodetect has a hardcoded path that sh
As far as I can tell (and recommended to me by Matt) taking these m4
extension macros from http://www.gnu.org/software/autoconf-archive/
doesn't require the project distribute GPL. I am a bit confused from
reading the license. I'd really hope someone can comment.
The only other solution would be t
This patch includes a patch from Jesse which removed a bunch of VLV
registers which were useless in my original RFC.
Cc: Jesse Barnes
Signed-off-by: Ben Widawsky
---
tools/quick_dump/Makefile.am | 1 +
tools/quick_dump/valleyview | 6 +++
tools/quick_dump/vlv_display.txt | 84 +++
Signed-off-by: Ben Widawsky
---
tools/quick_dump/Makefile.am| 1 +
tools/quick_dump/gen7_other.txt | 1 +
tools/quick_dump/ivybridge | 1 +
3 files changed, 3 insertions(+)
create mode 100644 tools/quick_dump/gen7_other.txt
create mode 100644 tools/quick_dump/ivybridge
diff --git a/to
Signed-off-by: Ben Widawsky
---
tools/quick_dump/Makefile.am| 1 +
tools/quick_dump/gen6_other.txt | 1 +
tools/quick_dump/sandybridge| 1 +
3 files changed, 3 insertions(+)
create mode 100644 tools/quick_dump/gen6_other.txt
create mode 100644 tools/quick_dump/sandybridge
diff --git a/
This is the base tool for quick dump. At it's heart, quick dump is
simply a basic text parsing thingie which plugs into intel-gpu-tools to
do something similar to intel_reg_dumper.
The format for the register definition files is very open, so it's just
something simple for now.
Signed-off-by: Ben
Signed-off-by: Ben Widawsky
---
configure.ac | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configure.ac b/configure.ac
index b75a9d4..1c56fa4 100644
--- a/configure.ac
+++ b/configure.ac
@@ -135,3 +135,5 @@ AC_CONFIG_FILES([
debugger/system_routine/Makefile
Almost all based on vim's config file type. It got it wrong in a few
places which were fixed by hand.
Signed-off-by: Ben Widawsky
---
configure.ac | 94 +---
1 file changed, 46 insertions(+), 48 deletions(-)
diff --git a/configure.ac b/con
This is my second attempt at winning approval for the series. First one
was: https://patchwork.kernel.org/patch/1493131/
In spending the time to rework this tool, I've begun to lose my belief
in some of the original motivations I had. Even if you don't want to
review, but just like (or dislike) w
Date: Sat, 2 Feb 2013 20:33:36 +0100
Building the package under Debian Sid/unstable, `dh_shlibdeps` informs
that `libI810XvMC.so.1.0.0` does not need to be linked against
`libX11-xcb.so.1`, `libxcb-dri2.so.0`, `libxcb-util.so.0` or
`libxcb.so.1` [1].
$ debuild -b -us -uc
[…]
Date: Sat, 2 Feb 2013 11:44:54 +0100
Building the package under Debian Sid/unstable, `dh_shlibdeps` informs
that `libIntelXvMC.so.1.0.0` does not need to be linked against
`libXext.so.6` or `libXfixes.so.3` [1].
$ debuild -b -us -uc
[…]
make[1]: Entering directory
`/build
On Saturday, February 02, 2013 08:39:21 PM Rafael J. Wysocki wrote:
> On Saturday, February 02, 2013 04:34:08 PM Jesse Barnes wrote:
> > KMS drivers can potentially restore the display configuration without
> > userspace help. Such drivers can can call a new funciton,
> > pm_vt_switch_required(fal
On Saturday, February 02, 2013 04:34:08 PM Jesse Barnes wrote:
> KMS drivers can potentially restore the display configuration without
> userspace help. Such drivers can can call a new funciton,
> pm_vt_switch_required(false) if they support this feature. In that
> case, the PM layer won't VT swi
The IDs are off in the VLV doc sites, which are separate and internal
only atm.
Jesse
On Sat, 2 Feb 2013 15:30:59 -0200
Rodrigo Vivi wrote:
> I was going to review them, but I couldn't find vlv ids at bspec.
> where is the ids list?
>
> On Sat, Feb 2, 2013 at 10:56 AM, Jesse Barnes
> wrote:
I was going to review them, but I couldn't find vlv ids at bspec.
where is the ids list?
On Sat, Feb 2, 2013 at 10:56 AM, Jesse Barnes wrote:
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu/drm/i915/i915_drv.c |3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915
KMS drivers can potentially restore the display configuration without
userspace help. Such drivers can can call a new funciton,
pm_vt_switch_required(false) if they support this feature. In that
case, the PM layer won't VT switch to the suspend console at suspend
time and then back to the origina
Finally got around to updating these patches here at FOSDEM. I made the
core PM support for this into a function so multiple drivers can
indicate their support and we'll be conservative about doing the switch
if no drivers call in or if any driver indicates it can't support VT
switchless suspend/r
It uses the same bit definitions.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_gem_gtt.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index eac2cec..3900b98 100644
--- a/drivers/gpu/
With the PTE poking code pulled into i915, we need to make sure we don't
add the display offset to our TLB flush writes.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i
From: Vijay Purushothaman
Updated to reflect newer boards.
Signed-off-by: Vijay Purushothaman
---
drivers/gpu/drm/i915/intel_display.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
inde
From: Vijay Purushothaman
Pondicherry should take care in most cases.
Watermark update is causing driver crash with divide error. Look again.
For current usage, not needed.
Signed-off-by: Vijay Purushothaman
---
drivers/gpu/drm/i915/intel_pm.c |3 ++-
1 file changed, 2 insertions(+), 1 de
Slightly different than other platforms.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.h |2 ++
drivers/gpu/drm/i915/i915_reg.h | 22
drivers/gpu/drm/i915/intel_pm.c | 74 +++
3 files changed, 98 insertions(+)
diff --git a
We could split this out into a separate routine at some point as an
optimization.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.c |3 +++
drivers/gpu/drm/i915/i915_reg.h |3 +++
drivers/gpu/drm/i915/intel_pm.c |8 +++-
3 files changed, 13 insertions(+), 1 deletion
Need to do some extra work at PLL disable time to allow HDMI to come
back up on the next mode set.
v2: take dpio lock around update - jbarnes
only do WA on VLV -jbarnes
Signed-off-by: Jesse Barnes
Signed-off-by: Vijay Purushothaman
---
drivers/gpu/drm/i915/intel_display.c | 14 +++
The GOP should do this for us once at boot time, but on resume and to
defend against the various BIOS versions, we init once at load time and
also in the resume path.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-
Separate bits for HDMI and DP.
Signed-off-by: Shobhit Kumar
Signed-off-by: Vijay Purushothaman
---
drivers/gpu/drm/i915/intel_display.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_dis
Uses slightly different interfaces than other platforms.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_pm.c | 148 +--
1 file changed, 144 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm
Fix the correct hdmi limits for VLV A0
Signed-off-by: Vijay Purushothaman
---
drivers/gpu/drm/i915/intel_display.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 9f2f817..83d629d 10
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_lvds.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c
b/drivers/gpu/drm/i915/intel_lvds.c
index 8c61876..feef18c 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel
---
drivers/gpu/drm/i915/intel_dp.c |4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f4c8723..f346bab 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2399,6 +2399,10 @@ intel_dp
Disable a swath of clock gating bits pending further testing and
measurement.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_pm.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index
There's a separate bit in the Gunit to allow force wake control.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_gem.c |5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ad98db5..fa12248 100644
--- a/drive
From: Ben Widawsky
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_drv.c |7 +++
drivers/gpu/drm/i915/i915_reg.h |1 +
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b35b479..28d5992 10
The Gunit has a separate reg for this, so allocate some stolen space for
the power context and initialize the reg.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.h|2 ++
drivers/gpu/drm/i915/i915_gem_stolen.c | 41
drivers/gpu/drm/i91
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.c |4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 13b9b4f..b35b479 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@
With the new boards, we've been able to test a few more things. This
set is still a WIP, but I wanted to get it out for review. I also need
to do some additional testing when I get back from FOSDEM, but others
with VLV systems can try these out and let me know how it goes.
Thanks,
Jesse
___
We don't generally use MI_FLUSH these days, but this bit may affect
other flushing logic, so set it to be safe.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_ringbuffer.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu
Add a few regs needed for various clock gating init purposes and make
sure they don't fall into the display offset range on VLV.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/dr
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_irq.c |8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 6ba0573..f781ff0 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 51e9c76..69d0637 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@
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