[Intel-gfx] [PATCH] drm/i915: reset GPU after clearing CSunit clock gating on gen6

2012-11-28 Thread Jesse Barnes
Needed to make sure we can enter/exit RC6 properly. v2: move to modeset_init since reset in init_clock_gating is too early Cc: James Kukunas Cc: Arjan van de Ven Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c |7 +++ 1 file changed, 7 insertions(+) diff --git a/drive

[Intel-gfx] Updated GPU reset at init patch

2012-11-28 Thread Jesse Barnes
I wasn't able to reproduce the performance hit after reset you guys were seeing, but did see that the way I was doing reset may have been causing more general trouble (I got GPU hangs at init) which could explain what you were seeing. So please give this patch a try and see if it still allows you

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915: Kill i915_gem_execbuffer_wait_for_flips()

2012-11-28 Thread Daniel Vetter
On Tue, Nov 27, 2012 at 08:34:58PM +0200, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > As per Chris Wilson's suggestion make > i915_gem_execbuffer_wait_for_flips() go away. > > This was used to stall the GPU ring while there are pending > page flips involving the relevant BO. I

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Wait for pending flips in intel_pipe_set_base()

2012-11-28 Thread Daniel Vetter
On Tue, Nov 27, 2012 at 08:34:56PM +0200, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > intel_pipe_set_base() never actually waited for any pending page flips > on the CRTC. It looks like it tried to, by calling intel_finish_fb() on > the current front buffer. But the pending fli

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915: Don't allow ring tail to reach the same cacheline as head

2012-11-28 Thread Daniel Vetter
On Tue, Nov 27, 2012 at 08:34:55PM +0200, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > From BSpec: > "If the Ring Buffer Head Pointer and the Tail Pointer are on the same > cacheline, the Head Pointer must not be greater than the Tail > Pointer." > > The easiest way to enforce

Re: [Intel-gfx] [PATCH] drm/i915: Fix pte updates in ggtt clear range

2012-11-28 Thread Ben Widawsky
On Mon, 26 Nov 2012 21:52:54 -0800 Ben Widawsky wrote: > This bug was introduced by me: > commit e76e9aebcdbfebae8f4cd147e3c0f800d36e97f3 > Author: Ben Widawsky > Date: Sun Nov 4 09:21:27 2012 -0800 > > drm/i915: Stop using AGP layer for GEN6+ > > The existing code uses memset_io which f

Re: [Intel-gfx] 3.7-rc7 IVB forcewake resume timeouts...

2012-11-28 Thread Ben Widawsky
On Wed, 28 Nov 2012 11:13:14 +0800 Daniel J Blueman wrote: > Hi Daniel/Ben, > > On stock 3.7-rc7, when resuming my Ivy Bridge laptop from suspend, the > kernel logs: > > [drm:__gen6_gt_force_wake_mt_get] *ERROR* Timed out waiting for > forcewake to ack request. > [drm:__gen6_gt_wait_for_thread_

Re: [Intel-gfx] how to disable dpst on linux?

2012-11-28 Thread Jesse Barnes
On Fri, 23 Nov 2012 16:51:09 + (UTC) РоманМельник wrote: > > It could be CABC (Content Adaptive Backlight Control) which is a similar > > technology but is implemented fully in hardware, in the panel. How you > > can disable (and IF you can disable it) depends completely on the hardware. > >

[Intel-gfx] [PATCH] drm/i915: Set sync_seqno properly after seqno wrap

2012-11-28 Thread Mika Kuoppala
i915_gem_handle_seqno_wrap() will zero all sync_seqnos but as the wrap can happen inside ring->sync_to(), pre wrap seqno was carried over and overwrote the zeroed sync_seqno. When wrap is handled, all outstanding requests will be retired and objects moved to inactive queue, causing their last_read