Re: [Intel-gfx] [BUG] i915 RC6 lockup

On Tue, 16 Oct 2012 15:19:26 +0200 Jonas Jelten wrote: > Hi list! > > I think i've got a problem with the intel driver: > > Sometimes, I think especially after running graphics intense > applications, RC6 is disabled completely and heats up my Thinkpad > X220t to 90 degree celsius, while idling

[Intel-gfx] Lockup when switching displays using xrandr since kernel 3.5.x

Hi there, since upgrading from kernel 3.4.10 to 3.5.x or 3.6.2 (on Kubuntu 12.04) I am getting sporadic (but frequent) lockups when switching displays using xrandr: /usr/bin/xrandr -d :0.0 --output LVDS1 --off --output HDMI3 --mode 1600x1200 --primary --auto sleep 2 /usr/b

Re: [Intel-gfx] hsw rps values regress RPS on Macbook Air

On Tue, 16 Oct 2012 12:50:22 -0700 Eric Anholt wrote: > It's not snarky, I'm really wondering if you've actually seen middle > frequencies like this software is designed to do. I spend a lot of time > looking at performance, and whenever I look at RPS state, it's either at > highest or lowest, or

Re: [Intel-gfx] hsw rps values regress RPS on Macbook Air

On Tue, 16 Oct 2012 12:50:22 -0700 Eric Anholt wrote: > I'd like to replace "not working" with "high when busy, low when not", > while you're saying that we have to support a middle frequency like the > complicated software is trying to achieve. Well I think this is pretty simple; much simpler th

Re: [Intel-gfx] [PATCH] drm/i915: flush system agent TLBs on SNB so we can WC map the PTEs

On Tue, Oct 16, 2012 at 9:11 PM, Paulo Zanoni wrote: > 2012/10/11 Jesse Barnes : >> I've only lightly tested this so far, but the corruption seems to be >> gone if I write the GFX_FLSH_CNTL reg after binding an object. This >> register should control the TLB for the system agent, which is what CP

Re: [Intel-gfx] hsw rps values regress RPS on Macbook Air

Jesse Barnes writes: > On Fri, 12 Oct 2012 11:34:08 -0700 > Eric Anholt wrote: > >> Jesse Barnes writes: >> >> > On Tue, 09 Oct 2012 13:05:54 -0700 >> > Eric Anholt wrote: >> > >> >> On my new MBA with danvet's drm-intel-next-queued, I'm not getting >> >> working RPS. vblank_mode=0 glxgears

Re: [Intel-gfx] [PATCH] drm/i915: flush system agent TLBs on SNB so we can WC map the PTEs

2012/10/11 Jesse Barnes : > I've only lightly tested this so far, but the corruption seems to be > gone if I write the GFX_FLSH_CNTL reg after binding an object. This > register should control the TLB for the system agent, which is what CPU > mapped objects will go through. > > Signed-off-by: Jess

Re: [Intel-gfx] bad panel power sequencing delays, disabling panel

On Tue, Oct 16, 2012 at 6:10 PM, Daniel J Blueman wrote: > [drm:intel_dp_init], cur t1_t3 0 t8 0 t9 0 t10 0 t11_t12 4000 > [drm:intel_dp_init], vbt t1_t3 0 t8 0 t9 0 t10 0 t11_t12 0 > [drm:intel_dp_init], panel power up delay 21, power down delay 50, > power cycle delay 400 > [drm:intel_dp_init],

Re: [Intel-gfx] bad panel power sequencing delays, disabling panel

On 16 October 2012 23:16, Daniel Vetter wrote: > On Tue, Oct 16, 2012 at 5:15 PM, Daniel J Blueman wrote: >> On 16 October 2012 22:43, Daniel Vetter wrote: >>> On Tue, Oct 16, 2012 at 3:26 PM, Daniel J Blueman wrote: On my Macbook Retina 2012, after a recent firmware update, i915 fails >>>

Re: [Intel-gfx] hsw rps values regress RPS on Macbook Air

On Tue, 09 Oct 2012 13:05:54 -0700, Eric Anholt wrote: > On my new MBA with danvet's drm-intel-next-queued, I'm not getting > working RPS. vblank_mode=0 glxgears never ups the frequency, and > vblank_mode=0 openarena only makes it up to 500mhz. Reverting > 1ee9ae3244c4789f3184c5123f3b2d7e405b3f4

Re: [Intel-gfx] bad panel power sequencing delays, disabling panel

On Tue, Oct 16, 2012 at 5:15 PM, Daniel J Blueman wrote: > On 16 October 2012 22:43, Daniel Vetter wrote: >> On Tue, Oct 16, 2012 at 3:26 PM, Daniel J Blueman wrote: >>> On my Macbook Retina 2012, after a recent firmware update, i915 fails >>> to use the eDP-1 panel [1], which goes blank when sw

Re: [Intel-gfx] bad panel power sequencing delays, disabling panel

On 16 October 2012 22:43, Daniel Vetter wrote: > On Tue, Oct 16, 2012 at 3:26 PM, Daniel J Blueman wrote: >> On my Macbook Retina 2012, after a recent firmware update, i915 fails >> to use the eDP-1 panel [1], which goes blank when switched to. Nouveau >> works correctly though [2]. I see this be

[Intel-gfx] bad panel power sequencing delays, disabling panel

On my Macbook Retina 2012, after a recent firmware update, i915 fails to use the eDP-1 panel [1], which goes blank when switched to. Nouveau works correctly though [2]. I see this behaviour on 3.6-rc to 3.7-rc1. Full boot and IGD switch (see end) kernel logs at http://quora.org/2012/mbp-i915-panel

Re: [Intel-gfx] [PATCH 08/22] flip_test: move output panning inside the flip_handler

On Tue, Oct 16, 2012 at 05:34:42PM +0300, Imre Deak wrote: > Move the panning to a more logical place where the rest of the test > steps are performed. This won't change things in practice, since the > first thing drmHandleEvent does is call the flip_handler. > > Signed-off-by: Imre Deak Looking

Re: [Intel-gfx] hsw rps values regress RPS on Macbook Air

On Tue, 16 Oct 2012 16:38:02 +0200 Daniel Vetter wrote: > On Tue, Oct 16, 2012 at 3:53 PM, Jesse Barnes > wrote: > > Any thoughts? Would collecting the above info in Mesa be pretty easy? > > I think we already collect FPS info if certain debug flags are set, and > > frame time seems like a pre

Re: [Intel-gfx] bad panel power sequencing delays, disabling panel

On Tue, Oct 16, 2012 at 3:26 PM, Daniel J Blueman wrote: > On my Macbook Retina 2012, after a recent firmware update, i915 fails > to use the eDP-1 panel [1], which goes blank when switched to. Nouveau > works correctly though [2]. I see this behaviour on 3.6-rc to 3.7-rc1. I'm working on this, s

Re: [Intel-gfx] hsw rps values regress RPS on Macbook Air

On Tue, Oct 16, 2012 at 3:53 PM, Jesse Barnes wrote: > Any thoughts? Would collecting the above info in Mesa be pretty easy? > I think we already collect FPS info if certain debug flags are set, and > frame time seems like a pretty trivial calculation based on some > timestamping in a couple of p

[Intel-gfx] [PATCH 22/22] flip_test: add wait-for-vblank tests

Signed-off-by: Imre Deak --- tests/flip_test.c | 130 +++-- 1 file changed, 126 insertions(+), 4 deletions(-) diff --git a/tests/flip_test.c b/tests/flip_test.c index 2b70f2a..7c3d0f2 100644 --- a/tests/flip_test.c +++ b/tests/flip_test.c @@ -49,8

[Intel-gfx] [PATCH 21/22] flip_test: add check to see if any event has occured

At the moment select() would time out in case we don't get any event. When we add vblank events in a later patch, it's possible that we receive one type of events but not the other type. In this case select() doesn't time out and we need another way to detect this. Signed-off-by: Imre Deak --- t

[Intel-gfx] [PATCH 20/22] flip_test: add event sequence number tracking

Signed-off-by: Imre Deak --- tests/flip_test.c | 29 +++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/tests/flip_test.c b/tests/flip_test.c index 9772599..82ab347 100644 --- a/tests/flip_test.c +++ b/tests/flip_test.c @@ -75,6 +75,7 @@ struct event_st

[Intel-gfx] [PATCH 19/22] flip_test: add logic to track pending events

When we add the vblank tests later, it can happen that one type of event is pending while we are servicing another. Prepare for that by maintaining a pending/completed event mask. No functional change. Signed-off-by: Imre Deak --- tests/flip_test.c | 68 +++

[Intel-gfx] [PATCH 18/22] flip_test: make page flip tests conditional

Since later we want to add vblank tests where we don't want to flip, make the flips and corresponding state checks conditional. No functional change. Signed-off-by: Imre Deak --- tests/flip_test.c | 33 - 1 file changed, 20 insertions(+), 13 deletions(-) diff

[Intel-gfx] [PATCH 17/22] flip_test: unify the name of the current test in status messages

Signed-off-by: Imre Deak --- tests/flip_test.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/tests/flip_test.c b/tests/flip_test.c index 85fa0f2..a0c1e5d 100644 --- a/tests/flip_test.c +++ b/tests/flip_test.c @@ -84,6 +84,7 @@ struct event_state { }; str

[Intel-gfx] [PATCH 16/22] flip_test: store crtc_idx in the test context obj

For DRM_IOCTL_WAIT_VBLANK we'll have to pass the crtc_idx - as opposed to the crtc id required by the rest of the IOCTLs we use. No functional change. Signed-off-by: Imre Deak --- tests/flip_test.c |8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/tests/flip_test.c

[Intel-gfx] [PATCH 15/22] flip_test: don't skip checks for sequence #1

So far we skipped some tests for seq#0 and #1, since at that point we were missing the 'last' state against which we could compare the current state. Since in the previous patches we fixed the ordering in the test loop and moved the increment of count to the update state phase, we have a proper 'la

[Intel-gfx] [PATCH 14/22] flip_test: factor out the event state

Factor out the status vars that are specific to the flip events into a separate structure. This will allow us tracking the vblank events with the same code. We move the increment of the flip event counter to the end of the test loop, but this shouldn't affect anything. This is the only functional

[Intel-gfx] [PATCH 13/22] flip_test: swap the order of check state/run test step

At the moment we first check the state then run the test step in our test loop. Swapping the order makes the starting state of each iteration better defined, allowing an easier extension of these steps in the future. Since now it's guaranteed that we exit the event loop with no pending flips, we c

[Intel-gfx] [PATCH 12/22] flip_test: split the flip handler into logical parts

The handler consits of handle_event/run_test/check_state/update_state logical steps, split the function accordingly. This is needed by the following patches that need to do part of these steps for both flip and vblank events. No functional change. Signed-off-by: Imre Deak --- tests/flip_test.c

[Intel-gfx] [PATCH 11/22] flip_test: store current flip/received timestamps in the context obj

This is needed by the next patch that splits the flip handler function into logical parts. Make the timestamps accesible to these parts. No functional change. Signed-off-by: Imre Deak --- tests/flip_test.c | 22 -- 1 file changed, 12 insertions(+), 10 deletions(-) diff --

[Intel-gfx] [PATCH 10/22] flip_test: factor out the final state check

Needed by an upcoming patch where we want to make a final state check for both the flip and vblank events. No functional change. Signed-off-by: Imre Deak --- tests/flip_test.c | 29 + 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/tests/flip_test.c

[Intel-gfx] [PATCH 09/22] flip_test: factor out the event loop/wait for event logic

Needed by an upcoming patch where we want to wait for an event without starting a new round of test run. No functional change. Signed-off-by: Imre Deak --- tests/flip_test.c | 126 + 1 file changed, 70 insertions(+), 56 deletions(-) diff --g

[Intel-gfx] [PATCH 08/22] flip_test: move output panning inside the flip_handler

Move the panning to a more logical place where the rest of the test steps are performed. This won't change things in practice, since the first thing drmHandleEvent does is call the flip_handler. Signed-off-by: Imre Deak --- tests/flip_test.c | 29 ++--- 1 file changed,

[Intel-gfx] [PATCH 07/22] flip_test: factor out drmModePageFlip

For better readability and to prepare for the upcoming patch marking pending flip events with a flag. No functional change. Signed-off-by: Imre Deak --- tests/flip_test.c | 21 +++-- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/tests/flip_test.c b/tests/flip

[Intel-gfx] [PATCH 05/22] test_flip: fix checking for delayed event reception

The intent for the time limit seems to be 2ms, but the current condition will result in a 1s limit and makes the check against tv_usec redundant. Fix the condition to check for a 2ms limit. Signed-off-by: Imre Deak --- tests/flip_test.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) d

[Intel-gfx] [PATCH 06/22] flip_test: store fb width, height in test context object

We will need these in event handlers, so store them where the handlers have access to them. No functional change. Signed-off-by: Imre Deak --- tests/flip_test.c | 23 --- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/tests/flip_test.c b/tests/flip_test.c

[Intel-gfx] [PATCH 04/22] flip_test: check drmHandleEvents()' return value

Signed-off-by: Imre Deak --- tests/flip_test.c |6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/flip_test.c b/tests/flip_test.c index b338448..5e39db6 100644 --- a/tests/flip_test.c +++ b/tests/flip_test.c @@ -494,12 +494,14 @@ static void flip_mode(struct test_o

[Intel-gfx] [PATCH 03/22] flip_test: reset the state for each test run

Each test run needs a clean state. Signed-off-by: Imre Deak --- tests/flip_test.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/tests/flip_test.c b/tests/flip_test.c index d018c50..b338448 100644 --- a/tests/flip_test.c +++ b/tests/flip_test.c @@ -546,11 +546,1

[Intel-gfx] [PATCH 02/22] flip_test: free FBs after each test run

Though the FBs will be freed implicitly at process exit, with the growing number of test cases it's probably better not to let them accumulate and free them as soon as we can. Signed-off-by: Imre Deak --- tests/flip_test.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/flip_test

[Intel-gfx] [PATCH 01/22] drmtest: add function to remove an DRM FB

Signed-off-by: Imre Deak --- lib/drmtest.c |5 + lib/drmtest.h |1 + 2 files changed, 6 insertions(+) diff --git a/lib/drmtest.c b/lib/drmtest.c index 125bfe9..c309851 100644 --- a/lib/drmtest.c +++ b/lib/drmtest.c @@ -829,6 +829,11 @@ unsigned int kmstest_create_fb(int fd, int width

[Intel-gfx] [PATCH 00/22] i-g-t: flip_test: add vblank test cases

Some refactoring, fixes and a few test cases for the DRM_IOCTL_WAIT_VBLANK IOCTL. Tested on IVB using the drm-intel-nightly kernel branch. Imre Deak (22): drmtest: add function to remove an DRM FB flip_test: free FBs after each test run flip_test: reset the state for each test run flip_te

Re: [Intel-gfx] [PATCH] drm/i915: Set DERRMR around batches required vblank events

On Tue, Oct 16, 2012 at 11:47 AM, Chris Wilson wrote: > > I am still not convinced this fixes anything as at the moment I am > simply unable to detect any tearing on my ivb setup if I apply any form of > vblank throttling. > > The other issue is that I think if I had a SECURE > (DRM_MASTER|DRM_ROO

Re: [Intel-gfx] hsw rps values regress RPS on Macbook Air

On Fri, 12 Oct 2012 11:34:08 -0700 Eric Anholt wrote: > Jesse Barnes writes: > > > On Tue, 09 Oct 2012 13:05:54 -0700 > > Eric Anholt wrote: > > > >> On my new MBA with danvet's drm-intel-next-queued, I'm not getting > >> working RPS. vblank_mode=0 glxgears never ups the frequency, and > >> v

[Intel-gfx] [BUG] i915 RC6 lockup

Hi list! I think i've got a problem with the intel driver: Sometimes, I think especially after running graphics intense applications, RC6 is disabled completely and heats up my Thinkpad X220t to 90 degree celsius, while idling. At first I thought that this is a CPU frequency scaling issue, as th

Re: [Intel-gfx] [PATCH 07/14] drm/i915: use TU_SIZE macro at intel_dp_set_m_n

On Mon, 15 Oct 2012, Paulo Zanoni wrote: > From: Paulo Zanoni > > Much simpler and looks more like the M/N code inside intel_display.c. Reviewed-by: Jani Nikula > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_dp.c | 7 ++- > 1 file changed, 2 insertions(+), 5 deletions

Re: [Intel-gfx] [PATCH 06/14] drm/i915: add basic Haswell DP link train bits

On Mon, 15 Oct 2012, Paulo Zanoni wrote: > From: Paulo Zanoni > > Previously, the DP register was used for everything. On Haswell, it > was split into DDI_BUF_CTL (which is the new intel_dp->DP register) > and DP_TP_CTL. > > The logic behind this patch is based on a patch written by Shobhit > Kum

Re: [Intel-gfx] [PATCH 04/14] drm/i915: add DP support to intel_ddi_disable_port

On Mon, 15 Oct 2012, Paulo Zanoni wrote: > From: Paulo Zanoni > > Just a missing register. There is no problem to run this code when the > output is HDMI. Reviewed-by: Jani Nikula > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_ddi.c | 11 ++- > 1 file changed, 10

Re: [Intel-gfx] [PATCH 01/14] drm/i915: add DP support to intel_ddi_enable_pipe_func

On Mon, 15 Oct 2012, Paulo Zanoni wrote: > From: Paulo Zanoni Reviewed-by: Jani Nikula > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_ddi.c | 34 ++ > drivers/gpu/drm/i915/intel_dp.c | 5 - > drivers/gpu/drm/i915/intel_drv.h | 5

[Intel-gfx] [PATCH] drm/i915: Set DERRMR around batches required vblank events

In order for the Display Engine to send messages to the Render Engine, that event must be unmasked in the Display Engine Render Response Mask Register (DERRMR). By default all events are masked to prevent unwanted messages to conserve power, and it is strongly recommended that only single events be

Re: [Intel-gfx] [PATCH 02/14] drm/i915: add intel_ddi_set_pipe_settings

On Mon, 15 Oct 2012, Paulo Zanoni wrote: > From: Paulo Zanoni > > In theory, all the DDI pipe settings should be set here, including > timing and M/N registers. For now, let's just set the DP MSA > attributes. > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/i915_reg.h | 10 +++

Re: [Intel-gfx] IVB-eDP regression with on latest git

On Mon, Oct 15, 2012 at 09:07:33PM +0200, Oleksij Rempel wrote: > I'll repost it, looks like last message got lost. > > Am 14.10.2012 14:49, schrieb Oleksij Rempel: > >Am 14.10.2012 10:55, schrieb Daniel Vetter: > >>On Sun, Oct 14, 2012 at 9:18 AM, Oleksij Rempel > >> wrote: > >>>With latest kerne

Re: [Intel-gfx] [PATCH] DRM/i915: Restore sdvo_flags after dtd->mode->dtd Roundrtrip.

On Sat, Oct 13, 2012 at 02:29:31PM +0200, Egbert Eich wrote: > For TV and LVDS encoders intel_sdvo_set_input_timings_for_mode() > is called to pass a mode to the sdvo chip and retrieve a dtd > containing information needed to calculate the adjusted_mode which > is done by intel_sdvo_get_dtd_from_mo

Re: [Intel-gfx] [PATCH] DRM/i915: Don't clone SDVO LVDS with analog.

On Sat, Oct 13, 2012 at 02:30:15PM +0200, Egbert Eich wrote: > SDVO LVDS are not clonable as the input mode gets adjusted by > the LVDS encoder. > > Signed-off-by: Egbert Eich Imo cloning should simply die outright. Patch applied, thanks. -Daniel -- Daniel Vetter Software Engineer, Intel Corpor

Re: [Intel-gfx] [PATCH] DRM/i915: Add QUIRK_INVERT_BRIGHTNESS for NCR machines.

On Sun, Oct 14, 2012 at 03:46:38PM +0200, Egbert Eich wrote: > NCR machines with LVDS panels using Intel chipsets need to have the > QUIRK_INVERT_BRIGHTNESS bit set. > Unfortunately NCR doesn't set a meaningful subvendor/subdevice ID, > therefore we add a DMI dependent quirk list. > > Signed-off-b

Re: [Intel-gfx] [PATCH] DRM/i915: Don't delete DPLL Multiplier during DAC init.

On Sun, Oct 14, 2012 at 04:33:11PM +0200, Egbert Eich wrote: > The DPLL multipiler is set up in intel_display.c:i9xx_update_pll() > called from i9xx_crtc_mode_set(). > There the DPLL multiplier is adjusted so that the SDVO gets a sufficient > bus clock. > When cloning a CRTC between an SDVO driven

Re: [Intel-gfx] [PATCH 3/4] drm/i915: ILK also needs that last fix

On Mon, Oct 15, 2012 at 08:21:41PM -0700, Ben Widawsky wrote: > On Mon, 15 Oct 2012 20:59:22 +0200 > Daniel Vetter wrote: > > > On Wed, Oct 03, 2012 at 07:34:23PM -0700, Ben Widawsky wrote: > > > That fix was the disable render deptch cache pipeline flush > > > > > > Signed-off-by: Ben Widawsky