[Intel-gfx] [QA 09/26] Testing report for `drm-intel-testing` (was: Updated -testing)

2012-09-25 Thread Sun, Yi
Summary We finished a new round of kernel testing. Generally, in this circle, 5 bugs are closed, 17 bugs are still open. Especially, 4 new filed bugs, and 2 re-opened bugs. Test Environment Kernel: (drm-intel-testing)7ce7b92e4aec3af4fbc56ff6e87a8b55d2362ec1 Some additional commit info: Mer

Re: [Intel-gfx] [PATCH] drm/i915: make sure we write all the DIP data bytes

2012-09-25 Thread Daniel Vetter
On Tue, Sep 25, 2012 at 02:06:30PM -0300, Rodrigo Vivi wrote: > Reviewed-by: Rodrigo Vivi > > On Tue, Sep 25, 2012 at 1:23 PM, Paulo Zanoni wrote: > > From: Paulo Zanoni > > > > ... even if the actual infoframe is smaller than the maximum possible > > size. > > > > If we don't write all the 32

Re: [Intel-gfx] [PATCH] drm/i915: Mark hardware context support optional

2012-09-25 Thread Daniel Vetter
On Tue, Sep 25, 2012 at 10:46 PM, Chris Wilson wrote: > rc6=0 hw_contexts=0 -> works > rc6=0 hw_contexts=1 -> works > rc6=1 hw_contexts=0 -> works (current default up to 3.6) > rc6=1 hw_contexts=1 -> hard hang with gl (new default in 3.6) I think we need that workaround ... Ben, can you hack up w

[Intel-gfx] Two GMA 950 issues

2012-09-25 Thread Alan W. Irwin
I have recently upgraded my Asus Eee b202 box (with 945GM chipset and GMA 950 graphics core) from Debian stable to Debian testing. Before I was just using this rather underpowered box as a thin client (using the X -query method to access a remote box xdm to help log in to that remote box to actua

Re: [Intel-gfx] [PATCH] drm/i915: Mark hardware context support optional

2012-09-25 Thread Chris Wilson
On Tue, 25 Sep 2012 13:35:31 -0700, Ben Widawsky wrote: > On Tue, 25 Sep 2012 20:41:45 +0100 > Chris Wilson wrote: > > > On Tue, 25 Sep 2012 12:04:14 -0700, Ben Widawsky > > wrote: > > > On Tue, 25 Sep 2012 14:53:37 +0100 > > > Chris Wilson wrote: > > > > > > > "Enable hardware context suppor

Re: [Intel-gfx] assertion on intel_disable_transcoder

2012-09-25 Thread Ben Guthro
I am seeing this same trace (and no video) on multiple Haswell SDP's, with 3.6-rc7 (and earlier kernels) Was there ever a resolution on this? On Wed, Aug 15, 2012 at 3:24 AM, Wang, Xingchao wrote: > Hi, > > Some update related to this warning. > Ironlake_crtc_dpms() will enable/disable crtc wh

Re: [Intel-gfx] [PATCH] drm/i915: Mark hardware context support optional

2012-09-25 Thread Ben Widawsky
On Tue, 25 Sep 2012 20:41:45 +0100 Chris Wilson wrote: > On Tue, 25 Sep 2012 12:04:14 -0700, Ben Widawsky > wrote: > > On Tue, 25 Sep 2012 14:53:37 +0100 > > Chris Wilson wrote: > > > > > "Enable hardware context support for userspace (default: > > > disabled))"); > > > > You've found one pla

Re: [Intel-gfx] [PATCH] drm/i915: Mark hardware context support optional

2012-09-25 Thread Chris Wilson
On Tue, 25 Sep 2012 12:04:14 -0700, Ben Widawsky wrote: > On Tue, 25 Sep 2012 14:53:37 +0100 > Chris Wilson wrote: > > > "Enable hardware context support for userspace (default: disabled))"); > > You've found one platform this doesn't work on, and a bunch of features > rely on this, and yet we

Re: [Intel-gfx] [PATCH] drm/i915: Mark hardware context support optional

2012-09-25 Thread Ben Widawsky
On Tue, 25 Sep 2012 14:53:37 +0100 Chris Wilson wrote: > "Enable hardware context support for userspace (default: disabled))"); You've found one platform this doesn't work on, and a bunch of features rely on this, and yet we default to disabled? That seems a bit harsh to me. -- Ben Widawsky, I

Re: [Intel-gfx] [PATCH] drm/i915: make sure we write all the DIP data bytes

2012-09-25 Thread Rodrigo Vivi
Reviewed-by: Rodrigo Vivi On Tue, Sep 25, 2012 at 1:23 PM, Paulo Zanoni wrote: > From: Paulo Zanoni > > ... even if the actual infoframe is smaller than the maximum possible > size. > > If we don't write all the 32 DIP data bytes the InfoFrame ECC may not > be correctly calculated in some cases

Re: [Intel-gfx] [PATCH 1/2] drm/i915: s/cacheing/caching/

2012-09-25 Thread Ben Widawsky
On Tue, 25 Sep 2012 10:43:55 +0100 Chris Wilson wrote: > On Tue, 25 Sep 2012 10:32:17 +0200, Daniel Vetter wrote: > > On Sat, Sep 22, 2012 at 2:01 AM, Ben Widawsky wrote: > > > From: Ben Widawsky > > > > > > Signed-off-by: Ben Widawsky > > > > IIrc we're already including this header in ship

[Intel-gfx] [PATCH] drm/i915: make sure we write all the DIP data bytes

2012-09-25 Thread Paulo Zanoni
From: Paulo Zanoni ... even if the actual infoframe is smaller than the maximum possible size. If we don't write all the 32 DIP data bytes the InfoFrame ECC may not be correctly calculated in some cases (e.g., when changing the port), and this will lead to black screens on HDMI monitors. The ECC

Re: [Intel-gfx] [PATCH] drm/i915: Mark hardware context support optional

2012-09-25 Thread Rodrigo Vivi
Reviewed-by: Rodrigo Vivi On Tue, Sep 25, 2012 at 10:53 AM, Chris Wilson wrote: > As using the contexts (with mesa) causes an instant hard hang on my > i5-2500 SandyBridge GT1 desktop, they are not ready for universal > enabling. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i91

[Intel-gfx] Chart looks absolutely amazing!

2012-09-25 Thread Matty Russo
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[Intel-gfx] [PATCH] drm/i915: Mark hardware context support optional

2012-09-25 Thread Chris Wilson
As using the contexts (with mesa) causes an instant hard hang on my i5-2500 SandyBridge GT1 desktop, they are not ready for universal enabling. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.c |5 + drivers/gpu/drm/i915/i915_drv.h |1 + drivers/gpu/drm/

Re: [Intel-gfx] [PATCH] drm/i915: Wrap external callers to IPS state with appropriate locks

2012-09-25 Thread Chris Wilson
On Tue, 25 Sep 2012 14:25:09 +0100, Chris Wilson wrote: > Finishes commit 02d719562ef40483648b2cc46899d4a2ff5953bb > Author: Daniel Vetter > Date: Thu Aug 9 16:44:54 2012 +0200 > > drm/i915: properly guard ilk ips state > > The core functions were annotated with their locking requirement

[Intel-gfx] [PATCH] drm/i915: Wrap external callers to IPS state with appropriate locks

2012-09-25 Thread Chris Wilson
Finishes commit 02d719562ef40483648b2cc46899d4a2ff5953bb Author: Daniel Vetter Date: Thu Aug 9 16:44:54 2012 +0200 drm/i915: properly guard ilk ips state The core functions were annotated with their locking requirements, but we overlooked that they were exported, without any control over t

Re: [Intel-gfx] [PATCH 3/9] drm/i915: add a HSW scratch location for flush commands

2012-09-25 Thread Jesse Barnes
On Tue, 25 Sep 2012 13:47:54 +0200 Daniel Vetter wrote: > On Tue, Sep 25, 2012 at 1:08 PM, Jesse Barnes > wrote: > > On Tue, 25 Sep 2012 10:54:00 +0200 > > Daniel Vetter wrote: > > > >> On Wed, Sep 19, 2012 at 01:28:57PM -0700, Jesse Barnes wrote: > >> > Some commands and workarounds require s

Re: [Intel-gfx] [PATCH 3/9] drm/i915: add a HSW scratch location for flush commands

2012-09-25 Thread Daniel Vetter
On Tue, Sep 25, 2012 at 1:08 PM, Jesse Barnes wrote: > On Tue, 25 Sep 2012 10:54:00 +0200 > Daniel Vetter wrote: > >> On Wed, Sep 19, 2012 at 01:28:57PM -0700, Jesse Barnes wrote: >> > Some commands and workarounds require stores to occur to function >> > correctly, so add some scratch space to t

Re: [Intel-gfx] [PATCH 3/9] drm/i915: add a HSW scratch location for flush commands

2012-09-25 Thread Jesse Barnes
On Tue, 25 Sep 2012 10:54:00 +0200 Daniel Vetter wrote: > On Wed, Sep 19, 2012 at 01:28:57PM -0700, Jesse Barnes wrote: > > Some commands and workarounds require stores to occur to function > > correctly, so add some scratch space to the HWS page to accommodate > > them. > > > > Signed-off-by: J

Re: [Intel-gfx] [PATCH 4/9] drm/i915: add post-flush store dw workaround

2012-09-25 Thread Jesse Barnes
On Tue, 25 Sep 2012 10:49:28 +0200 Daniel Vetter wrote: > On Wed, Sep 19, 2012 at 01:28:58PM -0700, Jesse Barnes wrote: > > Several platforms need this to flush the CS write buffers. > > Chris spent quite some effort to dump less crap into the rings on gen6, > and your description here sounds li

Re: [Intel-gfx] [PATCH 1/2] drm/i915: s/cacheing/caching/

2012-09-25 Thread Chris Wilson
On Tue, 25 Sep 2012 10:32:17 +0200, Daniel Vetter wrote: > On Sat, Sep 22, 2012 at 2:01 AM, Ben Widawsky wrote: > > From: Ben Widawsky > > > > Signed-off-by: Ben Widawsky > > IIrc we're already including this header in shipping libdrm, and we > have already users for it ... Have you checked wh

[Intel-gfx] Pratique : les cocottes Fontignac passent au lave-vaisselle

2012-09-25 Thread Guide achats malins
Title: Pratique : les cocottes Fontignac passent au lave-vaisselle Problème d’affichage ? Consultez cette page dans votre navigateur. Cocotte Fontigna

[Intel-gfx] [PATCH] drm/i915: Wrap external callers to IPS state with appropriate locks

2012-09-25 Thread Chris Wilson
Finishes commit 02d719562ef40483648b2cc46899d4a2ff5953bb Author: Daniel Vetter Date: Thu Aug 9 16:44:54 2012 +0200 drm/i915: properly guard ilk ips state The core functions were annotated with their locking requirements, but we overlooked that they were exported, without any control over t

[Intel-gfx] [PATCH] Add option -o , which can test only one specified mode.

2012-09-25 Thread Yi Sun
Each mode line has a number just like '[i]'. So we can only test the specified mode with giving the number of mode to '-o' parameter. Signed-off-by: Yi Sun diff --git a/tests/testdisplay.c b/tests/testdisplay.c index c52bb2f..39c4265 100644 --- a/tests/testdisplay.c +++ b/tests/testdisplay.c @@

Re: [Intel-gfx] [PATCH 3/9] drm/i915: add a HSW scratch location for flush commands

2012-09-25 Thread Daniel Vetter
On Wed, Sep 19, 2012 at 01:28:57PM -0700, Jesse Barnes wrote: > Some commands and workarounds require stores to occur to function > correctly, so add some scratch space to the HWS page to accommodate > them. > > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/intel_ringbuffer.h |1 +

Re: [Intel-gfx] [PATCH 6/9] drm/i915: implement WaDisablePSDDualDispatchEnable on IVB and VLV

2012-09-25 Thread Daniel Vetter
On Wed, Sep 19, 2012 at 01:29:00PM -0700, Jesse Barnes wrote: > Workaround for dual port PS dispatch on GT1. > > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/i915_reg.h |4 > drivers/gpu/drm/i915/intel_pm.c | 16 > 2 files changed, 20 insertions(+) > > di

Re: [Intel-gfx] [PATCH 4/9] drm/i915: add post-flush store dw workaround

2012-09-25 Thread Daniel Vetter
On Wed, Sep 19, 2012 at 01:28:58PM -0700, Jesse Barnes wrote: > Several platforms need this to flush the CS write buffers. Chris spent quite some effort to dump less crap into the rings on gen6, and your description here sounds like we only need this when flushing write caches. Or it might only ap

Re: [Intel-gfx] [PATCH 4/5] drm/i915: remove unused variables from ironlake_crtc_mode_set

2012-09-25 Thread Daniel Vetter
On Mon, Sep 24, 2012 at 08:36:27PM -0300, Rodrigo Vivi wrote: > Feel free to use > Reviewed-by: Rodrigo Vivi Merged up to this patch to dinq, thanks for the review&patches. -Daniel > > On Thu, Sep 20, 2012 at 6:36 PM, Paulo Zanoni wrote: > > From: Paulo Zanoni > > > > The last patches moved a

Re: [Intel-gfx] [PATCH 1/2] drm/i915: BUG() on unexpected HDMI register

2012-09-25 Thread Daniel Vetter
On Mon, Sep 24, 2012 at 07:12:16PM -0300, Rodrigo Vivi wrote: > This was easy for me, feel free to use: > > Reviewed-by: Rodrigo Vivi Already merged to dinq before I've seen your r-b, thanks anyway for the review (and the patch obviously too). I've bikeshedded the actual fix a bit on irc (needs

Re: [Intel-gfx] [PATCH 1/2] drm/i915: s/cacheing/caching/

2012-09-25 Thread Daniel Vetter
On Sat, Sep 22, 2012 at 2:01 AM, Ben Widawsky wrote: > From: Ben Widawsky > > Signed-off-by: Ben Widawsky IIrc we're already including this header in shipping libdrm, and we have already users for it ... Have you checked whether this doesn't break anything once copied over to libdrm? Maybe we j