[Intel-gfx] [PATCH 2/2] drm/i915: Some HSW PTE fixes

Haswell doesn't set GFDT or L3 in the PTE anymore. Also there was an improper mask as the address extension of HSW PTEs decreased from 8 extra bits to 7. Signed-off-by: Ben Widawsky --- drivers/char/agp/intel-gtt.c| 14 +++--- drivers/gpu/drm/i915/i915_gem_gtt.c | 5 - 2 fil

[Intel-gfx] [PATCH 1/2] drm/i915: s/cacheing/caching/

From: Ben Widawsky Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_dma.c | 4 ++-- drivers/gpu/drm/i915/i915_drv.h | 8 drivers/gpu/drm/i915/i915_gem.c | 20 ++-- include/drm/i915_drm.h | 20 ++-- 4 files changed, 26 insertions(+), 2

[Intel-gfx] [RFC] [PATCH] quick_dump: A dump utility different than reg_dumper

intel_reg_dumper is cool. However, doing bit decoding and dealing with moving registers from generation to generation (and in some cases just steppings) becomes a bit of a burden over time. It's also not completely necessary when doing the not-so-uncommon diff against some other BIOS debug. While