On Wed, 8 Aug 2012 22:01:51 +0200, Daniel Vetter
wrote:
> Handy for lazy people like me, or when people forget to add the output
> of lspci -nn.
>
> v2: Chris Wilson noticed that we have this duplicated already in the
> i915_capabilites debugfs file. But there \n as separator looks better,
> wh
I have the faint hope that the total absence of any locking for the
rps code wasn't too good an idea and could very well have caused some
rc6 related regressions.
Unfortunately we've never managed to reproduce these issues on any of
our own machines, so the only way to go about this is to enable i
Like with the equivalent change for gen6+ rps state, this helps in
clarifying the code (and in fixing a few places that have fallen through
the cracks in the locking review).
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_drv.h | 36
drivers/gpu/drm/i915/i915_irq.c
We change the drps/ips sw/hw state from different callers: Our own irq
handler, the external intel-ips module and from process context. Most
of these callers don't take any lock at all.
Protect everything by making the mchdev_lock irqsave and grabbing it in
all relevant callsites. Note that we hav
Like all the other drps/ips stuff. Hence add the corresponding check,
give the function a preciser prefix and move the single reg clearing into
the rps handling function, too.
Reviewed-by: Ben Widawsky
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_irq.c | 10 +-
1 file ch
It's only ever a pointer to the global mchdev_lock, and we don't use
it at all.
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_drv.h |1 -
drivers/gpu/drm/i915/intel_pm.c |1 -
2 files changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i91
This way it's easier so see what belongs together, and what is used
by the ilk ips code. Also add some comments that explain the locking.
Note that (cur|min|max)_delay need to be duplicated, because
they're also used by the ips code.
v2: Missed one place that the dev_priv->ips change caught ...
- Take the dev->struct_mutex around access the corresponding state
(and adjusting the rps hw state).
- Add an assert to gen6_set_rps to ensure we don't forget about this
in the future.
- Don't set up the min/max_freq files if it doesn't apply to the hw.
And do the same for the gen6+ cache sha
The update_gfx_val function called from mark_busy wasn't taking the
mchdev_lock, as it should have. Also sprinkle a few spinlock asserts
over the code to document things better.
Things are still rather confusing, especially since a few variables
in dev_priv are used by both the gen6+ rps code and
Hi all,
Essentially just rebase, with Ben's review comments taking into account and one
WARN_ON(mutex_is_locked) moved around a bit.
Review&testing highly welcome.
Cheers, Daniel
Daniel Vetter (8):
drm/i915: properly guard ilk ips state
drm/i915: fixup up debugfs rps state handling
drm/i9
On Wed, Aug 08, 2012 at 09:12:21PM +0100, Chris Wilson wrote:
> On Wed, 8 Aug 2012 17:42:52 +0200, Daniel Vetter
> wrote:
> > In commit
> >
> > commit 20b46e59dd102665ce7168baa215e5b1ee66b69b
> > Author: Daniel Vetter
> > Date: Thu Jul 26 11:16:14 2012 +0200
> >
> > drm/i915: Only set t
On Wed, 8 Aug 2012 17:42:52 +0200, Daniel Vetter
wrote:
> In commit
>
> commit 20b46e59dd102665ce7168baa215e5b1ee66b69b
> Author: Daniel Vetter
> Date: Thu Jul 26 11:16:14 2012 +0200
>
> drm/i915: Only set the down rps limit when at the loweset frequency
>
> The computation for the new
On Wed, Aug 08, 2012 at 10:35:53PM +1000, Francois Rigaut wrote:
> Daniel,
>
> On 08/08/12 02:19, Daniel Vetter wrote:
> >On Wed, Aug 08, 2012 at 12:17:50AM +1000, Francois Rigaut wrote:
> >>Daniel,
> >>
> >>ok, updated intel-gpu-tools and dumped the various config.
> >>Unfortunately, X froze when
Handy for lazy people like me, or when people forget to add the output
of lspci -nn.
v2: Chris Wilson noticed that we have this duplicated already in the
i915_capabilites debugfs file. But there \n as separator looks better,
which would be a bit verbose in dmesg. Abuse the preprocessor to
extract
On Wed, 8 Aug 2012 18:11:13 +0200, Daniel Vetter
wrote:
> Handy for lazy people like me, or when people forget to add the output
> of lspci -nn.
Is there any chance of sharing this with the similar code for
debugfs/i915_capabilities?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
From: Paulo Zanoni
The current situation is: we use WR PLL1 for everything, so if we have
2 HDMI outputs they will share the same PLL. As a consequence, when
you set a mode on HDMI2, HDMI1 will change its refresh rate. If the
modes are too different, setting a mode on HDMI2 may make the HDMI1
scr
From: Paulo Zanoni
If we don't find the exact refresh rate, go with the next one. This
makes some modes work for me. They won't have the best settings, but
will at least have something. Just returning from this function when
we don't find the perfect settings does not help us at all.
Signed-off-
From: Paulo Zanoni
By looking at the current way we're using these definitions I don't
think this commit will fix any bug, but programmers from the future
are evil and will certainly find ways to combine macro expansion with
operator precedence to introduce bugs that are hard to find.
Signed-off
From: Paulo Zanoni
It's the only part of the i915_reg.h file that looks totally wrongly
indented, so I assume my editor config is the correct one.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 184 +++-
1 file changed, 85 insertions(+), 9
From: Paulo Zanoni
Don't rely on previous values already set on the register. Everything
we're not explicitly setting should be zero for now.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ddi.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/d
From: Paulo Zanoni
Correctly erase the values previously set and also check for 6pbc and
10bpc.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ddi.c | 26 --
2 files changed, 21 insertions(+), 6 deletions(-)
diff --g
From: Paulo Zanoni
During my tests, everything worked even if the wrong polarity was set.
Still, we should try to set the correct values.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
drivers/gpu/drm/i915/intel_ddi.c | 6 ++
2 files changed, 8 insertions(+)
diff
From: Paulo Zanoni
Mask the value before changing it and also select DVI when needed.
DVI was working in cases where the BIOS was setting the correct value
because we were not masking the value before changing it.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers
From: Paulo Zanoni
HDMI already works fine on Haswell, but we still have room for improvements.
This series will make us less dependent on the bits set by the BIOS, will fix
cases where DVI was not working and will also improve the cases where we have 2
HDMI monitors.
- Patches 1-4 are all abo
Handy for lazy people like me, or when people forget to add the output
of lspci -nn.
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_dma.c | 39 ++-
1 file changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/dr
In commit
commit 20b46e59dd102665ce7168baa215e5b1ee66b69b
Author: Daniel Vetter
Date: Thu Jul 26 11:16:14 2012 +0200
drm/i915: Only set the down rps limit when at the loweset frequency
The computation for the new desired frequency was extracted, but since
the desired frequency was passed-
Daniel,
On 08/08/12 02:19, Daniel Vetter wrote:
On Wed, Aug 08, 2012 at 12:17:50AM +1000, Francois Rigaut wrote:
Daniel,
ok, updated intel-gpu-tools and dumped the various config.
Unfortunately, X froze when I tried the to switch to pipe C (--crtc
2). I have three dumps with the various config
On Wed, Aug 08, 2012 at 10:23:22AM +0100, Chris Wilson wrote:
> Userspace tries to estimate the cost of ring switching based on whether
> the GPU and GEM supports semaphores. (If we have multiple rings and no
> semaphores, userspace assumes that the cost of switching rings between
> batches is exor
Userspace tries to estimate the cost of ring switching based on whether
the GPU and GEM supports semaphores. (If we have multiple rings and no
semaphores, userspace assumes that the cost of switching rings between
batches is exorbitant and will endeavour to keep the next batch on the
active ring -
On Tue, Aug 07, 2012 at 02:08:18PM +0200, Daniel Vetter wrote:
> Hi Dave,
>
> - Regression fixer for an OOPS at boot when i915.ko is built-in and
> CONFIG_PM=n, introduce in 3.5 (patch from Hunt Xu)
> - Regression fixer for occlusion query failures, the required w/a wasn't
> applied in all cas
On Fri, Jul 20, 2012 at 06:02:28PM +0100, Chris Wilson wrote:
> The requirements for the sync flush to be emitted prior to the render
> cache flush is only true for SandyBridge. On IvyBridge and friends we
> can just emit the flushes with an inline CS stall.
>
> Signed-off-by: Chris Wilson
Since
At Wed, 08 Aug 2012 00:33:56 +0200,
Øyvind Kvålsvoll wrote:
>
> Ref. to filed bug https://bugs.freedesktop.org/show_bug.cgi?id=49055:
>
> DTS-HD and Dolby TrueHD audio is not working in Intel Sandy Bridge.
> This must have been well known for quite some time now, and I consider
> this to be a se
> -Original Message-
> From: Paul Menzel [mailto:paulepan...@users.sourceforge.net]
> Sent: Wednesday, August 08, 2012 3:15 PM
> To: Wang, Xingchao
> Cc: intel-gfx@lists.freedesktop.org; ti...@suse.de; Fu, Michael; Wu,
> Fengguang
> Subject: Re: [Intel-gfx] [PATCH v5 0/4] Haswell HDMI/DP
Dear Wang,
first is Wang your first name?
Am Mittwoch, den 08.08.2012, 11:03 +0800 schrieb Wang Xingchao:
> This patch series enable HDMI audio on Haswell platform, not DP audio.
> The DP enablement will come after the DP patches are upstream.
>
> I tested this patch on Sharkbay machine and i c
On Wed, Aug 08, 2012 at 02:35:20PM +0800, Yi Sun wrote:
> Signed-off-by: Yi Sun
Both patches applied, thanks.
-Daniel
--
Daniel Vetter
Mail: dan...@ffwll.ch
Mobile: +41 (0)79 365 57 48
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://l
> -Original Message-
> From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
> Daniel Vetter
> Sent: Monday, August 06, 2012 4:33 PM
> To: Sun, Yi
> Cc: intel-gfx@lists.freedesktop.org; Jin, Gordon
> Subject: Re: [PATCH] tests/testdisplay.c: Add a option '-g' to save ima
Signed-off-by: Yi Sun
diff --git a/tests/pass.png b/tests/pass.png
index
5928d5ca109b7db33640851ceb352f9da742ff7b..36a5236be785ef4b2c1da634560c42d508d211bb
100644
GIT binary patch
literal 569
zcmV-90>=G`P)q$gGRCt{2+_8~^Fc5{|^;~eFOK>SJ4N7wG7YT;5
zZ-j94zf49S*^a~_ETKJu#bU8oEEbE!?zRu9@|A~|aFZc~pEyj
Signed-off-by: Yi Sun
diff --git a/tests/testdisplay.c b/tests/testdisplay.c
index 4430d07..14d7da3 100644
--- a/tests/testdisplay.c
+++ b/tests/testdisplay.c
@@ -358,9 +358,6 @@ static void paint_image(cairo_t *cr, const char *file)
cairo_translate(cr, img_x, img_y);
- fprintf(
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