[Intel-gfx] intel_ddi.c

As I read this new (to me) file I get the impression that it really applies to haswell and not the earlier parts, is that correct? thanks ron ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-

[Intel-gfx] [PATCH] drm/i915: make forcewake work again

While trying to track down the power regression, I noticed that on my SNB I had more severe problems, ie. forcewake seemed to never happen once i915 was loaded. After a bit of bisection, I tracked the bad commit to: commit 7b0cfee1a24efdfe0235bac62e53f686fe8a8e24 Merge: 9756fe3 6b16351 Author: Dan

Re: [Intel-gfx] [Mesa-dev] [PATCH mesa] i965: add more Haswell PCI IDs

On 08/06/2012 02:50 PM, Paulo Zanoni wrote: > From: Paulo Zanoni > > Signed-off-by: Paulo Zanoni Reviewed-by: Kenneth Graunke Do you have push access? If not, I can commit this for you. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org ht

Re: [Intel-gfx] [PATCH igt] lib: add more Haswell PCI IDs

Reviewed-by: Rodrigo Vivi On Mon, Aug 6, 2012 at 6:49 PM, Paulo Zanoni wrote: > From: Paulo Zanoni > > Signed-off-by: Paulo Zanoni > --- > lib/intel_chipset.h | 68 > ++--- > 1 file changed, 65 insertions(+), 3 deletions(-) > > diff --git a/lib

Re: [Intel-gfx] [PATCH mesa] i965: add more Haswell PCI IDs

Reviewed-by: Rodrigo Vivi On Mon, Aug 6, 2012 at 6:50 PM, Paulo Zanoni wrote: > From: Paulo Zanoni > > Signed-off-by: Paulo Zanoni > --- > include/pci_ids/i965_pci_ids.h | 33 ++- > src/mesa/drivers/dri/intel/intel_chipset.h | 67 > -- > sr

Re: [Intel-gfx] [PATCH ddx] Add Haswell PCI IDs

Reviewed-by: Rodrigo Vivi On Mon, Aug 6, 2012 at 6:48 PM, Paulo Zanoni wrote: > From: Paulo Zanoni > > Signed-off-by: Paulo Zanoni > --- > src/intel_driver.h | 37 +++ > src/intel_module.c | 73 > ++ > 2 files change

Re: [Intel-gfx] [PATCH libdrm] intel: add more Haswell PCI IDs

Reviewed-by: Rodrigo Vivi On Mon, Aug 6, 2012 at 6:46 PM, Paulo Zanoni wrote: > From: Paulo Zanoni > > Signed-off-by: Paulo Zanoni > --- > intel/intel_chipset.h | 68 > --- > 1 file changed, 65 insertions(+), 3 deletions(-) > > diff --git a/int

Re: [Intel-gfx] [PATCH kernel] drm/i915: add more Haswell PCI IDs

Reviewed-by: Rodrigo Vivi 2012/8/6 Paulo Zanoni : > From: Paulo Zanoni > > Also properly indent the HB IDs. > > Signed-off-by: Paulo Zanoni > --- > drivers/char/agp/intel-agp.h| 39 + > drivers/char/agp/intel-gtt.c| 60 >

[Intel-gfx] [PATCH mesa] i965: add more Haswell PCI IDs

From: Paulo Zanoni Signed-off-by: Paulo Zanoni --- include/pci_ids/i965_pci_ids.h | 33 ++- src/mesa/drivers/dri/intel/intel_chipset.h | 67 -- src/mesa/drivers/dri/intel/intel_context.c | 35 +++- 3 files changed, 130 insertions(+

[Intel-gfx] [PATCH igt] lib: add more Haswell PCI IDs

From: Paulo Zanoni Signed-off-by: Paulo Zanoni --- lib/intel_chipset.h | 68 ++--- 1 file changed, 65 insertions(+), 3 deletions(-) diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h index 6a85ca2..a229ea1 100755 --- a/lib/intel_chipset.h +++

[Intel-gfx] [PATCH ddx] Add Haswell PCI IDs

From: Paulo Zanoni Signed-off-by: Paulo Zanoni --- src/intel_driver.h | 37 +++ src/intel_module.c | 73 ++ 2 files changed, 110 insertions(+) diff --git a/src/intel_driver.h b/src/intel_driver.h index 882d889..ac02cc7

[Intel-gfx] [PATCH libdrm] intel: add more Haswell PCI IDs

From: Paulo Zanoni Signed-off-by: Paulo Zanoni --- intel/intel_chipset.h | 68 --- 1 file changed, 65 insertions(+), 3 deletions(-) diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 9c1abc8..b73fa0f 100644 --- a/intel/intel_chipset

[Intel-gfx] [PATCH kernel] drm/i915: add more Haswell PCI IDs

From: Paulo Zanoni Also properly indent the HB IDs. Signed-off-by: Paulo Zanoni --- drivers/char/agp/intel-agp.h| 39 + drivers/char/agp/intel-gtt.c| 60 ++- drivers/gpu/drm/i915/i915_drv.c | 31 +++- 3 f

Re: [Intel-gfx] [PATCH intel-gpu-tools] tools: Added intel_dpio_read and intel_dpio_write

On Mon, 6 Aug 2012 13:10:33 +0530 Vijay Purushothaman wrote: > On Thu, 2 Aug 2012 09:06:48 -0700 > Ben Widawsky wrote: > > > On 2012-08-02 05:07, Vijay Purushothaman wrote: > > > In Valleyview the DPLL and lane control registers are accessible > > > only through side band fabric called DPIO. Ad

Re: [Intel-gfx] [PATCH intel-gpu-tools] tools: Added intel_dpio_read and intel_dpio_write

On 2012-08-06 00:16, Daniel Vetter wrote: On Thu, Aug 02, 2012 at 09:06:48AM -0700, Ben Widawsky wrote: On 2012-08-02 05:07, Vijay Purushothaman wrote: >In Valleyview the DPLL and lane control registers are accessible only >through side band fabric called DPIO. Added two tools to read and >wri

Re: [Intel-gfx] Fwd: Re: Macbook Pro Retina display problems

On Mon, Aug 06, 2012 at 11:40:36PM +1000, Francois Rigaut wrote: > Daniel, > > On Mon, Aug 6, 2012 at 7:17 PM, Daniel Vetter > wrote: > >On Mon, Aug 6, 2012 at 10:59 AM, Francois Rigaut > wrote: > > Daniel, > > > > > > my

Re: [Intel-gfx] [PATCH 2/3] intel: Import updated i915_drm.h.

Ben Widawsky writes: > On 2012-08-02 11:29, Eric Anholt wrote: > > Yikes, who spelled caching wrong? > Reviewed-by: Ben Widawsky Yeah, would be nice to get that fixed in the kernel before we have to cringe forever. pgpR6HO5ph125.pgp Description: PGP signature _

Re: [Intel-gfx] [PATCH] drm/i915: make rc6 in sysfs functions conditional

On Sun, Jul 01, 2012 at 09:50:34AM -0700, Ben Widawsky wrote: > On Sun, 1 Jul 2012 11:39:40 +0800 > Hunt Xu wrote: > > > Commit 0136db586c028f71e7cc21cc183064ff0d5919c8 merges rc6 information > > into the power group. However, when compiled with CONFIG_PM not set, > > modprobing i915 would taint

Re: [Intel-gfx] [PATCH v4 0/3] Haswell HDMI/DP audio enable

At Mon, 6 Aug 2012 18:43:57 +0800, Wang Xingchao wrote: > > This patch series enable HDMI audio on Haswell platform, not DP audio. > The DP enablement will come after the DP patches are upstream. > > I tested this patch on Sharkbay machine and i could hear clear sound from > HDMI port. > > V2 p

Re: [Intel-gfx] Fwd: Re: Macbook Pro Retina display problems

Daniel, On Mon, Aug 6, 2012 at 7:17 PM, Daniel Vetter > wrote: On Mon, Aug 6, 2012 at 10:59 AM, Francois Rigaut mailto:frig...@gmail.com>> wrote: > Daniel, > > > my bad for the dmesg. It's there: > http://maumae.net/retina/intel_corrupted_drm_d

[Intel-gfx] [PATCH v4 3/3] drm/i915: Haswell HDMI audio enable

Configure the related HDMI audio register to generate an unsolicited response to the audio controller driver to indicate that the controller sequence should start. Use "pipe" way to get correct register definitions for IBX/CPT/HSW. Signed-off-by: Wang Xingchao --- drivers/gpu/drm/i915/i915_reg.

[Intel-gfx] [PATCH V4 2/3] drm/i915: write eld info for HDMI audio

HDMI audio related registers will be configured in write_eld callback. Signed-off-by: Wang Xingchao --- drivers/gpu/drm/i915/intel_ddi.c |6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 32604ac..

[Intel-gfx] [PATCH v4 1/3] drm/i915: HSW audio registers definition

Add hsw audio registers definition Signed-off-by: Wang Xingchao --- drivers/gpu/drm/i915/i915_reg.h | 48 +++ 1 file changed, 48 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1310caa..ed87de9 100644 --- a

[Intel-gfx] [PATCH v4 0/3] Haswell HDMI/DP audio enable

This patch series enable HDMI audio on Haswell platform, not DP audio. The DP enablement will come after the DP patches are upstream. I tested this patch on Sharkbay machine and i could hear clear sound from HDMI port. V2 patches fixed one warning and some type errors. V3 patches changes: - chan

Re: [Intel-gfx] [PATCH V2 3/4] drm/i915: Haswell HDMI audio enable

Hey Daniel, I had v3 patches under review and will send them out later. > > > dev_priv->pipe_to_crtc_mapping[pipe]; > > > > > > + DRM_DEBUG_DRIVER("Enable transcoder %c\n", > pipe_name(pipe)); > > > > Do we really want this? > > ... and in kms code we use DRM_DEBUG_KMS. I'd removed th

Re: [Intel-gfx] Fwd: Re: Macbook Pro Retina display problems

On Mon, Aug 6, 2012 at 10:59 AM, Francois Rigaut wrote: > Daniel, > > > my bad for the dmesg. It's there: > http://maumae.net/retina/intel_corrupted_drm_debug/dmesg_intel_corrupted_drm_debug > > I took pictures with a camera, and uploaded them at > Small 800x600 versions: > http://maumae.net/retin

Re: [Intel-gfx] Fwd: Re: Macbook Pro Retina display problems

Daniel, my bad for the dmesg. It's there: http://maumae.net/retina/intel_corrupted_drm_debug/dmesg_intel_corrupted_drm_debug I took pictures with a camera, and uploaded them at Small 800x600 versions: http://maumae.net/retina/intel_corrupted_drm_debug/intel_corrupted_upper_left_small.jpg http:/

Re: [Intel-gfx] [PATCH] tests/testdisplay.c: Add a option '-g' to save images which intended to paint on screen during each mode setting.

On Mon, Aug 6, 2012 at 9:47 AM, Sun, Yi wrote: > We want to use the option to save the images which are intended to be painted > on the screen. > The images will be save in the folder "saveimages", and named like > "1_1920x1...@60.png", "2_1920x1080@60" . > > That would be help for our autom

Re: [Intel-gfx] [PATCH] tests/testdisplay.c: Add a option '-g' to save images which intended to paint on screen during each mode setting.

We want to use the option to save the images which are intended to be painted on the screen. The images will be save in the folder "saveimages", and named like "1_1920x1...@60.png", "2_1920x1080@60" . That would be help for our automatic display testing. If some mode can't be lighten up in

Re: [Intel-gfx] [PATCH intel-gpu-tools] tools: Added intel_dpio_read and intel_dpio_write

On Fri, 3 Aug 2012 10:05:41 +0300 Jani Nikula wrote: > On Thu, 02 Aug 2012, Ben Widawsky wrote: > > On 2012-08-02 05:07, Vijay Purushothaman wrote: > >> In Valleyview the DPLL and lane control registers are accessible > >> only through side band fabric called DPIO. Added two tools to read > >> a

Re: [Intel-gfx] [PATCH intel-gpu-tools] tools: Added intel_dpio_read and intel_dpio_write

On Thu, 2 Aug 2012 09:06:48 -0700 Ben Widawsky wrote: > On 2012-08-02 05:07, Vijay Purushothaman wrote: > > In Valleyview the DPLL and lane control registers are accessible > > only through side band fabric called DPIO. Added two tools to read > > and write > > registers residing in this space. >

Re: [Intel-gfx] [PATCH intel-gpu-tools] tools: Added intel_dpio_read and intel_dpio_write

On Thu, Aug 02, 2012 at 09:06:48AM -0700, Ben Widawsky wrote: > On 2012-08-02 05:07, Vijay Purushothaman wrote: > >In Valleyview the DPLL and lane control registers are accessible only > >through side band fabric called DPIO. Added two tools to read and > >write > >registers residing in this space.

Re: [Intel-gfx] Fwd: Re: Macbook Pro Retina display problems

On Thu, Aug 02, 2012 at 01:37:05PM +1000, Francois Rigaut wrote: > Dave, Greg, > > OK, the problem was indeed a connection issue. By using gfxcardstatus > within osx, I was able to force the HD4000 to connect to the display. > The xorg log now reports: > > [ 8.226] (--) PCI:*(0:0:2:0) 8086:01

Re: [Intel-gfx] [PATCH] tests/testdisplay.c: Add a option '-g' to save images which intended to paint on screen during each mode setting.

On Wed, Aug 01, 2012 at 09:51:46AM +0800, Yi Sun wrote: > That option will save all the images which are created and intended to paint > on screen. > The images will be saved in folder "saveimages" with PNG format. > > Signed-off-by: Yi Sun tbh I don't see the point of this. Care to elaborate a

Re: [Intel-gfx] [PATCH V2 3/4] drm/i915: Haswell HDMI audio enable

On Wed, Aug 01, 2012 at 11:12:28PM -0300, Paulo Zanoni wrote: > Hi > > Comments inline. > > 2012/7/30 Wang Xingchao : > > Configure the related HDMI audio register to generate an unsolicited > > response to the audio controller driver to indicate that the controller > > sequence should start. > >

Re: [Intel-gfx] [PATCH] drm/i915: Make intel_panel_get_backlight static.

On Mon, Jul 30, 2012 at 01:51:38PM -0700, Stéphane Marchesin wrote: > This function isn't used outside of intel_panel.c, so make it static. > > Signed-off-by: Stéphane Marchesin Picked up for -fixes, thanks for the patch. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48