Jesse Barnes writes:
> High frequency link configurations have the potential to cause trouble
> with long and/or cheap cables, so prefer slow and wide configurations
> instead. This patch has the potential to cause trouble for eDP
> configurations that lie about available lanes, so if we run int
High frequency link configurations have the potential to cause trouble
with long and/or cheap cables, so prefer slow and wide configurations
instead. This patch has the potential to cause trouble for eDP
configurations that lie about available lanes, so if we run into that we
can make it condition
This patch fixes the problem on some HP desktop machines with eDP
which give blank screens after S3 resume.
It turned out that BLC_PWM_CPU_CTL must be written after
BLC_PWM_CPU_CTL2. Otherwise it doesn't take effect on these
SNB machines.
Tested with 3.5-rc3 kernel.
Bugzilla: https://bugs.freed
At Thu, 21 Jun 2012 14:33:07 +0200,
Daniel Vetter wrote:
>
> On Thu, Jun 21, 2012 at 02:11:50PM +0200, Takashi Iwai wrote:
> > At Wed, 20 Jun 2012 11:39:51 +0200,
> > Takashi Iwai wrote:
> > >
> > > At Wed, 20 Jun 2012 11:36:51 +0200,
> > > Daniel Vetter wrote:
> > > >
> > > > On Wed, Jun 20, 20
On Thu, 21 Jun 2012 14:55:22 +0200, Daniel Vetter
wrote:
> After banging my head against this for the past few months, I still
> don't see how this could possible race under the premise that once an
> irq bit is masked in PM_IMR and reset in PM_IIR it won't show up again
> until we unmask it in P
After banging my head against this for the past few months, I still
don't see how this could possible race under the premise that once an
irq bit is masked in PM_IMR and reset in PM_IIR it won't show up again
until we unmask it in PM_IMR.
Still, we have reports of this being seen in the wild. Now
On Thu, Jun 21, 2012 at 02:11:50PM +0200, Takashi Iwai wrote:
> At Wed, 20 Jun 2012 11:39:51 +0200,
> Takashi Iwai wrote:
> >
> > At Wed, 20 Jun 2012 11:36:51 +0200,
> > Daniel Vetter wrote:
> > >
> > > On Wed, Jun 20, 2012 at 11:21:11AM +0200, Takashi Iwai wrote:
> > > > At Wed, 20 Jun 2012 10:0
On Thu, Jun 21, 2012 at 01:19:59PM +0300, Jani Nikula wrote:
> From: Chris Wilson
>
> This addresses WaPruneModeWithIncorrectHsyncOffset.
>
> Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=50236
> Signed-off-by: Chris Wilson
> Signed-off-by: Jani Nikula
>
> ---
>
> v2: drop patch 1/2,
At Wed, 20 Jun 2012 11:39:51 +0200,
Takashi Iwai wrote:
>
> At Wed, 20 Jun 2012 11:36:51 +0200,
> Daniel Vetter wrote:
> >
> > On Wed, Jun 20, 2012 at 11:21:11AM +0200, Takashi Iwai wrote:
> > > At Wed, 20 Jun 2012 10:05:12 +0200,
> > > Daniel Vetter wrote:
> > > >
> > > > On Wed, Jun 20, 2012 a
From: Chris Wilson
This addresses WaPruneModeWithIncorrectHsyncOffset.
Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=50236
Signed-off-by: Chris Wilson
Signed-off-by: Jani Nikula
---
v2: drop patch 1/2, to be addressed later.
---
drivers/gpu/drm/i915/intel_display.c |7 +++
1
On Wed, Jun 20, 2012 at 03:12:35PM -0700, Stéphane Marchesin wrote:
> This is an initial implementation of i915 adaptive backlight support.
> The intended use for the adaptive backlight is to generate interrupts
> whenever the luminance of the screen changes by some thresholds. The
> main caveat wi
On Thu, 21 Jun 2012, Stéphane Marchesin wrote:
> This is an initial implementation of i915 adaptive backlight support.
> The intended use for the adaptive backlight is to generate interrupts
> whenever the luminance of the screen changes by some thresholds. The
> main caveat with that implementati
Hi all,
Slightly longer -next cycle than usual, somehow almost nothing was queued
up last week, so I waited a bit longer. But now there's still a sizeable
chunk of patches merged. Highlights:
- Remaining vlv patches from Jesse et al.
- Some hw workarounds from Jesse
- hw context support from Ben
-
On Thu, 21 Jun 2012, Adam Jackson wrote:
> On Wed, 2012-06-20 at 23:15 +0300, Jani Nikula wrote:
>> Restrict hsync start, end, hdisplay and htotal to be according to hw
>> spec. Through drm_mode_set_crtcinfo(), these will also limit hblank start,
>> end.
>
> I'm pretty sure any physical hardware w
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