Re: [Intel-gfx] [PATCH 0/5 v3] timed BO wait

2012-05-02 Thread Ben Widawsky
The updated work is below, rebased on top of dinq. http://cgit.freedesktop.org/~bwidawsk/drm-intel/log/?h=wait_rendering git://people.freedesktop.org/~bwidawsk/drm-intel wait_rendering I'll resubmit the patches once we settle on the review comments from patch 1. Thanks Chris, and Daniel for the f

Re: [Intel-gfx] [PATCH 1/5] drm/i915: timeout parameter for seqno wait

2012-05-02 Thread Ben Widawsky
On Wed, 2 May 2012 23:47:35 +0200 Daniel Vetter wrote: > On Mon, Apr 30, 2012 at 06:39:58PM -0700, Ben Widawsky wrote: > > Insert a wait parameter in the code so we can possibly timeout on a > > seqno wait if need be. The code should be functionally the same as > > before because all the callers

[Intel-gfx] [PATCH 00/12] Infoframe fixes

2012-05-02 Thread Paulo Zanoni
Hi This is an initial set of patches related to InfoFrames I developed. They're based on a few bugs I can reproduce and also on the register specifications. The first patch is candidate to stable, but patches 2, 3 and 4 could also be (they fix my system when I boot only with an HDMI monitor and no

[Intel-gfx] [PATCH 12/12] drm/i915: simplify intel_encoder_commit

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c |3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a2617b2..f807d36 100644 --- a/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH 11/12] drm/i915: split ironlake_write_infoframe into ibx_ and cpt_

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni 1 - The registers are on the PCH, so don't use the Gen number 2 - IBX has a port select (like Gen 4, but ports are different) 3 - CPT needs a workaround when enabling the AVI Infoframe Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h |1 + drivers/gpu/dr

[Intel-gfx] [PATCH 10/12] drm/i915: mask the video DIP frequency when changing it

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h |1 + drivers/gpu/drm/i915/intel_hdmi.c |3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index cc0b90c..6e03732 100644 --- a/drive

[Intel-gfx] [PATCH 09/12] drm/i915: disable the infoframe before changing it

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni That's what the VIDEO_DIP_CTL documentation says we need to do. Except when it's the AVI InfoFrame and we're ironlake_write_infoframe. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_hdmi.c |7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/

[Intel-gfx] [PATCH 08/12] drm/i915: break intel_infoframe_flags into _enable and _index

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni This will allow us to disable an infoframe without changing its frequency. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_hdmi.c | 32 ++-- 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdm

[Intel-gfx] [PATCH 07/12] drm/i915: mask the video DIP port select

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h |1 + drivers/gpu/drm/i915/intel_hdmi.c |1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8da0b40..cc0b90c 100644 --- a/drivers

[Intel-gfx] [PATCH 06/12] drm/i915: start writing infoframes at address 0 on gen 4

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni Make sure we're doing the right thing, just like we do on gen5+. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_hdmi.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c in

[Intel-gfx] [PATCH 05/12] drm/i915: change coding style of the write_infoframe functions

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni Don't use intermediate variables, change the value of 'val' as we go through the function. The new style looks more similar to the rest of our code. IMHO, it's also easier to read and change. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_hdmi.c | 43 ++

[Intel-gfx] [PATCH 04/12] drm/i915: touch the DIP control register after enabling the HDMI port

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_hdmi.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 1eef50d..8646a50 100644 --- a/drivers/gpu/drm/i915/inte

[Intel-gfx] [PATCH 03/12] drm/i915: implement ironlake_wait_for_vblank

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni intel_wait_for_vblank uses PIPESTAT, which does not exist on Ironlake and newer. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 31 +++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 02/12] drm/i915: DSL_LINEMASK is 12 bits only on gen2

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni Gen3+ is 13 bits (12:0). Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h |3 ++- drivers/gpu/drm/i915/intel_display.c | 11 --- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/dr

[Intel-gfx] [PATCH 01/12] drm/i915: enable dip before writing data on gen4

2012-05-02 Thread Paulo Zanoni
From: Paulo Zanoni While testing with the intel_infoframes tool on gen4, I see that when video DIP is disabled, what we write to the DATA memory is not exactly what we read back later. This should fix some problems that can be bisected to "drm/i915: fix ILK+ infoframe support". That commit was se

Re: [Intel-gfx] [PATCH] drm/i915: rip out intel_dpio_write again

2012-05-02 Thread Jesse Barnes
On Wed, 2 May 2012 13:18:56 -0700 Ben Widawsky wrote: > On Wed, 2 May 2012 11:55:48 -0700 > Jesse Barnes wrote: > > > On Wed, 2 May 2012 08:44:27 -0700 > > Ben Widawsky wrote: > > > > > On Wed, 2 May 2012 11:06:23 +0200 > > > Daniel Vetter wrote: > > > > > > > Unfortunately it looks like f

Re: [Intel-gfx] [PATCH 2/5] drm/i915: make waiting trace events more useful

2012-05-02 Thread Daniel Vetter
On Wed, May 02, 2012 at 11:36:15PM +0200, Daniel Vetter wrote: > On Wed, May 02, 2012 at 10:22:33PM +0100, Chris Wilson wrote: > > On Wed, 2 May 2012 23:12:36 +0200, Daniel Vetter wrote: > > > For consistency I guess we can ditch the dev parameter (and even then, the > > > ring would uniquely iden

Re: [Intel-gfx] [PATCH 1/5] drm/i915: timeout parameter for seqno wait

2012-05-02 Thread Daniel Vetter
On Mon, Apr 30, 2012 at 06:39:58PM -0700, Ben Widawsky wrote: > Insert a wait parameter in the code so we can possibly timeout on a > seqno wait if need be. The code should be functionally the same as > before because all the callers will continue to retry if an arbitrary > timeout elapses. > > We

Re: [Intel-gfx] [PATCH 2/5] drm/i915: make waiting trace events more useful

2012-05-02 Thread Daniel Vetter
On Wed, May 02, 2012 at 10:22:33PM +0100, Chris Wilson wrote: > On Wed, 2 May 2012 23:12:36 +0200, Daniel Vetter wrote: > > For consistency I guess we can ditch the dev parameter (and even then, the > > ring would uniquely identify the device). Also, I guess you need to > > explicitly pass in bloc

Re: [Intel-gfx] [PATCH 4/5] drm/i915: wait render timeout ioctl

2012-05-02 Thread Daniel Vetter
On Mon, Apr 30, 2012 at 06:41:08PM -0700, Ben Widawsky wrote: > This helps implement GL_ARB_sync put stops short of allowing full blow > sync objects. > > Finally we can use the new timed seqno waiting function to allow > userspace to wait on a request with a timeout. This implements that > interf

Re: [Intel-gfx] [PATCH 2/5] drm/i915: make waiting trace events more useful

2012-05-02 Thread Chris Wilson
On Wed, 2 May 2012 23:12:36 +0200, Daniel Vetter wrote: > For consistency I guess we can ditch the dev parameter (and even then, the > ring would uniquely identify the device). Also, I guess you need to > explicitly pass in blocking, because mutex_is_locked is rather racy - > someone else could ho

Re: [Intel-gfx] [PATCH 2/5] drm/i915: make waiting trace events more useful

2012-05-02 Thread Daniel Vetter
On Mon, Apr 30, 2012 at 06:40:23PM -0700, Ben Widawsky wrote: > v2: Don't do a trace event per loop. (Chris) > Only get blocking/non-blocking info (Chris) > > Signed-off-by: Ben Widawsky > --- > drivers/gpu/drm/i915/i915_trace.h | 22 -- > 1 file changed, 20 insertions(+),

Re: [Intel-gfx] [PATCH 3/5 v2] drm/i915: extract some common olr+wedge code

2012-05-02 Thread Daniel Vetter
On Sun, Apr 29, 2012 at 03:22:32PM -0700, Ben Widawsky wrote: > Refactor. > > v2: Don't use seqno as an outparam (Chris) > > Signed-off-by: Ben Widawsky Queued for -next (with some paint added), thanks for the patch. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___

Re: [Intel-gfx] [PATCH] drm/i915: gen6_enable_rps() wants to be called after ring initialisation

2012-05-02 Thread Daniel Vetter
On Fri, Apr 27, 2012 at 06:36:37PM +0100, Chris Wilson wrote: > Currently we call gen6_enable_rps() (which writes into the per-ring > register mmio space) from intel_modeset_init_hw() which is called before > we initialise the rings. If we defer intel_modeset_init_hw() until > afterwards (in the in

Re: [Intel-gfx] [PATCH] drm/i915: Wait for the clocks to stabilise before updating PLLs

2012-05-02 Thread Chris Wilson
On Wed, 2 May 2012 13:14:59 -0700, Ben Widawsky wrote: > On Wed, 2 May 2012 20:43:56 +0100 > Chris Wilson wrote: When initialising the PLL registers we may have to clear existing state from the BIOS - that is the PLL may already be enabled. So we need to disable it, wait for the clocks to settl

Re: [Intel-gfx] [PATCH] drm/i915: rip out intel_dpio_write again

2012-05-02 Thread Ben Widawsky
On Wed, 2 May 2012 11:55:48 -0700 Jesse Barnes wrote: > On Wed, 2 May 2012 08:44:27 -0700 > Ben Widawsky wrote: > > > On Wed, 2 May 2012 11:06:23 +0200 > > Daniel Vetter wrote: > > > > > Unfortunately it looks like further vlv patches are still stalled due > > > to fried hw, and too many peo

Re: [Intel-gfx] [PATCH] drm/i915: Wait for the clocks to stabilise before updating PLLs

2012-05-02 Thread Ben Widawsky
On Wed, 2 May 2012 20:43:56 +0100 Chris Wilson wrote: > Cc: Ben Widawsky > Cc: Jesse Barnes Reported-and-tested-by: Ben Widawsky > --- > drivers/gpu/drm/i915/intel_display.c |7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display

Re: [Intel-gfx] HDMI problems when using a A/V receiver

2012-05-02 Thread linux
some minor update: it looks like as soon as kms get's activated during boot there is no picture anymore when the A/V-receiver is between PC and TV (or a projector which I connected for testing but which has the same behaviour...). According to OSD of the projector the PC generates 1280x720 (which

[Intel-gfx] HDMI problems when using a A/V receiver

2012-05-02 Thread linux
Hi I'm currently using the Intel Core i3 integrated graphics: [ 68585.994] (II) intel(0): Integrated Graphics Chipset: Intel(R) Clarkdale I'm running Debian wheezy and I have my system connected via HDMI to my flatscreen TV. I'm using a resolution of 1280x720 and everything is working fine:

Re: [Intel-gfx] [PATCH] drm/i915: fix gen4 gpu reset

2012-05-02 Thread Kenneth Graunke
On 05/02/2012 12:33 PM, Daniel Vetter wrote: While trying to fix up gen4 gpu reset in commit f49f0586191fe16140410db0a46d43bdc690d6af Author: Kenneth Graunke Date: Sat Sep 11 01:19:14 2010 -0700 drm/i915: Actually set the reset bit in i965_reset a little confusion about when wait_for ti

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Support pageflipping interrupts for all 3-pipes on IVB

2012-05-02 Thread Jesse Barnes
On Wed, 2 May 2012 09:52:12 +0100 Chris Wilson wrote: > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_irq.c | 31 ++- > drivers/gpu/drm/i915/i915_reg.h |7 +-- > 2 files changed, 27 insertions(+), 11 deletions(-) > Highly embarrassing. R

[Intel-gfx] [PATCH] drm/i915: Wait for the clocks to stabilise before updating PLLs

2012-05-02 Thread Chris Wilson
Cc: Ben Widawsky Cc: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c |7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d5aa2d2..b97112c 100644 --- a/drivers/gpu/drm/i915/intel_dis

[Intel-gfx] [PATCH] drm/i915: fix gen4 gpu reset

2012-05-02 Thread Daniel Vetter
While trying to fix up gen4 gpu reset in commit f49f0586191fe16140410db0a46d43bdc690d6af Author: Kenneth Graunke Date: Sat Sep 11 01:19:14 2010 -0700 drm/i915: Actually set the reset bit in i965_reset a little confusion about when wait_for times out has been introduced - wait for loops _u

Re: [Intel-gfx] [PATCH] drm/i915: rip out intel_dpio_write again

2012-05-02 Thread Jesse Barnes
On Wed, 2 May 2012 08:44:27 -0700 Ben Widawsky wrote: > On Wed, 2 May 2012 11:06:23 +0200 > Daniel Vetter wrote: > > > Unfortunately it looks like further vlv patches are still stalled due > > to fried hw, and too many people are a bit annoyed about the unused > > function warning. > > It is

Re: [Intel-gfx] [PATCH] drm/i915: rip out intel_dpio_write again

2012-05-02 Thread Ben Widawsky
On Wed, 2 May 2012 11:06:23 +0200 Daniel Vetter wrote: > Unfortunately it looks like further vlv patches are still stalled due > to fried hw, and too many people are a bit annoyed about the unused > function warning. It is my preference that you never merge code which you know will produce a wa

Re: [Intel-gfx] [PATCH 01/10] drm/i915: add interface to simulate gpu hangs

2012-05-02 Thread Daniel Vetter
On Fri, Apr 27, 2012 at 09:56:55PM -0700, Ben Widawsky wrote: > On Fri, 27 Apr 2012 15:17:38 +0200 > Daniel Vetter wrote: > > > gpu reset is a very important piece of our infrastructure. > > Unfortunately we only really it test by actually hanging the gpu, > > which often has bad side-effects for

Re: [Intel-gfx] [PATCH] drm/i915: Only enable IPS polling for gen5

2012-05-02 Thread Daniel Vetter
On Tue, May 01, 2012 at 07:45:02PM +0200, Daniel Vetter wrote: > On Tue, May 01, 2012 at 07:58:27AM -0700, Jesse Barnes wrote: > > On Mon, 30 Apr 2012 19:35:02 +0100 > > Chris Wilson wrote: > > > > > On SandyBridge IPS was entirely implemented in hardware and not reliant > > > on the driver monit

Re: [Intel-gfx] [PATCH] drm/i915: Do not read non-existent DPLL registers on PCH hardware

2012-05-02 Thread Daniel Vetter
On Wed, May 02, 2012 at 12:07:06PM +0100, Chris Wilson wrote: > We only execute intel_decrease_pllclock for pre-PCH hardware, typically > gen4 mobiles. However, in the variable declaration we did read from the > non-PCH DPLL register, quite naughty and detected by SandyBridge. > > Reported-by: And

Re: [Intel-gfx] [PATCH] drm/i915/overlay: Fully configure overlay before turning on

2012-05-02 Thread Daniel Vetter
On Tue, Apr 24, 2012 at 06:53:39PM +0100, Chris Wilson wrote: > We seem to trigger an occasional error when the GPU tries to dereference > a PTE for an overlay plane prior to us populating the offsets in the > overlay registers. This is despite the Overlay Command being set to off. > Close this win

Re: [Intel-gfx] [PATCH 00/17] dri1 dragon slaughtering, v2

2012-05-02 Thread Daniel Vetter
On Thu, Apr 26, 2012 at 11:28:00PM +0200, Daniel Vetter wrote: > Hi all, > > Essentially just rebased on top of latest dinq. Happy bikeshedding! I've queued up the entire patchs series for -next with Jesse's irc-ack added. -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 4

[Intel-gfx] [PATCH] drm/i915: Do not read non-existent DPLL registers on PCH hardware

2012-05-02 Thread Chris Wilson
We only execute intel_decrease_pllclock for pre-PCH hardware, typically gen4 mobiles. However, in the variable declaration we did read from the non-PCH DPLL register, quite naughty and detected by SandyBridge. Reported-by: Andrey Rahmatullin References: https://bugs.freedesktop.org/show_bug.cgi?i

[Intel-gfx] [PATCH] drm/i915: rip out intel_dpio_write again

2012-05-02 Thread Daniel Vetter
Unfortunately it looks like further vlv patches are still stalled due to fried hw, and too many people are a bit annoyed about the unused function warning. So let's just rip it out, we can easily put it back in again. Cc: Jesse Barnes Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH 2/2] drm/i915: Simplify the IVB interrupt handler

2012-05-02 Thread Chris Wilson
Reduce the number of reads and writes required for handling a single interrupt. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 94 --- 1 file changed, 38 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/driver

[Intel-gfx] [PATCH 1/2] drm/i915: Support pageflipping interrupts for all 3-pipes on IVB

2012-05-02 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 31 ++- drivers/gpu/drm/i915/i915_reg.h |7 +-- 2 files changed, 27 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 39c4e68.