Re: [Intel-gfx] [PATCH 24/29] drm/i915: program iCLKIP on Lynx Point

On Sun, Apr 15, 2012 at 20:49, Daniel Vetter wrote: > > I'm honestly not too happy with this table, because somewhere in there > we'll have an annoying type, and there's almost zero chance we'll ever > find that. So I prefer if we can replicate the pixel clock computation > from some stupid excel

Re: [Intel-gfx] [PATCH 15/29] drm/i915: do not enable PCH PLL on pre-haswell

On Fri, Apr 13, 2012 at 05:08:51PM -0300, Eugeni Dodonov wrote: > Signed-off-by: Eugeni Dodonov > --- > drivers/gpu/drm/i915/intel_display.c |5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_displ

Re: [Intel-gfx] [PATCH 24/29] drm/i915: program iCLKIP on Lynx Point

On Fri, Apr 13, 2012 at 05:09:00PM -0300, Eugeni Dodonov wrote: > The iCLKIP clock is used to drive the VGA pixel clock on the PCH. In order > to do so, it must be programmed to properly do the clock ticks according > to the divisor, phase direction, phase increments and a special auxiliary > divis

Re: [Intel-gfx] [PATCH 25/29] drm/i915: detect digital outputs on Haswell

On Fri, Apr 13, 2012 at 09:37:44PM -0300, Eugeni Dodonov wrote: > On Fri, Apr 13, 2012 at 18:17, Chris Wilson wrote: > > > We're starting to get to ridiculous levels of indention. Break the PCH > > detection of SDVO/HDMI outputs into its own routine, and perhaps further > > down in architectures?

Re: [Intel-gfx] [PATCH 10/29] drm/i915: reuse Ivybridge interrupts code for Haswell

On Fri, Apr 13, 2012 at 05:08:46PM -0300, Eugeni Dodonov wrote: > v2: prevent possible conflicts with VLV. > > v1 Reviewed-by: Rodrigo Vivi > Signed-off-by: Eugeni Dodonov > --- > drivers/gpu/drm/i915/i915_irq.c |6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/

Re: [Intel-gfx] [PATCH 4/6] drm/i915: Try harder on multifunction SDVO DDC

On Thu, Jun 16, 2011 at 04:36:26PM -0400, Adam Jackson wrote: > The comment was wrong, bus 0 is the SPD ROM, as we discovered in > 14571b4 and b108333. > > Signed-off-by: Adam Jackson I've checked with the SDVO spec and the ddc bus switch command uses a bitflag array, and bit 0 (i.e. 1) is used

Re: [Intel-gfx] HDMI TV doesn't work over HDMI cable

On Sun, Apr 15, 2012 at 12:27:00PM -0300, Eugeni Dodonov wrote: > could you open a bug on this and attach those Xorg log files together with > the 'dmesg' output when booting with the 'drm.debug=0xe' kernel parameter? > And also your kernel version? The > http://intellinuxgraphics.org/how_to_report

Re: [Intel-gfx] [PATCH] drm/i915: don't clobber the special upscaling lvds timings

On Sun, 15 Apr 2012 19:53:19 +0200, Daniel Vetter wrote: > This regression has been introduced in > > commit ca9bfa7eed20ea34e862804e62aae10eb159edbb > Author: Daniel Vetter > Date: Sat Jan 28 14:49:20 2012 +0100 > > drm/i915: fixup interlaced vertical timings confusion, part 1 > > Unfo

[Intel-gfx] [PATCH] drm/i915: don't clobber the special upscaling lvds timings

This regression has been introduced in commit ca9bfa7eed20ea34e862804e62aae10eb159edbb Author: Daniel Vetter Date: Sat Jan 28 14:49:20 2012 +0100 drm/i915: fixup interlaced vertical timings confusion, part 1 Unfortunately that commit failed to take into account that the lvds code does som

Re: [Intel-gfx] [PATCH] drm/i915: Refactor the deferred PM_IIR handling into a single function

On Sun, Apr 15, 2012 at 10:23:15AM -0700, Ben Widawsky wrote: > On Sun, 15 Apr 2012 11:56:03 +0100 > Chris Wilson wrote: > > > This function, along with the registers and deferred work hander, are > > all shared with SandyBridge, IvyBridge and their variants. So remove > > the duplicate code into

Re: [Intel-gfx] [PATCH] drm/i915: don't clobber the special upscaling lvds timings

On Sun, 15 Apr 2012 19:24:34 +0200, Daniel Vetter wrote: > This regression has been introduced in > > commit ca9bfa7eed20ea34e862804e62aae10eb159edbb > Author: Daniel Vetter > Date: Sat Jan 28 14:49:20 2012 +0100 > > drm/i915: fixup interlaced vertical timings confusion, part 1 > > Unfo

Re: [Intel-gfx] [PATCH] drm/i915: Refactor the deferred PM_IIR handling into a single function

On Sun, 15 Apr 2012 11:56:03 +0100 Chris Wilson wrote: > This function, along with the registers and deferred work hander, are > all shared with SandyBridge, IvyBridge and their variants. So remove > the duplicate code into a single function. > > Signed-off-by: Chris Wilson Reviewed-by: Ben Wid

[Intel-gfx] [PATCH] drm/i915: don't clobber the special upscaling lvds timings

This regression has been introduced in commit ca9bfa7eed20ea34e862804e62aae10eb159edbb Author: Daniel Vetter Date: Sat Jan 28 14:49:20 2012 +0100 drm/i915: fixup interlaced vertical timings confusion, part 1 Unfortunately that commit failed to take into account that the lvds code does som

Re: [Intel-gfx] [PATCH] drm/i915: [GEN7] Use HW scheduler for fixed function shaders

On Sun, 15 Apr 2012 11:55:36 -0300 Eugeni Dodonov wrote: > On Sat, Apr 14, 2012 at 22:41, Ben Widawsky wrote: > > > This originally started as a patch from Bernard as a way of simply > > setting the VS scheduler. After submitting the RFC patch, we > > decided to also modify the DS scheduler. To

Re: [Intel-gfx] HDMI TV doesn't work over HDMI cable

On Sat, Apr 14, 2012 at 15:08, Dmitry Nezhevenko wrote: > Hi, > > I've got some really strange issue. I've followed GPU within ASUS MB: > > 00:02.0 VGA compatible controller: Intel Corporation Core Processor > Integrated Graphics Controller (rev 12) > > I'm trying to attach HDMI TV to it. My moth

Re: [Intel-gfx] [PATCH] drm/i915: don't clobber the special upscaling lvds timings

On Sat, Apr 14, 2012 at 13:17, Daniel Vetter wrote: > This regression has been introduced in > > commit ca9bfa7eed20ea34e862804e62aae10eb159edbb > Author: Daniel Vetter > Date: Sat Jan 28 14:49:20 2012 +0100 > >drm/i915: fixup interlaced vertical timings confusion, part 1 > > Unfortunately

Re: [Intel-gfx] [PATCH] drm/i915: don't clobber the special upscaling lvds timings

On Sat, Apr 14, 2012 at 14:05, Chris Wilson wrote: > And most of that concern is due to the fact that the modesetting code > seems to have evolved ad-hoc with very few sanity checks and no > overarching design. > Yep, I have to agree on that :(. -- Eugeni Dodonov __

Re: [Intel-gfx] [PATCH] drm/i915: [GEN7] Use HW scheduler for fixed function shaders

On Sat, Apr 14, 2012 at 22:41, Ben Widawsky wrote: > This originally started as a patch from Bernard as a way of simply > setting the VS scheduler. After submitting the RFC patch, we decided to > also modify the DS scheduler. To be most explicit, I've made the patch > explicitly set all scheduler

[Intel-gfx] [PATCH] drm/i915: Refactor the deferred PM_IIR handling into a single function

This function, along with the registers and deferred work hander, are all shared with SandyBridge, IvyBridge and their variants. So remove the duplicate code into a single function. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 70 +-- 1

Re: [Intel-gfx] [PATCH 1/3] drm/i915: close PM interrupt masking races in the irq handler

Ping. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43107 -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx