[Intel-gfx] [PATCH] drm/i915: Fixed VS thread distribution between slices

2012-04-09 Thread Ben Widawsky
From: "bernard.r.kilarski" Full disclosure: my IVB hangs on nexuiz both before, and after this patch, and I haven't done any debug This patch was given to me by Bernard, by way of Daniel. The patch came with very little description, and I haven't really spent too much time in the spec to make mu

Re: [Intel-gfx] Updated -next

2012-04-09 Thread Sun, Yi
> Sun, I'm sorry for the additional work, but please re-run any gpu render and > performance testing on this new branch. Modeset issues and output testing > should not be affected by this, so there's no need to re-run these tests you > have already done on the old -testing branch. That's all righ

Re: [Intel-gfx] [PATCH] Mask reserved bits in display/sprite address registers

2012-04-09 Thread Daniel Vetter
On Mon, Apr 09, 2012 at 03:48:03PM +, Reese, Armin C wrote: > Thanks for the review, Ben. > > Yes, I was a bit paranoid about what values could be in gtt_offset. But > if it's always a multiple of 0x1000, we can save an additional mask > operation. I'll make the change and resubmit. And a sm

Re: [Intel-gfx] [PATCH] Revert "drm/i915: reenable gmbus on gen3+ again"

2012-04-09 Thread Chris Wilson
On Mon, 9 Apr 2012 21:10:38 +0200, Daniel Vetter wrote: > This reverts commit c3dfefa0a6d235bd465309e12f4c56ea16e7. > > gmbus in 3.4 has simply too many known issues: > - gmbus is too noisy, we need to rework the logging: > https://bugs.freedesktop.org/show_bug.cgi?id=48248 > - zero-lengh

[Intel-gfx] [PATCH] Revert "drm/i915: reenable gmbus on gen3+ again"

2012-04-09 Thread Daniel Vetter
This reverts commit c3dfefa0a6d235bd465309e12f4c56ea16e7. gmbus in 3.4 has simply too many known issues: - gmbus is too noisy, we need to rework the logging: https://bugs.freedesktop.org/show_bug.cgi?id=48248 - zero-lenght writes cause an OOPS, and they are userspace-triggerable: https:/

Re: [Intel-gfx] [PATCH] drm/i915: Finish any pending operations on the framebuffer before disabling

2012-04-09 Thread Daniel Vetter
On Tue, Apr 03, 2012 at 02:04:42PM -0300, Eugeni Dodonov wrote: > On Tue, Apr 3, 2012 at 13:58, Chris Wilson wrote: > > > + /* Flush any pending WAITs before we disable the pipe. Note that > > +* we need to drop the struct_mutex in order to acquire it again > > +* during the

Re: [Intel-gfx] [PATCH] Removed IVB forced enable of sprite dest key

2012-04-09 Thread Daniel Vetter
On Thu, Apr 05, 2012 at 08:43:57PM +, Reese, Armin C wrote: > The patch file for this change is attached. Had to send it from Outlook > and wanted to avoid corrupting the patch. Hence, the attachment. Patch merged to -fixes, with Jesse's ack added and your sob line fixed up. Thanks, Daniel -

Re: [Intel-gfx] [PATCH] drm/i915: IS_GEN6 && IS_GEN7 - is unpossible

2012-04-09 Thread Jesse Barnes
On Mon, 9 Apr 2012 18:02:11 +0200 Daniel Vetter wrote: > On Sat, Apr 07, 2012 at 01:58:11PM -0700, Ben Widawsky wrote: > > On Sat, 07 Apr 2012 13:48:30 -0700 > > Jesse Barnes wrote: > > > > > Ben Widawsky wrote: > > > > > > >Imagine my surprise when tracking something down, I bisected to a VL

Re: [Intel-gfx] Updated -next

2012-04-09 Thread Daniel Vetter
On Thu, Apr 05, 2012 at 11:45:29AM +0200, Daniel Vetter wrote: > Hi all, > > I've pushed out a new -next and testing tree. Highlights: > - first batch of hsw enabling (Eugeni) > - first batch of vlv enabling (Jesse and others) > - a few cleanups spurred by the above items > - pwrite/pread rework a

Re: [Intel-gfx] [PATCH] drm/i915: IS_GEN6 && IS_GEN7 - is unpossible

2012-04-09 Thread Daniel Vetter
On Sat, Apr 07, 2012 at 01:58:11PM -0700, Ben Widawsky wrote: > On Sat, 07 Apr 2012 13:48:30 -0700 > Jesse Barnes wrote: > > > Ben Widawsky wrote: > > > > >Imagine my surprise when tracking something down, I bisected to a VLV > > >commit. > > > > > >CC: Jesse Barnes > > >Signed-off-by: Ben Wid

Re: [Intel-gfx] [PATCH] Mask reserved bits in display/sprite address registers

2012-04-09 Thread Reese, Armin C
Thanks for the review, Ben. Yes, I was a bit paranoid about what values could be in gtt_offset. But if it's always a multiple of 0x1000, we can save an additional mask operation. I'll make the change and resubmit. Armin -Original Message- From: Ben Widawsky [mailto:b...@bwidawsk.net]

[Intel-gfx] [PATCH] drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g

2012-04-09 Thread Chris Wilson
The 845g shares the errata with i830 whereby executing a command within 2 cachelines of the end of the ringbuffer may cause a GPU hang. Signed-off-by: Chris Wilson Cc: sta...@kernel.org --- drivers/gpu/drm/i915/intel_ringbuffer.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --g