[Intel-gfx] [PATCH][rebased] drm/i915: set AUD_CONFIG N_value_index for DisplayPort

2012-01-28 Thread Wu Fengguang
It should be programmed to "0" for HDMI or "1" for DisplayPort. This enables DisplayPort audio for - HP EliteBook 8460p (whose BIOS does not set the N_value_index bit for us) - DisplayPort monitor hot plugged after boot (otherwise most BIOS will fill the N_value_index bit for us) Tested-by:

Re: [Intel-gfx] [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT

2012-01-28 Thread Keith Packard
On Sat, 28 Jan 2012 12:07:55 +0100, Daniel Vetter wrote: > Alfonso reported back that this does indeed fix up his "black screen on > boot" issues when the bios sets up the hdmi connector with an interlaced > mode. Can you pick this patch up for -fixes if it musters your review? Looks good. I've

[Intel-gfx] [PATCH] drm/i915: fixup overlay checks for interlaced modes

2012-01-28 Thread Daniel Vetter
The drm core _really_ likes to frob around with the crtc timings and put halfed vertical timings (in fields) in there. Which confuses the overlay code, resulting in it's refusal to display anything at the lower half of an interlaced pipe. Tested-by: Christopher Egert Signed-Off-by: Daniel Vetter

[Intel-gfx] VAAPI (master or ext) no deinterlacing with Clarkdale GPU

2012-01-28 Thread atechsystem
Hi, I tried the vaapi master and ext-libary including the vaapi-intel-driver from your repository. My Hardware: - intel Clarkdale Core I3 540 / I5 661 (I have two different systems) - H55 chipset - TV over HDMI @ 50Hz Software: - Arch Linux 64 Bit with: - Kernel: linux 3.1.9-2 (ba

Re: [Intel-gfx] [PATCH 0/8] interlaced support v2

2012-01-28 Thread Alfonso Fiore
On Sat, Jan 28, 2012 at 2:49 PM, Daniel Vetter wrote: > Hi all, > > These are the patches I'd like to queue to -next for interlaced support. Needs > the patch "fixup interlaced bits clearing in PIPECONF on PCH_SPLIT" and also > the > drm core fix "drm/modes: do not enforce an odd vtotal for inter

Re: [Intel-gfx] [PATCH 0/8] interlaced support v2

2012-01-28 Thread Daniel Vetter
On Sat, Jan 28, 2012 at 02:49:18PM +0100, Daniel Vetter wrote: > Hi all, > > These are the patches I'd like to queue to -next for interlaced support. Needs > the patch "fixup interlaced bits clearing in PIPECONF on PCH_SPLIT" and also > the > drm core fix "drm/modes: do not enforce an odd vtotal

Re: [Intel-gfx] [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT

2012-01-28 Thread Paulo Zanoni
2012/1/26 Daniel Vetter : > An identical patch has been merged for i9xx_crtc_mode_set: > > ommit 59df7b1771c150163e522f33c638096ab0efbf42 > Author: Christian Schmidt > Date:   Mon Dec 19 20:03:33 2011 +0100 > >    drm/intel: Fix initialization if startup happens in interlaced mode [v2] > > But tha

Re: [Intel-gfx] [PATCH 0/8] interlaced support v2

2012-01-28 Thread Paulo Zanoni
Hi 2012/1/28 Daniel Vetter : > Hi all, > > http://cgit.freedesktop.org/~danvet/drm/log/?h=interlaced Reviewed-by: Paulo Zanoni Tested-by: Paulo Zanoni So far, tested on ILK and SNB. Your series contains 8 patches, but your branch contains 10. - Patch "drm/i915: fixup interlaced bits clearing

Re: [Intel-gfx] [PATCH 0/4] [CFT] interlaced support

2012-01-28 Thread Daniel Vetter
On Sat, Jan 28, 2012 at 11:46:10AM +0100, Alfonso Fiore wrote: > On Sat, Jan 28, 2012 at 11:21 AM, Peter Ross wrote: > > Great job guys. > > I can only quote. :) > Thank you SO MUCH Daniel, Peter, Paulo and Angela. Well, thanks for getting the ball rolling and for all the testing. I've just sent

[Intel-gfx] [PATCH 8/8] drm/i915: allow interlaced mode output on the HDMI connector

2012-01-28 Thread Daniel Vetter
From: Peter Ross Signed-off-by: Peter Ross Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_hdmi.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 64541f7..086288e 100644 --- a/dri

[Intel-gfx] [PATCH 7/8] drm/i915: allow interlaced mode output on the SDVO connector

2012-01-28 Thread Daniel Vetter
From: Peter Ross Signed-off-by: Peter Ross Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_sdvo.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 5b480bb..80fb5da 100644 --- a/dri

[Intel-gfx] [PATCH 6/8] drm/i915: correctly program the VSYNCSHIFT register

2012-01-28 Thread Daniel Vetter
The hw seems to use this to correctly insert the required delay before/after an even/odd interlaced field. This might also explain why we need to substract 1 half-line from vtotal - if the hw just adds the delay programmend in VSYNCSHIFT the total frame time would be about that too long. These reg

[Intel-gfx] [PATCH 5/8] drm/i915: don't allow interlaced pipeconf on gen2

2012-01-28 Thread Daniel Vetter
gen2 doesn't support it, so be a bit more paranoid and add a check to ensure that we never ever set an unsupported interlaced bit. Ensure that userspace can't set an interlaced mode by resetting interlace_allowed for the crt on gen2. dvo and lvds are the only other encoders that gen2 supports and

[Intel-gfx] [PATCH 4/8] drm/i915: fixup interlaced support on ilk+

2012-01-28 Thread Daniel Vetter
According to Paulo Zanoni, this is what windows does. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d108146..e7c915

[Intel-gfx] [PATCH 3/8] drm/i915: fixup interlaced vertical timings confusion, part 2

2012-01-28 Thread Daniel Vetter
According to bspec, we need to subtract an additional line from vtotal for interlaced modes and vblank_end needs to equal vtotal. All other timing fields do not need this special treatment, so kill it. Bspec says that this is irrespective of whether the interlaced mode has an odd or even vtotal, b

[Intel-gfx] [PATCH 2/8] drm/i915: fixup interlaced vertical timings confusion, part 1

2012-01-28 Thread Daniel Vetter
We have a pretty decent confusion about vertical timings of interlaced modes. Peter Ross has written a patch that makes interlace modes work on a lot more platforms/output combinations by doubling the vertical timings. The issue with that patch is that core drm _does_ support specifying whether we

[Intel-gfx] [PATCH 0/8] interlaced support v2

2012-01-28 Thread Daniel Vetter
Hi all, These are the patches I'd like to queue to -next for interlaced support. Needs the patch "fixup interlaced bits clearing in PIPECONF on PCH_SPLIT" and also the drm core fix "drm/modes: do not enforce an odd vtotal for interlaced modes" if you want to use interlaced modelines with an even v

[Intel-gfx] [PATCH 1/8] drm/i915: clean up interlaced pipeconf bit definitions

2012-01-28 Thread Daniel Vetter
- Clarify which bits are for which chips. - Note that gen2 can't do interlaced directly (only via dvo tv chips). - Move the mask to the top to make it clearer how wide this field is. - Add defintions for all possible values. This patch doesn't change any code. v2: Paulo Zanoni pointed out that th

Re: [Intel-gfx] [PATCH 0/4] [CFT] interlaced support

2012-01-28 Thread Daniel Vetter
On Sat, Jan 28, 2012 at 02:52:21AM +0100, Alfonso Fiore wrote: > On Fri, Jan 27, 2012 at 10:41 PM, Daniel Vetter wrote: > > > > Paulo and me have crawled around in interlaced-land some more > > I just came home ready to test my compiled kernel but when I read this > message I thought I should dow

Re: [Intel-gfx] [PATCH] drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT

2012-01-28 Thread Daniel Vetter
On Thu, Jan 26, 2012 at 08:42:50PM +0100, Daniel Vetter wrote: > An identical patch has been merged for i9xx_crtc_mode_set: > > ommit 59df7b1771c150163e522f33c638096ab0efbf42 > Author: Christian Schmidt > Date: Mon Dec 19 20:03:33 2011 +0100 > > drm/intel: Fix initialization if startup hap

Re: [Intel-gfx] [PATCH 0/4] [CFT] interlaced support

2012-01-28 Thread Peter Ross
On Fri, Jan 27, 2012 at 06:43:06PM +0100, Daniel Vetter wrote: > On Fri, Jan 27, 2012 at 02:25:49PM -0200, Paulo Zanoni wrote: > > Ok, so I had to look at the Windows registers again... > > > > Your "interlaced" branch had 6 patches. Patch 3 is the only one I > > changed. Here is my version: > > h