This adds a new function intel_drm_get_valid_edid, which is used instead
of drm_get_edid within the i915 driver.
It does a similar check to the one in previous patch, but it is limited to
i915 driver.
The check is similar to the first part of EDID discovery performed by the
drm_do_probe_ddc_edid.
This allows to avoid talking to a non-existent bus repeatedly until we
finally timeout. The non-existent bus is signalled by -ENXIO error,
provided by i2c_algo_bit:bit_doAddress call.
As the advantage of such change, all the other routines which use
drm_get_edid would benefit for this timeout.
As
(Resending with small improvements - also sending to dri-devel for feedback).
This is the the forth iteration of potential fixes for slow edid detection
issues over non-existent outputs
(https://bugs.freedesktop.org/show_bug.cgi?id=41059) - the previous versions
were posted to the bug and were use
This was pulled out of the per ring error handling patch series as it
actually fixes two issues, and bikeshedding appears to be going on
there.
First, remove setting hangcheck_count when we do notify ring. While it
seems counterintuitive to be setting up a timer to catch hangcheck_count
greater th
Hello,
I have a Dell XPS laptop with a GMA X3100 graphics core (GM965 chipset).
My understanding is that this core supports MPEG-2 offloading and I'm
trying to make use of this feature.
Enabling XvMC:
--
I added the following ilne to the "Device" section of xorg.conf:
Option
Signed-off-by: Adam Jackson
---
drivers/gpu/drm/i915/intel_display.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 67dbe22..3e4f25d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++
All gen5+ parts are PCH (so far anyway), so just say so.
Signed-off-by: Adam Jackson
---
drivers/gpu/drm/i915/i915_drv.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7916bd9..f78d51c 100644
--- a
For transcoder A, we would never clear the DPLL[AB] select bit. If the
firmware had set us up on DPLLB, the effect would be to attempt to use
DPLLB for both pipes A and B, which would probably be bad.
Signed-off-by: Adam Jackson
---
drivers/gpu/drm/i915/intel_display.c |2 +-
1 files change
Signed-off-by: Adam Jackson
---
drivers/gpu/drm/i915/intel_display.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b73150f..9edf363 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++
Signed-off-by: Adam Jackson
---
drivers/gpu/drm/i915/intel_display.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 04411ad..b73150f 100644
--- a/drivers/gpu/drm/i915/intel_display.
Just a few things spotted in a readthrough. The DPLL disable one might
actually be a bugfix, who knows.
- ajax
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On Fri, 7 Oct 2011 15:52:01 +0200, Daniel Vetter wrote:
> On Tue, Oct 04, 2011 at 02:11:51PM -0700, Ben Widawsky wrote:
> > V1: Just added per ring page faults
> > Reviewed-by: Daniel Vetter
> >
> > V2: Added much more per ring stuff
> > Signed-off-by: Ben Widawsky
>
> While you wrestle this,
On Fri, Oct 7, 2011 at 11:08, Jesse Barnes wrote:
> On Thu, 6 Oct 2011 20:30:35 -0300
> Eugeni Dodonov wrote:
>
> > From: Eugeni Dodonov
> >
> > This allows to avoid talking to a non-existent bus repeatedly until we
> > finally timeout. The non-existent bus is signalled by -ENXIO error,
> > pr
On Thu, 6 Oct 2011 20:30:35 -0300
Eugeni Dodonov wrote:
> From: Eugeni Dodonov
>
> This allows to avoid talking to a non-existent bus repeatedly until we
> finally timeout. The non-existent bus is signalled by -ENXIO error,
> provided by i2c_algo_bit:bit_doAddress call.
>
> As the advantage o
On Tue, Oct 04, 2011 at 02:11:53PM -0700, Ben Widawsky wrote:
> Ring kick was racy (forcewake), and doesn't really do anything for us
> that shouldn't be done by reset.
>
> Signed-off-by: Ben Widawsky
> ---
> drivers/gpu/drm/i915/i915_irq.c | 41
> ---
> 1
On Tue, Oct 04, 2011 at 02:11:52PM -0700, Ben Widawsky wrote:
> On Gen6+ we have other rings which may be in use. We haven't hung if the
> blit or media ring is still going
>
> Before rebase:
> Reviewed-by: Daniel Vetter
> Signed-off-by: Ben Widawsky
I've spotted another goof-up besides the ins
On Tue, Oct 04, 2011 at 02:11:51PM -0700, Ben Widawsky wrote:
> V1: Just added per ring page faults
> Reviewed-by: Daniel Vetter
>
> V2: Added much more per ring stuff
> Signed-off-by: Ben Widawsky
While you wrestle this, can we cut down on the line-noise a bit by using
ring->mmio_base an per-r
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