[Intel-gfx] [Mesa-dev] [PATCH 6/6] i965: Set breakpoints

2011-06-19 Thread Ben Widawsky
Add the breakpoint flag for all instructions when doing wm shader debugging. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_wm.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c inde

[Intel-gfx] [Mesa-dev] [PATCH 5/6] i965: function to emit breakpoints

2011-06-19 Thread Ben Widawsky
Provide a function to allow emitting breakpoints in the instruction qword. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_eu.c |6 ++ src/mesa/drivers/dri/i965/brw_eu.h |1 + 2 files changed, 7 insertions(+), 0 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_e

[Intel-gfx] [Mesa-dev] [PATCH 4/6] i965: setup system routine

2011-06-19 Thread Ben Widawsky
Upload the system routine as part of the invariant state if debugging. Remove SIP setting if not debugging to make it more friendly for others that may be debugging shaders or media kernels. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_misc_state.c | 24 +++---

[Intel-gfx] [Mesa-dev] [PATCH 3/6] i965: Move register spill offsets

2011-06-19 Thread Ben Widawsky
Since the debug system routine will share scratch space with threads doing register spilling, we must offset the registers to accomodate. This is more easily accomplished (and less bug prone) in Mesa, so there you go... Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_fs_emit.cpp |

[Intel-gfx] [Mesa-dev] [PATCH 2/6] i965: copy in system routine, reserve extra scratch

2011-06-19 Thread Ben Widawsky
The debugger shared memory needs to be a fixed size. Since this is scratch memory that is already used by register spilling, add appropriate hooks to do the right thing when debugging. Also copy in a binary blob system routine based on an environment variable. This blob will need to be relocated,

[Intel-gfx] [Mesa-dev] [PATCH 1/6] i965: step message register allocation

2011-06-19 Thread Ben Widawsky
The system routine requires m0 be reserved. for saving off architectural state. Moved the allocation to start at 2 instead of 0. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 10 +- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mesa

[Intel-gfx] i965 fs shader debugging

2011-06-19 Thread Ben Widawsky
These are the mesa patches that go with the patches that I posted to intel-gfx for intel-gpu-tools: <1308080767-21176-1-git-send-email-...@bwidawsk.net> which begin to allow HW supported shader debugging on Gen6 and above. I'll send out a big patch series with all the components when ready, but I

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Kill GTT mappings when moving from GTT domain"

2011-06-19 Thread Chris Wilson
On Sun, 19 Jun 2011 14:20:14 -0700, Eric Anholt wrote: > On Sun, 19 Jun 2011 18:14:11 +0100, Chris Wilson > wrote: > > On Sun, 19 Jun 2011 10:01:23 -0700, Eric Anholt wrote: > > > On Sun, 19 Jun 2011 17:28:11 +0100, Chris Wilson > > > wrote: > > > > For lack of a better mechanism. Even using

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Kill GTT mappings when moving from GTT domain"

2011-06-19 Thread Eric Anholt
On Sun, 19 Jun 2011 18:14:11 +0100, Chris Wilson wrote: > On Sun, 19 Jun 2011 10:01:23 -0700, Eric Anholt wrote: > > On Sun, 19 Jun 2011 17:28:11 +0100, Chris Wilson > > wrote: > > > For lack of a better mechanism. Even using anholt/gtt-revert, I question > > > the value of caching the GTT map

Re: [Intel-gfx] Gfx problem on P8Z68-V Pro/i7-2600K

2011-06-19 Thread Mark Knecht
Great work folks! With the updates suggested on your 2011Q1 web page my user reports everything looks really good. Cheers, Mark On Sat, Jun 18, 2011 at 5:00 PM, Mark Knecht wrote: > Found this a few minutes ago so I'll work on at least getting to this point. > > http://intellinuxgraphics.org/20

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Kill GTT mappings when moving from GTT domain"

2011-06-19 Thread Chris Wilson
On Sun, 19 Jun 2011 10:01:23 -0700, Eric Anholt wrote: > On Sun, 19 Jun 2011 17:28:11 +0100, Chris Wilson > wrote: > > For lack of a better mechanism. Even using anholt/gtt-revert, I question > > the value of caching the GTT mapping in drm_intel_bo. For the cairo-gl and > > pts benchmarks I've r

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Kill GTT mappings when moving from GTT domain"

2011-06-19 Thread Eric Anholt
On Sun, 19 Jun 2011 17:28:11 +0100, Chris Wilson wrote: > On Sat, 18 Jun 2011 13:20:05 -0700, Eric Anholt wrote: > > On Sat, 18 Jun 2011 12:43:58 +0100, Chris Wilson > > wrote: > > > On Fri, 17 Jun 2011 12:06:54 -0700, Eric Anholt wrote: > > > > On Wed, 15 Jun 2011 17:03:58 +0100, Chris Wilso

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Kill GTT mappings when moving from GTT domain"

2011-06-19 Thread Chris Wilson
On Sat, 18 Jun 2011 13:20:05 -0700, Eric Anholt wrote: > On Sat, 18 Jun 2011 12:43:58 +0100, Chris Wilson > wrote: > > On Fri, 17 Jun 2011 12:06:54 -0700, Eric Anholt wrote: > > > On Wed, 15 Jun 2011 17:03:58 +0100, Chris Wilson > > > wrote: > > > > Moving back to LLC+semaphores (2.6.39-rc2+)