Re: [Intel-gfx] [PATCH] drm/i915: fix user irq miss in BSD ring on g4x

2011-05-15 Thread Feng, Boqun
Thanks for your advice. Maybe my patch log fail to _clearly_ show that there are _two_ differences about irq control interface between gen4 and gen5 > -Original Message- > From: Keith Packard [mailto:kei...@keithp.com] > Sent: Friday, May 13, 2011 11:08 PM > To: Feng, Boqun; intel-gfx@list

Re: [Intel-gfx] [PATCH] drm/i915: Revert i915.semaphore=1 default from 47ae63e0

2011-05-15 Thread Keith Packard
On Fri, 13 May 2011 12:14:54 -0400, Andy Lutomirski wrote: > -unsigned int i915_semaphores = 1; > +unsigned int i915_semaphores = 0; > module_param_named(semaphores, i915_semaphores, int, 0600); Acked-by: Keith Packard -- keith.pack...@intel.com pgphrzmB2DHbN.pgp Description: PGP signature

Re: [Intel-gfx] [PATCH 14/16] drm/i915: Use PCI-ID to identify Broadwater and Crestline

2011-05-15 Thread Keith Packard
On Sun, 15 May 2011 22:49:02 +0200, Daniel Vetter wrote: > I actually like this: I saves one needless indirection when reading > codepaths and trying to find out what code is run for a given pci id. > Also, these two bits seem to be the only ones that are used in only _one_ > device type, which i

Re: [Intel-gfx] [PATCH 12/16] drm/915: fix relaxed tiling on gen2: tile height

2011-05-15 Thread Keith Packard
On Sun, 15 May 2011 22:43:41 +0200, Daniel Vetter wrote: > No problem for old userspace. This only changes the number of rows from 32 > to 16. This value is used in the kernel to align buffers correctly, i.e. > it will save perhaps a tiny bit of gtt. Userspace on the other hand > assumed only 8 r

Re: [Intel-gfx] Status of WebGL with open-source intel drivers

2011-05-15 Thread Robert Kaiser
Clemens Eisserer schrieb: Whats the current state of WebGL on various browsers with the open-source intel driver? I have a i945GM based machine running Fedora-14, and no matter which browser I try (FireFox4, Chrome, Opera) - all tell me WebGL has been disabled. Even disabling sanity checks in F

Re: [Intel-gfx] [PATCH 14/16] drm/i915: Use PCI-ID to identify Broadwater and Crestline

2011-05-15 Thread Daniel Vetter
On Thu, May 12, 2011 at 06:16:00PM -0700, Keith Packard wrote: > On Thu, 12 May 2011 22:17:22 +0100, Chris Wilson > wrote: > > > ... as they only had a single PCI-ID each, and so using the pci-id is > > easier than using a capability bit. > > This doesn't seem useful to me; it only saves a coup

Re: [Intel-gfx] [PATCH 12/16] drm/915: fix relaxed tiling on gen2: tile height

2011-05-15 Thread Daniel Vetter
On Thu, May 12, 2011 at 06:13:32PM -0700, Keith Packard wrote: > On Thu, 12 May 2011 22:17:20 +0100, Chris Wilson > wrote: > > From: Daniel Vetter > > > > A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. > > > > Userspace was broken and assumed 8 rows. Chris Wilson noted that

Re: [Intel-gfx] [PATCH 11/16] drm/i915: not finding a fence is a non-recoverable condition

2011-05-15 Thread Daniel Vetter
On Thu, May 12, 2011 at 06:10:08PM -0700, Keith Packard wrote: > On Thu, 12 May 2011 22:17:19 +0100, Chris Wilson > wrote: > > > - return -ENOSPC; > > + return -EDEADLK; > > Would be nice to have the kernel print out a debugging message at this > point -- the only way to hit

Re: [Intel-gfx] [PATCH 02/16] drm/i915: Refactor pwrite/pread to use single copy of get_user_pages

2011-05-15 Thread Keith Packard
On Sun, 15 May 2011 09:00:51 +0100, Chris Wilson wrote: > We're not performing the same trick as drm_malloc_ab() here though, since > this is only used for a temporary allocation we try to consume any > high-order pages, rather than building an array of order-0 pages, knowing > that they will be

Re: [Intel-gfx] [PATCH 02/16] drm/i915: Refactor pwrite/pread to use single copy of get_user_pages

2011-05-15 Thread Chris Wilson
On Thu, 12 May 2011 17:21:50 -0700, Keith Packard wrote: > On Thu, 12 May 2011 22:17:10 +0100, Chris Wilson > wrote: > > > + pages = kmalloc(n*sizeof(struct page *), > > + GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN); > > + if (pages == NULL) { > > + pages = drm_ma