Re: [Intel-gfx] Sandy Bridge X crash - OpenGL/DPMS-related?

2011-03-26 Thread Cyril Brulebois
Hi, Ian Pilcher (26/03/2011): > Fedora 15 Alpha on a brand new Sandy Bridge system (Core i7 2600 > with "Intel HD" graphics). Running KDE and using GLMatrix > screensaver. Fedora might have a better doc but… > (I have installed the relevant debuginfo packages and reproduced the > crash, but th

Re: [Intel-gfx] [PATCH] drm/i915: fix relaxed tiling on gen2 v2

2011-03-26 Thread Chris Wilson
On Sat, 26 Mar 2011 20:55:15 +0100, Daniel Vetter wrote: > A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Nice patch, marries the code to the documentation (afaict). Should split it into its two distinct fixes though. Both -next material, perhaps. And thankfully explains the

Re: [Intel-gfx] enabling forcewake from userspace

2011-03-26 Thread Chris Wilson
On Sat, 26 Mar 2011 12:27:17 -0700, Ben Widawsky wrote: > On Sat, Mar 26, 2011 at 05:18:57PM +, Chris Wilson wrote: > > > > The GPU is definitely allowed to be powered down whilst the CPU is > > servicing an interrupt. ;-) I take your point though that the current > > method is not interrupt

[Intel-gfx] [PATCH] drm/i915: fix relaxed tiling on gen2 v2

2011-03-26 Thread Daniel Vetter
A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Userspace was broken and assumed 8 rows. Chris Wilson noted that the kernel unfortunately can't reliable check that because libdrm rounds up the size to the next bucket. He also clarified (by checking internal docs) that only i855

[Intel-gfx] Sandy Bridge X crash - OpenGL/DPMS-related?

2011-03-26 Thread Ian Pilcher
Fedora 15 Alpha on a brand new Sandy Bridge system (Core i7 2600 with "Intel HD" graphics). Running KDE and using GLMatrix screensaver. When I unlocked the system this morning, the password entry dialog was not displayed correctly. When I pressed a key, only the password entry field became visib

Re: [Intel-gfx] enabling forcewake from userspace

2011-03-26 Thread Ben Widawsky
On Sat, Mar 26, 2011 at 05:18:57PM +, Chris Wilson wrote: > > The GPU is definitely allowed to be powered down whilst the CPU is > servicing an interrupt. ;-) I take your point though that the current > method is not interrupt safe. However, we should not be doing such work > from an interrupt

Re: [Intel-gfx] [PATCH] drm/i915: fix relaxed tiling on gen2

2011-03-26 Thread Chris Wilson
On Sat, 26 Mar 2011 15:22:57 +0100, Daniel Vetter wrote: > A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. You know thats what it says in the gen2 docs as well under FENCE. :( > Userspace was broken and assumed 8 rows. Complain with a printk_once > and disallow such tiling r

Re: [Intel-gfx] Graphical corruption post 2.6.38

2011-03-26 Thread Chris Wilson
On Sat, 26 Mar 2011 13:26:54 +, Colin Guthrie wrote: > Still see a couple weird bits occasionally but I've only seen then in > Firefox on font glyphs so I think that's a FF problem - it certainly > doesn't seem to be generic like the one that patch fixes. Hopefully > it'll go into 2.6.38.2 :)

Re: [Intel-gfx] enabling forcewake from userspace

2011-03-26 Thread Chris Wilson
On Sat, 26 Mar 2011 08:46:25 -0700, Ben Widawsky wrote: > I think I won't bother trying to upstream my solution. But I'm also > thinking we should make intel_reg_read/write print a warning/error if > it's running on GEN6? What do you think? Adding a code comment or an if (IS_GEN6 && reg < 0x4

[Intel-gfx] YCbCr colourspace output

2011-03-26 Thread Steven Newbury
I'm connecting a D525 (Pineview) based system to an older "HD" (1366x768) Phillips TV. I has a DVI connector for HD input, but whether I connect it using the VGA->DVI or HDMI->DVI the TV detects the incomming signal as from a PC and selects a "XGA" mode, limiting the screen format to aspects and

Re: [Intel-gfx] enabling forcewake from userspace

2011-03-26 Thread Ben Widawsky
On Sat, Mar 26, 2011 at 07:11:55AM +, Chris Wilson wrote: > On Fri, 25 Mar 2011 19:23:58 -0700, Ben Widawsky wrote: > > The only other option floating around is IOCTLs to read/write the > > registers, which previously seemed like a bad idea, but is now looking > > like the only option. > > Th

[Intel-gfx] [PATCH] drm/i915: fix relaxed tiling on gen2

2011-03-26 Thread Daniel Vetter
A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Userspace was broken and assumed 8 rows. Complain with a printk_once and disallow such tiling requests. Also experiments and randoms cues from i81x docs suggest that y-tiling doesn't work with fences (it's already known to be brok

Re: [Intel-gfx] Graphical corruption post 2.6.38

2011-03-26 Thread Colin Guthrie
'Twas brillig, and Chris Wilson at 23/03/11 18:51 did gyre and gimble: > On Wed, 23 Mar 2011 19:35:56 +0100, Tino Keitel > wrote: >> On Wed, Mar 23, 2011 at 14:08:24 +, Chris Wilson wrote: >>> commit 29c5a587284195278e233eec5c2234c24fb2c204 >>> Author: Chris Wilson >>> Date: Thu Mar 17 15:

Re: [Intel-gfx] [PATCH] drm/i915: Round-up GTT allocations for unfenced surfaces to the next tile row

2011-03-26 Thread Chris Wilson
On Sat, 26 Mar 2011 10:20:21 +0100, Daniel Vetter wrote: > On Sat, Mar 26, 2011 at 08:52:31AM +, Chris Wilson wrote: > > However, I'm not sure if this truly prevents the corruption on i8xx with > > 2.14.0. Can somebody break out an old machine and test? > > It won't (assuming I correctly diag

Re: [Intel-gfx] [PATCH] drm/i915: Round-up GTT allocations for unfenced surfaces to the next tile row

2011-03-26 Thread Daniel Vetter
On Sat, Mar 26, 2011 at 08:52:31AM +, Chris Wilson wrote: > However, I'm not sure if this truly prevents the corruption on i8xx with > 2.14.0. Can somebody break out an old machine and test? It won't (assuming I correctly diagnosed the problem): Corruptions happen because i8xx uses copies of t

Re: [Intel-gfx] [PATCH] drm/i915: Round-up GTT allocations for unfenced surfaces to the next tile row

2011-03-26 Thread Chris Wilson
On Fri, 25 Mar 2011 12:16:25 +, Chris Wilson wrote: > We ensure that an allocated region within the GTT matches the proposed > usage restrictions. For fenced buffers on old hardware, this means > rounding up the allocation to the next power of two size and aligning it > to that size. For unfe

Re: [Intel-gfx] enabling forcewake from userspace

2011-03-26 Thread Chris Wilson
On Fri, 25 Mar 2011 19:23:58 -0700, Ben Widawsky wrote: > The only other option floating around is IOCTLs to read/write the > registers, which previously seemed like a bad idea, but is now looking > like the only option. The lazy option is to cross your fingers and do the forced-wake from userspa