Re: [Intel-gfx] [PATCH] drm/i915: Busy-spin wait_for condition in atomic contexts

On Thu, 24 Mar 2011 19:55:59 +, Chris Wilson wrote: > - if (W && !in_dbg_master()) msleep(W); \ > + if (W && !(in_dbg_master() || in_atomic())) msleep(W); \ If the MSLEEP macro were ever used, would it need the same fix? wait_for_atomic is never u

Re: [Intel-gfx] xf86-video-intel: 3 commits - src/intel_display.c src/intel_dri.c src/intel.h

On Fri, 25 Mar 2011 00:57:10 +0100, Julien Cristau wrote: > With that change, > Reviewed-by: Julien Cristau Thanks for catching my bugs before they caused any damage... Pushed. ec133ab..7ccbec8 master -> master -- keith.pack...@intel.com pgpJ72WCEledy.pgp Description: PGP signature ___

Re: [Intel-gfx] xf86-video-intel: 3 commits - src/intel_display.c src/intel_dri.c src/intel.h

On Thu, Mar 24, 2011 at 16:52:25 -0700, Keith Packard wrote: > On Thu, 24 Mar 2011 19:31:03 +0100, Julien Cristau > wrote: > > > This will cause a double free as the blit_fallback path does it too. > > Argh! So we need to check before we reference the buffers and set > swap_info to NULL. This

Re: [Intel-gfx] xf86-video-intel: 3 commits - src/intel_display.c src/intel_dri.c src/intel.h

On Thu, 24 Mar 2011 19:31:03 +0100, Julien Cristau wrote: > This will cause a double free as the blit_fallback path does it too. Argh! So we need to check before we reference the buffers and set swap_info to NULL. This code is too twisty... @@ -955,11 +960,16 @@ I830DRI2ScheduleSwap(ClientPtr c

[Intel-gfx] [PATCH] drm/i915: Busy-spin wait_for condition in atomic contexts

During modesetting, we need to wait for the hardware to report readiness by polling the registers. Normally, we call msleep() between reads, because some state changes may take a whole vblank or more to complete. However during a panic, we are in an atomic context and cannot sleep. Instead, busy sp

Re: [Intel-gfx] [PATCH 13/15] drm/i915: Implement GTT variants of pread

On Thu, 24 Mar 2011 10:44:40 -0700, Keith Packard wrote: > On Wed, 23 Mar 2011 17:30:22 +, Chris Wilson > wrote: > > > Right, so snooped pages goes through the shmem paths, nothing changes. Not > > everything is as nice as SNB and keeping the pages in the GTT is a benefit > > for everything

Re: [Intel-gfx] xf86-video-intel: 3 commits - src/intel_display.c src/intel_dri.c src/intel.h

On Thu, Mar 24, 2011 at 11:09:36 -0700, Keith Packard wrote: > diff --git a/src/intel_dri.c b/src/intel_dri.c > index 3b80823..f7a4fc4 100644 > --- a/src/intel_dri.c > +++ b/src/intel_dri.c > @@ -625,8 +625,10 @@ i830_dri2_add_frame_event(DRI2FrameEventPtr frame_event) > if (!AddResource(fra

Re: [Intel-gfx] [PATCH] drm/i915/lvds: Always return connected in the absence of better information

Reviewed-by: Keith Packard -- keith.pack...@intel.com pgpS0hlmwj2Q7.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] xf86-video-intel: 3 commits - src/intel_display.c src/intel_dri.c src/intel.h

On Thu, 24 Mar 2011 02:02:56 +0100, Julien Cristau wrote: > Hi Keith, > > a couple suggestions below from a quick look over these patches. Thanks for your review! > > static void > > intel_vblank_handler(int fd, unsigned int frame, unsigned int tv_sec, > > - unsigned int tv_u

Re: [Intel-gfx] [PATCH 13/15] drm/i915: Implement GTT variants of pread

On Wed, 23 Mar 2011 17:30:22 +, Chris Wilson wrote: > Right, so snooped pages goes through the shmem paths, nothing changes. Not > everything is as nice as SNB and keeping the pages in the GTT is a benefit > for everything else. Where's the data. -- keith.pack...@intel.com pgplGbyHNcVEY

Re: [Intel-gfx] Pineview + libva

Missed CC to list (forwarded) - Original message - From Steven Newbury Sent  Thu, 24 Mar 2011, 12:07:06 GMT To Sander Jansen Subject Re: [Intel-gfx] Pineview + libva > - Original message - > > On Tue, Mar 22, 2011 at 12:29 PM, Steven Newbury > > wrote: > > > On Tue, 2011-03-22

Re: [Intel-gfx] [PATCH 10/15] drm/i915: Invalidate fenced read domains upon flush

On Thu, 24 Mar 2011 23:52:43 +1000, Ted Phelps wrote: > Grr... Sorry, I've replied to the wrong patch. That one is fine. This > is the problematic one: > > commit fc8cf546f12a353bfd344bf922649c0d064fc3f0 Yeah, I have already rewritten that one. The current staging is surviving gem_stress

Re: [Intel-gfx] [PATCH 10/15] drm/i915: Invalidate fenced read domains upon flush

Ted Phelps writes: > Chris Wilson writes: > > Whenever we finish reading an object through a fence, for safety we > > clear any GPU read domain and so invalidate any TLBs associated with > > the fenced region upon its next use. > > This change is causing a regression on my Sandybridge CPU (i7 2600

Re: [Intel-gfx] [PATCH 10/15] drm/i915: Invalidate fenced read domains upon flush

Chris Wilson writes: > Whenever we finish reading an object through a fence, for safety we > clear any GPU read domain and so invalidate any TLBs associated with > the fenced region upon its next use. This change is causing a regression on my Sandybridge CPU (i7 2600K). The colours all look right

[Intel-gfx] [PATCH] drm/i915/lvds: Always return connected in the absence of better information

The LVDS connector should default to connected. We tried our best to verify the claims of the BIOS that the hardware exists during init(), and then during detect() we then try to verify that the panel is open. In the event of an unsucessful query, we should then always report that the LVDS panel is

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Dont save/restore hardware status page address register"

On Thu, 24 Mar 2011 09:41:27 +0800, Zhenyu Wang wrote: > We'd better only save/restore this for !I915_NEED_GFX_HWS(dev), > note that HWS_PGA is not valid hw status register for new chip, e.g gen6. Yes, but we should take it one step at a time. :) -Chris -- Chris Wilson, Intel Open Source Techno