Re: [Intel-gfx] [PATCH] Revert "drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on)."

On 2010.05.03 11:41:33 -0700, Carl Worth wrote: > On Thu, 29 Apr 2010 16:42:37 -0700, Eric Anholt wrote: > > Since it's only in -next right now, do you have plans to look into why > > this went wrong? I'm concerned that we're reverting a bugfix to > > "revisit later" with no plan to actually revi

[Intel-gfx] [PATCH] drm/i915: Fix PIPE_CONTROL command on Sandybridge

Sandybridge(Gen6) has new format for PIPE_CONTROL command, the flush and post-op control are in dword 1 now. This changes command length field for difference between Ironlake and Sandybridge. I tried to test this with noop request and issue PIPE_CONTROL command for each sequence and track notify i

Re: [Intel-gfx] [PATCH 1/4] introduce intel_ring_buffer structure

Hi, Thanks for reviewing the patch. To clarify, This patch is used for H.264/VC1 decoding. Abstract ring buffer is also needed for our later generation GPUs, Because there are more types of ring buffer to come. H.264/VC1 HW decoding is a bigger requirement than mepg2. XvMC VLD can only support

[Intel-gfx] [PATCH 1/2] drm/i915/dp: Only enable enhanced framing if the sink supports it

DisplayPort spec v1.1a, Table 2-52. Signed-off-by: Adam Jackson --- drivers/gpu/drm/i915/intel_dp.c |5 ++--- 1 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 77e40cf..78a75e8 100644 --- a/drivers/gpu/drm/i

[Intel-gfx] [PATCH 2/2] drm/i915/dp: Add DPCD data to debug output

Signed-off-by: Adam Jackson --- drivers/gpu/drm/i915/intel_dp.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 78a75e8..a1a6785 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i91

Re: [Intel-gfx] [PATCH] drm/i915/edp: Use fixed panel timing information from VBT

On Thu, 2010-05-13 at 10:46 +0800, Zhenyu Wang wrote: > On 2010.05.12 11:29:53 -0400, Adam Jackson wrote: > > eDP panels are often fixed-rate. Grab the link speed and lane count > > from the VBT and use those instead of trying to compute them. > > > > Signed-off-by: Adam Jackson > > --- > > Loo

Re: [Intel-gfx] [PATCH] drm/i915/edp: Use fixed panel timing information from VBT

ajax, thanks a lot for working on this! I've tried the patch but it doesn't fix my issue (I've updated the bug with dmesg output). Kind regards, Dick ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listi

[Intel-gfx] [PATCH] put intel gem buffer objects on diet (resend)

Hi Eric, I've managed to reproduce the problems due to my delayed tiling patch on my i945. Unfortunately I haven't yet tracked it down - seems to be there's a rather big misconception in my brain. Anyway here's the second patch of my shrink-gem_bo series rebased against current drm-intel-next. P

[Intel-gfx] [PATCH] drm/i915: combine all small integers into one single bitfield

This saves a whooping 7 dwords. Zero functional changes. Because some of the refcounts are rather tightly calculated, I've put BUG_ONs in the code to check for overflows. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_drv.h | 75 +- drivers/gpu/d

[Intel-gfx] [PATCH] drm/i915: Reject bind_to_gtt() early if object > aperture

If the object is bigger than the entire aperture, reject it early before evicting everything in a vain attempt to find space. Signed-off-by: Chris Wilson Cc: sta...@kernel.org --- drivers/gpu/drm/i915/i915_gem.c |8 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/driv