For real HDMI sink, CPT HDMI port has to set 'HDMI' mode flag
in order to make HDMI audio work correctly.
This is required patch for drm/i915 to enable HDMI audio on CPT PCH,
ALSA patch is at
http://mailman.alsa-project.org/pipermail/alsa-devel/2010-May/027601.html
Tested-by: Fengguang Wu
Signe
On Tue, 11 May 2010 09:38:36 -0700, Eric Anholt wrote:
> Couldn't this be more easily handled by the times where you would move
> to the tail of mmap, just move to the tail of inactive? Since inactive
> is "obj_priv->gtt_space && !obj_priv->active" already.
The real issue is the inactive list is
Hi all,
Ok, here's my try at a review. Sorry for the rather long delay.
First things first, please put on your asbestos suits, this one's gonna be
rough;) Second: Your patch is still a pain to review for the following
reasons:
- IMHO you split-up made things worse: The completely rewritten rende
On Tue, 11 May 2010 11:38:36 -0400
Andrew Morton wrote:
> On Tue, 11 May 2010 11:18:54 -0700 Jesse Barnes
> wrote:
>
> > > > > +#define thm_writeb(off, val) writeb((val), ips->regmap + (off))
> > > > > +#define thm_writew(off, val) writew((val), ips->regmap + (off))
> > > > > +#define thm_writ
On Tue, 11 May 2010 11:37:22 -0400, Andrew Morton
wrote:
> On Tue, 11 May 2010 19:22:14 +0100 Chris Wilson
> wrote:
>
> > + reloc_offset = src_priv->gtt_offset;
> > for (page = 0; page < page_count; page++) {
> > - void *s, *d = kmalloc(PAGE_SIZE, GFP_ATOMIC);
> > + v
On Tue, 11 May 2010 11:18:54 -0700 Jesse Barnes
wrote:
> > > > +#define thm_writeb(off, val) writeb((val), ips->regmap + (off))
> > > > +#define thm_writew(off, val) writew((val), ips->regmap + (off))
> > > > +#define thm_writel(off, val) writel((val), ips->regmap + (off))
> > >
> > > ick.
> >
On Tue, 11 May 2010 19:22:14 +0100 Chris Wilson
wrote:
> + reloc_offset = src_priv->gtt_offset;
> for (page = 0; page < page_count; page++) {
> - void *s, *d = kmalloc(PAGE_SIZE, GFP_ATOMIC);
> + void __iomem *s;
> + void *d;
> +
> + d =
Directly read the GTT mapping for the contents of the batch buffers
rather than relying on possibly stale CPU caches. Also for completeness
scan the flushing/inactive lists for the current buffers - we are
collecting error state after all.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i91
On Tue, 11 May 2010 07:59:19 -0700
Jesse Barnes wrote:
> On Mon, 10 May 2010 22:00:46 -0400
> Andrew Morton wrote:
> > > +#define thm_readb(off) readb(ips->regmap + (off))
> > > +#define thm_readw(off) readw(ips->regmap + (off))
> > > +#define thm_readl(off) readl(ips->regmap + (off))
> > > +#de
On Tue, 11 May 2010 16:55:27 +0100, Chris Wilson
wrote:
> By keeping buffers that are in use by the CPU, having been mmapped and
> moved to the CPU or GTT domain since their last rendering on a separate
> inactive list, prevents the first-pass eviction process from unbinding
> one of these buffer
By keeping buffers that are in use by the CPU, having been mmapped and
moved to the CPU or GTT domain since their last rendering on a separate
inactive list, prevents the first-pass eviction process from unbinding
one of these buffers. Those buffers are evicted as normal during
evict-everything so
On Mon, 10 May 2010 22:00:46 -0400
Andrew Morton wrote:
> > +#define thm_readb(off) readb(ips->regmap + (off))
> > +#define thm_readw(off) readw(ips->regmap + (off))
> > +#define thm_readl(off) readl(ips->regmap + (off))
> > +#define thm_readq(off) readq(ips->regmap + (off))
> > +
> > +#define thm
On Monday 10 May 2010, Jesse Barnes wrote:
> What about the indirect bug? Did that also go away when you fixed the
> perms issue? If not, that sounds like a serious issue, in indirect
> mode the swap interval should still be honored I think...
In indirect mode, the swap interval was being honou
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