Hi
I have two questions regarding the following services used to suspend a SRB
First if IEAVPSE2 suspends a SRB Then it in fact
Works like a WAIT execution stops after the SVC 2 from wait and BASR from
IEAVPSE2
So how would the updated STOKEN get returned
Second IEAVAPE2 has a parameter for ad
So when that unit of work is paused
The NSI after the BASR to IEAVPSE2 is not executed till after the release
correct ?
Thanks
Sent from my iPhone
On Dec 23, 2015, at 9:26 AM, Peter Relson wrote:
>> if IEAVPSE2 suspends a SRB Then it in fact
>> Works like a WAIT execution stops after the SV
Thanks
The only thing STORAGE shouldn't return zero
If the address space is swapped out
Thanks
Sent from my iPhone
> On Jan 4, 2016, at 5:12 AM, Rob Scott wrote:
>
> Search the archives for IBM-Main as this has been discussed several times.
>
> Using CHKEAX=NO on ALESERV is not to be encoura
Hi
I registered a e-mail and password however
I can search IBM-main
But not the archives 1986-2004
Thanks
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authorized*
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> On Jan 4, 2016, at 12:04 PM, Elardus Engelbrecht
> wrote:
>
> michelbutz wrote:
>
>> I registered a e-mail and password however I can search IBM-main
>> But
Hi
Does anyone know if you can use CSSTMP
To put text in the body of the e-mail
Have found anything like a CSSTMP users guide anywhere
Thanks
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> On Mar 24, 2016, at 8:27 PM, michelbutz wrote:
>
> Hi
>
> Does anyone know if you can use CSSTMP
>
> To put text in the body of the e-mail
>
> Have found anything like a CSSTMP users guide anywhere
>
>
Hi
Would anyone know if there is a way to increase the number of datasets
dynamically allocated using
IKJTSOEV/IKJEFTSR to execute a clist
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Thanks I thought DYNAMBR was for IKJEFT01
Thanks
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> On Jan 14, 2015, at 5:18 PM, Paul Gilmartin
> <000433f07816-dmarc-requ...@listserv.ua.edu> wrote:
>
>> On Wed, 14 Jan 2015 16:14:44 -0600, John McKown wrote:
>>
>> DYNAMNBR= on the EXEC card.
>> ref:
>> http://publibz.
Hi
Is there a way to invoke debug tool from within a
Non le assembler program
Thanks
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>> On Mon, Feb 9, 2015 at 2:06 PM, michelbutz wrote:
>>
>> Hi
>>
>> Is there a way to invoke debug tool from within a
>> Non le assembler program
>>
>> Thanks
>>
>> Sent from my iPhone
>>
>&g
hat you want. No completely sure.
>
>> On Mon, Feb 9, 2015 at 2:26 PM, michelbutz wrote:
>>
>> That syntax is C/C++ I was looking for non le assembler
>>
>> Sent from my iPhone
>>
>>> On Feb 9, 2015, at 5:17 PM, Sam Siegel wrote:
>>
That seems to
Sent from my iPhone
On Apr 6, 2015, at 3:48 AM, Jim Mulder wrote:
>> will settting SPINRCVY to SPIN allow a CPU to sping endlesssly
>> as leaving out the SPINTIME parameter seem to make it default to 40
> seconds
>> if not is there a way to make a CPU keep spining and have z/os t
Sorry for the typo I am going to send an example an explanation shortly
Sent from my iPhone
On Apr 6, 2015, at 3:48 AM, Jim Mulder wrote:
>> will settting SPINRCVY to SPIN allow a CPU to sping endlesssly
>> as leaving out the SPINTIME parameter seem to make it default to 40
> seconds
>> if not
Would know for those of us who are fortunate
When we get the next release of z/OS
I think most get it in sept
It takes a while to trickle down to us
Sent from my iPhone
> On Apr 23, 2015, at 12:37 PM, John McKown
> wrote:
>
> Which may be of interest to those fortunate enough to have a zPDT
You still need the ADCD's
Sent from my iPhone
> On Apr 23, 2015, at 3:16 PM, Vince Coen wrote:
>
> Solves that then - using Hercules is somewhat cheaper !!
> Thanks for the information though :)
>
>
>
>> On 23/04/15 20:12, Nims,Alva John (Al) wrote:
>> Found this page on IBM's pricing:
>>
>
Hi
Can any one of the parameters returned by UCBSCAN be used with LSPACE
As ucbscan returns different parts of the UCB
Thanks
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From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of Gerhard Postpischil
> Sent: Thursday, April 28, 2016 6:13 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: UCBSCAN and LSPACE
>
>> On 4/27/2016 3:10 PM, michelbutz wrote:
>> Can any one of the pa
Once I check for Dasd UCB
Got it working thanks
Sent from my iPhone
> On Apr 28, 2016, at 9:12 PM, Gerhard Postpischil wrote:
>
>> On 4/27/2016 3:10 PM, michelbutz wrote:
>> Can any one of the parameters returned by UCBSCAN be used with LSPACE
>> As ucbscan returns di
Hi
If a nonpreamtable scope=global SRB does a pause
And another SRB is scheduled does it get dispatched ?
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> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.U
Thanks so much the documentation for IEAVPSE2 says "NO LOCKS HELD"
Sent from my iPhone
> On May 3, 2016, at 7:50 AM, Peter Relson wrote:
>
> I'll point out that the very fact that a global SRB paused very likely
> means that you did not consider the SRB itself truly to be global. The
> system
Hi
I need to obtain dataset space information
I have been looking at the DFSMS advanced services and there seems like a few
away of going about this
The OBTAIN and camlist seems like the easiest
As all it needs is a dataset name and volser
The CVAF macros seems like the must current
But I w
I am sorry dont understand what is the VTOC
Dataset name, there is another dataset on that volume sys1.vvds.v concentrated
to the volser
Sent from my iPhone
> On May 3, 2016, at 11:46 AM, J R wrote:
>
> VTOC DSN is 44X'4'
>
> Sent from my iPhone
>
>> On
at 10:54 AM, michelbutz wrote:
>>
>> I am sorry dont understand what is the VTOC
>> Dataset name, there is another dataset on that volume sys1.vvds.v
>> concentrated to the volser
>
> SYS1.VTOCIX.aa (aa is _normally_ the same as the volser, but need
&
I am still getting return code 4 in R15 CVSTAT is 8
I first move 44X'04' to JFCBDSNM
I then do a READJFCB FILE
Everything is okay I get R15 = 0
I then do OPEN FILE,TYPE=J
R15 = 0
I then do ICM. R11,B'0111',DCBDEBA
XC BUFLIST(BFLHLN+BFLELN),BUFLIST
OI BFLHFL,BFLHDSCB
MVI. BFLHNOE,1
LA. R6,DS1FMTID
the 44X'4' to JFCBDSNM.
>
> Sent from my iPhone
>
>> On May 3, 2016, at 14:30, michelbutz wrote:
>>
>> I am still getting return code 4 in R15 CVSTAT is 8
>>
>> I first move 44X'04' to JFCBDSNM
>> I then do a READJFCB FILE
>>
gt;
> Sent from my iPhone
>
>> On May 3, 2016, at 15:11, michelbutz wrote:
>>
>> Something strange is bombed on the open
>> Message IEC141I the dataset it in the message is sys1.vtoc
>> The DCB whose DSCB I am trying to access is a VB have that DCB on the open
he '60s, this sort of thing was in the System Programmer's Guide.
> It may be in Using Datasets or something similar now.
>
> However , you've lost me now. I don't know why you need the DEB. But you
> should be able to get to it from the DCB.
>
> Sent from my
Thanks I am going to try the GTF trace
Sent from my iPhone
> On May 3, 2016, at 9:02 AM, Blaicher, Christopher Y.
> wrote:
>
> Peter,
> Obviously I didn't fully put on my thinking cap yesterday when I mentioned
> the LOCAL LOCK.
>
> I was attempting to think of what might be causing the post
For CVAF I need the DEB of the VTOC
Sent from my iPhone
> On May 3, 2016, at 7:24 PM, Mike Shaw wrote:
>
>> On 5/3/2016 11:29 AM, michelbutz wrote:
>> Hi
>> ..
>
> Michael, since you said "...what is the VTOC..." it looks like you have a
> l
I didn't catch the initial e-mail thread what did he pay and what is his
monthly electrical bill
Sent from my iPhone
> On May 6, 2016, at 10:55 AM, Timothy Sipples wrote:
>
> For those of you who would like to attempt to recreate Connor's feat,
> especially if you have understanding parents,
Hi
Using an example in the DFSSMS advanced services guide I got strange output
from OBTAIN
With CAMLST
OBTAIN DSCB
DSCB. CAMLST SEARCH,DSABC,VOL,WORKAREA
DSABC. DC. CL44'data.set.name'
VOL. DC. CL6'VOLSER'
WORKAREA DS CL140
Register 15 returned a zero
WORKAREA pointed to
gt; What information are you trying to get, exactly?
>
> michelbutz wrote:
>> Hi
>>
>> I need to obtain dataset space information
>
>
> --
> John Eells
> IBM Poughkeepsie
> ee...@us.ibm.com
>
> --
Thanks
Sent from my iPhone
> On May 10, 2016, at 3:36 PM, Gerhard Postpischil wrote:
>
>> On 5/10/2016 2:18 PM, michelbutz wrote:
>> Using an example in the DFSSMS advanced services guide I got strange
>> output from OBTAIN With CAMLST
>>
>> OBTAIN
Forget about my design how about
A general XMEM question what the point if
You are going to get S0C4
Sent from my iPhone
> On May 15, 2016, at 2:30 PM, Binyamin Dissen
> wrote:
>
> On Sun, 15 May 2016 14:12:39 -0400 michealbutz
> wrote:
>
> :>Transferring data between 2 address spaces weath
Hi
The documentation states that SETFRR can be issued ASC AR mode and PASN |= SASN
|= HASN
so can the recovery routine itself be in a secondary address space I am taking
protecting the code in the primary address space
Thanks
Sent from my iPhone
-
So the face that a SRB is running in space #2
Would automatically mKe it swapped in ?
If I had to go thru all that trouble of writing
A routine I would rather XMEM post space #2 to do
A SYSEVENT TRANSWAP
Sent from my iPhone
> On May 15, 2016, at 3:59 PM, Ed Jaffe wrote:
>
>> On 5/15/2016
; -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of michelbutz
> Sent: Tuesday, May 17, 2016 12:59 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: XMEM and Swap ability
>
> So the face that a SRB is running in
Can you tell us the following
What type of processor
The work load
What version of z/OS these are relevant factors
Sent from my iPhone
> On May 26, 2016, at 1:29 PM, Jerry Callen wrote:
>
> (A very delayed follow-up on a thread from yesteryear...)
>
> tl;dr: In unauthorized code, ECBs
Can I ask you another question did you get z/OS
2.2 from zpdt as I am still waiting
Thanks
Sent from my iPhone
> On Jun 1, 2016, at 10:21 AM, Scott Ford wrote:
>
> All:
>
> I need some help guys/gals. I have installed z/OS 2.2 under z/PDT and have
> a wierd issue. I am trying to send a f
So it is the same parm as the one in the pause
Sent from my iPhone
> On Jun 3, 2016, at 12:00 AM, Greg Dyck wrote:
>
>> On 6/2/2016 7:08 PM, michealbutz wrote:
>> I have a question about the 3rd paramter of IEAVRLS2 target_du_release_code
>> it is specfied as 4 bytes. Is this the same as the 4
Does it have to be a different value on every call
Sent from my iPhone
> On Jun 3, 2016, at 1:14 AM, Greg Dyck wrote:
>
>> On 6/2/2016 9:43 PM, michelbutz wrote:
>> So it is the same parm as the one in the pause
>
> Yes.
>
> . IEAVPSE/IEAVPSE2/IEA4PSE/IEA
Can someone tell me what the advantage of this
Is then using IEAVPSE2 is it performance
I think they both set up a SSRB
Sent from my iPhone
> On Jun 7, 2016, at 11:27 AM, Greg Dyck wrote:
>
> On 6/6/2016 6:54 AM, Steve Smith wrote:
> > I'm wondering what an SRB SUSPEND exit is really good for
Hi
The documentation says for ECBLIST
All ecb's must be in the home address
Space. Does that mean addressable from the
Hone address space
As I have 1 ecb's in the home address space
And 1 in CSA
Thanks
Sent from my iPhone
-
I'll double check the wait bit X'80' is on after the wait thanks
Sent from my iPhone
> On Jun 8, 2016, at 9:00 AM, John McKown wrote:
>
>> On Tue, Jun 7, 2016 at 9:17 PM, michelbutz wrote:
>>
>> Hi
>>
>> The documentation says for ECBLIS
pace is not the waiting address space.
>
> On Wed, 8 Jun 2016 09:03:45 -0400 michelbutz wrote:
>
> :>I'll double check the wait bit X'80' is on after the wait thanks
> :>
> :>Sent from my iPhone
> :>
> :>> On Jun 8, 2016, at 9:00 AM, John Mc
an SLIP for an abend in SRB mode and see what it shows.
>
> On Wed, 8 Jun 2016 10:07:54 -0400 michelbutz wrote:
>
> :>The XMEM post is being done from a FRR resulting from an abend in a SRB the
> SRB is the primary address space
> :>
> :>Sent from my iPhone
> :&
Do I have to be in key 0 to wait on ecb in CSA
Sent from my iPhone
> On Jun 8, 2016, at 2:11 PM, Greg Dyck wrote:
>
>> On 6/8/2016 7:07 AM, michelbutz wrote:
>> The XMEM post is being done from a FRR resulting from an abend in a SRB the
>> SRB is the primary address s
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>
>
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of michelbutz
> Sent
Here is one more thing the ECB has to be
One a FULLWORD boundary I had a XL4
Sent from my iPhone
> On Jun 9, 2016, at 10:16 AM, Zahir Hemini wrote:
>
> I do not have anything to add, but wish to thank those who answered to this
> topic because I have learned something that relates directly
I thinks that irrelevant when I SSAR I know it's the right address space 1 is
secondary
I am quite sure that the the source is primary ALET 0 I also tried it with ALET
2 which is home
And that failed too
Sent from my iPhone
> On Jun 10, 2016, at 3:15 PM, Philippe Leite wrote:
>
> I don't k
Thanks for the info the FRR is set after the SRB
gets control.
So storage is obtained from the home Address
Space
Does it matter if I code owner=primary on the storage macro or that won't have
any effect on assigning storage in the case of private storage
As it is only used for tracking common
Hi
I have been looking for documentation about ASCE I thought it was in the Pops
it touches on it but does give the layout or how to access it
Thanks
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> 05/05/2015 11:04:25 AM:
>
>> From: michelbutz
>> To: IBM-MAIN@LISTSERV.UA.EDU
>> Date: 05/05/2015 11:11 AM
>> Subject: ASCE doc
>> Sent by: IBM Mainframe Discussion List
>>
>> Hi
>>
>> I have been looking for d
Hi
Anyone know how to use the parm field for debug
Tool to pass info to the program I am having all sorts of issues
EXEC PGM=EQANMDBG,PARM=
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NATLANG to specify the national language used to communicate with
> Debug Tool
>COUNTRY to specify a country code for Debug Tool
>TRAP to specify whether Debug Tool is to intercept abends.
>
> Does this help?
>
> Lizette
>
>
> -Orig
Has
Anyone had any success using conditional
Break points with debug tool in assembler
The following
At 435 when(%R4-> = 'MIKE')
Lead me to believe stop 435 when the contents of
Register 4 is equal to MIKE but the code seemed
To stop at 435 every time
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Thanks
Sent from my iPhone
> On Jun 4, 2015, at 11:26 AM, Tony Harminc wrote:
>
>> On 3 June 2015 at 11:27, michealbutz wrote:
>> I am getting a S0C1 debugging my program under TESTAUTH when I do a Where to
>> see where I bombed It display's a 31 bit private address with the message
>> not whi
wer to your question?
>
> If not, please contact me directly.
>
> Ken Hume
> kph...@us.ibm.com
> (720) 396-7776
>
>
> -Original Message- From: michelbutz Sent: Wednesday, May 27, 2015
> 12:39 PM Newsgroups: bit.listserv.ibm-main To: IBM-MAIN@LISTSERV.UA.EDU
&
Given address how I can I tell whether this is SQA LSQA PVT, or CSA
Thanks
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CSMLOC only takes one of those as the first parameters
I would have to know whether it is SQA LSQA PVT. Or CSA before
Sent from my iPhone
> On Jun 14, 2015, at 2:05 AM, Binyamin Dissen
> wrote:
>
> VSMLOC
>
> On Sun, 14 Jun 2015 01:32:26 -0400 michelbutz wrote:
>
&g
It's in a other address space to I'm using a SRB
I am at 2.1
I guess I have to set up a FRR and check for a C78 ABEND
Sent from my iPhone
> On Jun 14, 2015, at 5:51 AM, Elardus Engelbrecht
> wrote:
>
> michelbutz wrote:
>
>> CSMLOC only takes one of those as t
Were you I get that info is that in the LDA ?
Sent from my iPhone
> On Jun 14, 2015, at 9:08 AM, Robert A. Rosenberg wrote:
>
> At 04:51 -0500 on 06/14/2015, Elardus Engelbrecht wrote about Re: Address
> location:
>
>> michelbutz wrote:
>>
>>> CSMLOC
Thanks
Sent from my iPhone
> On Jun 14, 2015, at 9:46 AM, Shane Ginnane wrote:
>
>> On Sun, 14 Jun 2015 01:32:26 -0400, michelbutz wrote:
>>
>> Given address how I can I tell whether this is SQA LSQA PVT, or
GDA is for common storage I think
I need the LDA for private
Sent from my iPhone
> On Jun 14, 2015, at 9:46 AM, Shane Ginnane wrote:
>
>> On Sun, 14 Jun 2015 01:32:26 -0400, michelbutz wrote:
>>
>> Given address how I can I tell whether this is SQA LSQA PVT, or
The IEAMSCHD has a FRRADDR parm
But doesn't have an input param for paramters to
FRR routine
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If you specify LLOCK=YES, then the FRR should release the LOCAL lock prior
> to the completion of its processing.
>
>
> Lizette
>
>
>> -Original Message-----
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU]
>> On Behalf Of michelbutz
&
; Principal Software Engineer
> Rocket Software
> 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
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>
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-M
+1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
>
>
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of michelbutz
> Sent: 14 June 2015 19:49
> To: IBM-MAIN@LISTSERV.UA.EDU
> Su
This was a follow up from a suggestion of not knowing what type of storage
VSMLOC was processing. I was issuing VSMLOC from an SRB
And coding of PVT for a LSQA address would generate a ABEND which I would
subsequently
Re-try with the correct LSQA PARM in the VSMLOC
I wasn't sure how to get the
r
> Rocket Software
> 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
>
>
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
>
> Rob Scott
> Principal Software Engineer
> Rocket Software
> 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
>
>
> -Original Message-
> From: IBM Mainframe Disc
IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of michelbutz
> Sent: 15 June 2015 16:56
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: IEAMSCHD no FRR param
>
> When The FRR parameter area which R2 points to Is 24 bit ? Just makes life
> more difficult
>
; EADDRESS: dbc...@colesoft.com
>
> Home page:www.colesoft.com
> User's Group: www.xdc.com (on LinkedIn)
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>
>
>
>
>
>
> At 6/14/2015 09:46 AM, Shane G
I am hoping at the very least it would give me
Some sort of return code allowing me to retry
The VSMLOC until I get the right storage area
PVT,SQA,LSQA or CSA
Thanks
Sent from my iPhone
On Jun 22, 2015, at 2:49 PM, Jim Mulder wrote:
>> From: michelbutz
>> To: IBM-MAIN@LISTSERV.UA.E
There is keyvalue parm on IEAMSCHD
I always assumed SRB's run PSW key 0 supervisor state
Let my give this a shot and then try 228
Thanks
Sent from my iPhone
> On Jun 22, 2015, at 7:20 PM, Mike La Martina
> wrote:
>
> Try Subpool 228.
> For some reason I always used that subpool.
>
> ---
To all
This was my first shot at IEAMSCHD
I had previously only used schedule
That I took it for granted that SRB's run in key 0
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Still needed subpool 228 as when I tried to access data from subpool 227 s0c4
as it is fetch protected 228 isn't
Sent from my iPhone
> On Jun 22, 2015, at 7:20 PM, Mike La Martina
> wrote:
>
> Try Subpool 228.
> For some reason I always used that subpool.
>
> -Original Message-
>
Edward you are very smart by rote I always XC the SRB block
Thanks for making me aware
Sent from my iPhone
> On Jun 23, 2015, at 10:24 AM, Ed Jaffe wrote:
>
>> On 6/22/2015 10:48 PM, Elardus Engelbrecht wrote:
>> michelbutz wrote:
>>
>>> I always assumed SRB
On Jun 23, 2015, at 12:24 PM, Tony Harminc wrote:
>>
>> On 23 June 2015 at 07:37, michelbutz wrote:
>>
>> Still needed subpool 228 as when I tried to access data from subpool 227
>> s0c4 as it is fetch protected
>
>
> If you have PSW key 0, how can you ge
015 at 07:37, michelbutz wrote:
>>
>> Still needed subpool 228 as when I tried to access data from subpool 227
>> s0c4 as it is fetch protected
>
>
> If you have PSW key 0, how can you get an S0C4 based on fetch protection?
> Can you not look at a dump and trace table to s
I'm doing linkage=branch and holding the local lock
Peter just to re-iterate R2 has the address of
the FRR param before I issue IEAMSCHD
Correct ?
Sent from my iPhone
On Jun 24, 2015, at 7:51 AM, Peter Relson wrote:
>> "The VSMLOC macro might issue abend code X'C78'."
>
> The book is corre
I did not have storage key parameter set correctly
On IEAMSCHD
Thanks
Sent from my iPhone
> On Jun 25, 2015, at 8:21 AM, Shmuel Metz (Seymour J.)
> wrote:
>
> In <000901d0ad3b$eb56bbb0$c2043310$@comcast.net>, on 06/22/2015
> at 06:36 PM, michealbutz said:
>
>> I am at my wits end I ha
On Jun 25, 2015, at 4:20 PM, Lizette Koehler wrote:
>
> To help others in the future when searching for answers; could you post what
> you had vs. what worked?
>
> It could be beneficial.
>
> Lizette
>
>
>
> -Original Message-
>> From: miche
Sorry jade
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> On Jun 25, 2015, at 4:25 PM, michelbutz wrote:
>
> Edward Jaffa help my understand my problem
>
> This was the first time I used IEAMSCHD
> In the past when I used SCHEDULE
> I cleared out the 44 byte block XC to binary zeros
> This
It's that spellchecker on the IPhone
Jaffe
My apologies Edward
Sent from my iPhone
> On Jun 25, 2015, at 4:26 PM, michelbutz wrote:
>
> Sorry jade
>
> Sent from my iPhone
>
>> On Jun 25, 2015, at 4:25 PM, michelbutz wrote:
>>
>> Edward Jaffa
Thanks for your help
I checked how the FRR param works
R2 points to 24 bytes for my use to prime as
Parameters on entry to the SRB for the FRR
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On Jun 26, 2015, at 7:39 AM, Peter Relson wrote:
>> could you post what you had vs. what worked?
>
> What didn't work: putting t
Hi
I know that a S0C4 reason 4 occurs anytime the storage key doesn't match the
PSW key bits 8 - 11
Would IVSK. R1,R2 and SPKA 0(R11) prevent this obviously one would have to be
in supervisor state to this as they are both privilege inst to qualify that if
the storage key is 0
Thanks in adva
I am writing a generic macro without knowing the environment
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> On Jul 8, 2015, at 6:38 PM, Tony Harminc wrote:
>
>> On 8 July 2015 at 17:09, michelbutz wrote:
>>
>> I know that a S0C4 reason 4 occurs anytime the storage key doesn't matc
Yes I meant SPKA 0(1)
I writing a macro the entails a wait at times it
Would be hard to determine the storage key
of the ECB
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> On Jul 8, 2015, at 11:30 PM, Binyamin Dissen
> wrote:
>
> On Wed, 8 Jul 2015 17:09:54 -0400 michelbutz wrote:
>
> :>I kn
I am getting a 047 abend running a program
That runs in production
The 047 abend under both TSO TEST and debug tool happens with a STC instruction
which tries to
Modify the 2 lengths of a AP instruction
The program is NOT re-entrant
Thanks
Sent from my iPhone
---
Happened with both TSO TEST and debug tool
I'll check the instruction storage area again to see that it is a STC
instruction
Thanks
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On Jul 22, 2015, at 11:09 PM, Jim Mulder wrote:
>> From: michelbutz
>> To: IBM-MAIN@LISTSERV.UA.EDU
>> Da
There wasn't a dump just got a message from TEST "system abend 047" I'll
allocate sysudump
To my TSO session
Thanks
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> On Jul 22, 2015, at 11:42 PM, Binyamin Dissen
> wrote:
>
> On Wed, 22 Jul 2015 22:39:58 -0400 michelbutz wrote:
>
&
PERMIT TESTAUTH CLASS(TSOAUTH) ID(TSOID)
ACC(upd)
Sorry someone let me know
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> On Aug 15, 2015, at 11:28 PM, Lizette Koehler wrote:
>
> Are you seeing an ICH408I Message or S913?
>
> If not, is the TESTSAUTH in the IKJTSOxx member of parmlib?
>
> Lizette
>
>
> -Origi
Thanks for responding
I have set MCSOMLVL to MCSOMLR indicating
I should receive all WTOR's
However I have a bug in a program
And when I get the following message IEE331A
That I am in a disabled spin loop
I fail to capture it even though it asks for a reply
Meaning it's a WTOR
Thanks
Sent fr
Sorry I don't know if I replied to the group
My apologizes if I didn't
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Begin forwarded message:
> From: michelbutz
> Date: August 19, 2015 at 12:55:30 PM EDT
> To: Peter Fatzinger
> Subject: Re: Console messages which has precedence and relate
There are two loadlibs with ASMDASM apparently
The one with HLA.SA Works
Thanks
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> On Aug 25, 2015, at 11:19 AM, Lucas Rosalen wrote:
>
> I've never run ASMDASM but could you try to move the input in SYSIN DD to
> column 2?
>
> Lucas
> Did you open a pmr/Sr with IB
Is IKJ tso ?
Sent from my iPhone
> On Aug 26, 2015, at 3:53 PM, Lizette Koehler wrote:
>
> Can you do 3.4 on the dataset? If so, when you press PF11 - does it show any
> details?
>
> Is there more than one LPAR involved? Is the Alias and ucat connected if
> there is more than one MCAT?
>
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