I was referring specifically to the thread's topic of "switching between", not
to "using" SMT-2.
I fully agree that you might choose not to use. It would be less likely that
you'd go through the hassle of "switching".
Peter Relson
z/OS Core Technology Design
--
Been there, got a lot of t-shirts
Jack
On Tue, 15 Aug 2023 at 21:59, Seymour J Metz wrote:
> Sometimes you have to do something boring that is not your responsibility
> because you're the only one they trust to do it right and they can't afford
> for it to be done wrong.
>
> That said, there's n
Thanks Jerry - any insight would be appreciated.
-Original Message-
From: IBM Mainframe Discussion List On Behalf Of
Jerry Whitteridge
Sent: Thursday, August 31, 2023 17:09
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: EXTERNAL EMAIL: Re: On-Prem to Cloud Mainframe Migration
Experiences
OK
Thanks Dave.
-Original Message-
From: IBM Mainframe Discussion List On Behalf Of
Gibney, Dave
Sent: Thursday, August 31, 2023 17:21
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: EXTERNAL EMAIL: Re: On-Prem to Cloud Mainframe Migration
Experiences
When we moved our LPARs to a hosting servic
Mark:
Thanks. Searching through the doc I could not find this, but obviously I was
searching with the wrong terms.
Regards, Jim
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For IBM-MAIN subscribe / signoff / archive access instructions,
send email to lists...@listserv.
Peter:
Hopefully you would not need to. However, since enabling SMT requires you to
re-IPL z/OS, it is nice to be able to switch from SMT-2 to SMT-1, if you are
having performance issues, without a re-IPL. I have seen very good results from
SMT-2 in my customers, but there could always be that
There are two levels of dispatching here: PR/SM dispatches zIIP cores for the
LPARs to use. Whether the LPAR uses both threads on that core or not depends on
the z/OS setting. With SMT enabled, it looks like you have twice as many zIIPs
as the LPAR has online zIIP cores. But (IIRC) the even-odd
Hi folks;
It's been several months since I've received anything from
the IBM Assembler List Server. The last I knew, the list server
e-mail address was: assembler-l...@listserv.uga.edu
Is this still correct?
Are any of you still getting e-mails from that list server?
Thanks for the help!
Bob
I received something from it within the last few weeks.
==> "IBM Mainframe Assembler List" wrote on
08/19/2023 11:34:03 AM:
Looks like the "G" may be missing in the link you have.
Bill Hitefield
> -Original Message-
> From: IBM Mainframe Discussion List On
> Behalf Of Robert Raicer
>
Yes I have. It doesn't have a lot of traffic.
Steve Thompson
On 9/1/2023 10:28 AM, Robert Raicer wrote:
Hi folks;
It's been several months since I've received anything from
the IBM Assembler List Server. The last I knew, the list server
e-mail address was: assembler-l...@listserv.uga.edu
Is
The web interface is at
https://listserv.uga.edu/scripts/wa-UGA.exe?A0=ASSEMBLER%2dLIST
If you haven't received anything for several months, it might have been
directed to spam by your mail client.
--
Tom Marchant
On Fri, 1 Sep 2023 14:33:51 +, Bill Hitefield
wrote:
>I received somethin
My bad. I was looking at the wrong line.
But, I do still get items from them.
Bill Hitefield
Dino-Software Corporation
800.480.DINO
www.dino-software.com
> -Original Message-
> From: Bill Hitefield
> Sent: Friday, September 01, 2023 10:34 AM
> To: IBM Mainframe Discussion List
> Subjec
Which proves my point from a prior thread that coding and using assembler is
almost nonexistent.
Sent from Yahoo Mail for iPhone
On Friday, September 1, 2023, 10:39 AM, Steve Thompson wrote:
Yes I have. It doesn't have a lot of traffic.
Steve Thompson
On 9/1/2023 10:28 AM, Robert Raicer w
On Fri, 1 Sep 2023 08:28:41 -0600, Robert Raicer wrote:
>
>It's been several months since I've received anything from
>the IBM Assembler List Server. The last I knew, the list server
>e-mail address was: assembler-l...@listserv.uga.edu
>
The newest post in the archives is:
Re: Define Flag (DF) M
PKB
72 of the 1223 posts in August were from you. That's 5.88% of all the posts, or
about 1 in 17.
Clearly, you are one of the "20-30 who dominate this platform with drivel."
--
Tom Marchant
On Thu, 31 Aug 2023 19:38:17 +, Bill Johnson wrote:
>Everyone needs to add their 2 cents to the th
Hi Bill,
More nonsense!
If you were to support Exits and redo them when necessary, you wouldn't
be making such broad generalizations.
Regards,
David
On 2023-09-01 10:43, Bill Johnson wrote:
Which proves my point from a prior thread that coding and using assembler is
almost nonexistent.
Sen
Hi Bob,
It is a quiet list which is probably self-fulfilling. I have seen several
questions on IBM-Main over the last several months regarding assembler
programming. So people asking on the assembler list don't get responses so
they come over here and get their questions answered so don't bot
I worked at more shops than most of you. 15 or so. Never once did I or any
coworkers (tech support) ever need to write assembler in over 40 years. Many of
them very large shops too. The health insurance company I worked at had a
system written in the 80’s that had some assembler that infrequentl
Selective time frame meaningless. Now do 2023.
Sent from Yahoo Mail for iPhone
On Friday, September 1, 2023, 11:06 AM, Tom Marchant
<000a2a8c2020-dmarc-requ...@listserv.ua.edu> wrote:
PKB
72 of the 1223 posts in August were from you. That's 5.88% of all the posts, or
about 1 in 17.
Clear
Had one email list blocked by my ISP. Said the server sent 90% spam.
(Had a lot of email lists, about 1996).
On Fri, Sep 1, 2023 at 9:42 AM Tom Marchant
<000a2a8c2020-dmarc-requ...@listserv.ua.edu> wrote:
>
> The web interface is at
> https://listserv.uga.edu/scripts/wa-UGA.exe?A0=ASSEMBLER%
Or be getting recruiters calling you for fixing/updating old ALC
programs.
Not recruiter, but multiple from multiple companies.
And for fixing exits for JES2, IMS, etc.
Steve Thompson
On 9/1/2023 11:11 AM, David Spiegel wrote:
Hi Bill,
More nonsense!
If you were to support Exits and redo th
On Fri, 1 Sept 2023 at 09:55, Scott Chapman
<03fffd029d68-dmarc-requ...@listserv.ua.edu> wrote:
>
> There are two levels of dispatching here: PR/SM dispatches zIIP cores for the
> LPARs to use. Whether the LPAR uses both threads on that core or not depends
> on the z/OS setting. With SMT enab
There is no MT on general purpose processors. Only on zIIPs can it be enabled.
Mark Jacobs
Sent from ProtonMail, Swiss-based encrypted email.
GPG Public Key -
https://api.protonmail.ch/pks/lookup?op=get&search=markjac...@protonmail.com
--- Original Message ---
On Friday, September 1s
Yes - Here's a quick blurb from some IBM doc I have on my PC:
"Simultaneous multithreading is the ability of a single physical
processor (core) to simultaneously dispatch instructions from more than
one hardware thread context. Because there are two hardware threads per
physical processor, add
On 9/1/2023 10:05 AM, Tom Brennan wrote:
Beyond that, I have no idea how this works, or what workloads could
benefit from it.
There are always things that suspend the instruction stream -- for
example a cache miss that requires a cache line be loaded from memory.
While one thread is suspe
Alive and well, but low volume.
From: IBM Mainframe Discussion List on behalf of
Robert Raicer
Sent: Friday, September 1, 2023 10:28 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Is the IBM Assembler List still alive
Hi folks;
It's been several months since
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