Or IBM knows something that you do not.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of
Paul Gilmartin [042bfe9c879d-dmarc-requ...@listserv.ua.edu]
Sent: Tuesday, Ja
Classification: Confidential
I strongly suggest setting up sysplex file sharing for OMVS. This is pretty
straight forward. See the USS Planning guide.
Your service mountpoints would then be hung off of a directory in the OMVS
sysplex root (as opposed to the system root).
HTH,
-Original Mes
Was looking at the compiler reference kind of small handful of options compared
to pages and pages for XL C\C++ compiler option
One very important question when I looked at the Manuel doesn’t specify how to
debug it
--
For IBM
Noticed over the past few days that my attempts to access
https://www-40.ibm.com/ websites are frequently met with access attempt failed
due to lack of response from server.
Anyone know what's up with these IBM sites? Cloud migration possibly? JK
Thanks,
Mike
--
Not slow in Australia. This is unusual because our internet is third world
quality.
On Thu, Feb 2, 2023 at 7:09 AM Mike Hochee wrote:
> Noticed over the past few days that my attempts to access
> https://www-40.ibm.com/ websites are frequently met with access attempt
> failed due to lack of res
>>Noticed over the past few days that my attempts to access
>>https://www-40.ibm.com/ websites are frequently met with access attempt
>>failed due to lack of response from server.
Mike,
It comes up right away for me. Can you just try IBM directly without -40 in
the URL?
https://www.ibm.co
On Sun, 6 May 2018 18:34:35 -0500, Paul Edwards wrote:
Sorry for the necro ...
>On Sun, 6 May 2018 16:11:57 -0700, Charles Mills wrote:
>
>>2. A 31/32-bit program cannot count on the high
>> halves being zero in any event. There is no
>> guarantee that you are entered with the high
>> halves eq
Thank you Kolusu and Wayne.
Still slow without the -40 in the URL. Assuming problems must be local to
something in my region.
-Original Message-
From: IBM Mainframe Discussion List On Behalf Of Sri
h Kolusu
Sent: Wednesday, February 1, 2023 7:29 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Sub
No. LA (and all LA variations) are modal, in that LA will not affect the
high-half of the register, unless executing in AMODE 64.
Anyway, what's the point of clearing registers unless or until you need to
use them?
sas
On Wed, Feb 1, 2023 at 8:02 PM Paul Edwards wrote:
> On Sun, 6 May 2018 1
On 2/2/23 02:42, Joseph Reichman wrote:
Was looking at the compiler reference kind of small handful of options compared
to pages and pages for XL C\C++ compiler option
Haha! You're joking right? There's significantly more compiler options
as it's a port of clang
https://www.ibm.com/docs/en/S
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