Hello everyone,
I have created a small project on github. It is a humble (and
unfinished) word-wrapping algorithm written in C, currently consisting
of 5 source files and 5 headers. I have been reading the book
"Managing Projects with GNU Make", and I have composed a makefile that
Hello all. For debugging purposes, I am trying to put this into my
makefile:
.PHONY: dumpvars
dumpvars: source.c source.h
@echo "$(RM) is " $(RM)
@echo "$? expands to : " $?
and so on. But obviously, Make is expanding all instances of the
variables' names. How do I pre
is :' $(RM)
@echo "$$^ is :" $^
(Just doubling the $ sign).
Richard
Sent: Tuesday, April 18, 2017 at 4:21 PM
From: "John Calcote"
To: "Richard Cavell"
Cc: "Make List"
Subject: Re: Limiting expansion of make variables
Actually
Hello, everyone. I am attempting to learn GNU Make, and I am indebted
to those who provide advice. Thanks in advance.
I am reading "Managing Projects with GNU Make" 3rd edition, page 29.
It gives an example of a recipe for a "help" target. The book is 12
years old and my OS X ins
Thanks for your reply. I have provided the three things you requested.
Richard
Sent: Tuesday, May 16, 2017 at 11:38 PM
From: "carl hansen"
To: "Richard Cavell"
Cc: "Make List"
Subject: Re: Error when using example from Mecklenburg book
Attached.
Sent: Wednesday, May 17, 2017 at 12:32 AM
From: "carl hansen"
To: "Richard Cavell"
Cc: "Make List"
Subject: Re: Error when using example from Mecklenburg book
On Tue, May 16, 2017 at 3:51 PM, Richard Cavell
wrote:
something
