How to interpret commands between colon and first tab ?

2015-11-23 Thread Ewan Delanoy
Hello all, I'm rather new to make (only used it without reading the manual so far). The "all" target in a makefile for gcc5-2.0 looks like below. Notice that this code snippet contains no tab at all after the colon (the first tab is much further in the code). I could not find

Re: How to interpret commands between colon and first tab ?

2015-11-23 Thread Ewan Delanoy
> The above introduces a rule "all:" which has no prerequisites and no recipe But some 70 lines after that "all:", a tab-at-beginning-of-line appears, before the declaration of the next target. It appears as follow : CXX_FOR_TARGET_FLAG_TO_PASS = \ [TAB CHARACTER HERE]

Meaning of @:

2015-11-26 Thread Ewan Delanoy
Below is the "bootstrap" rule in gcc5.2.0's Makefile. What I don't get is the meaning of the @: at the beginning of the seventh line. I couldn't find it in the manual. I only know that @ before a shell command makes that command executed but not displayed, but why add the :

Re: Meaning of @:

2015-11-26 Thread Ewan Delanoy
If I understand correctly, the $(MAKE) after the colon will never get executed, so there's no point in putting it there (except perhaps as a somewhat cryptic comment) Envoyé: jeudi 26 novembre 2015 à 14:03 De: "David Boyce" À: "Ewan Delanoy"

Avoid warnings from the job server

2015-11-27 Thread Ewan Delanoy
My question is about a comment in GCC 5.2.0's Makefile (reproduced below). I don't understand how adding ": $(MAKE) ;" before the "$(unstage)" avoids warnings from the GNU Make job server. AFAIK, the :$(MAKE) ; basically behaves like a comment. What difference will it make to

Taking make out of the execution process

2015-12-03 Thread Ewan Delanoy
Given a target in a makefile, I would like to construct (programmatically) a sequence of non-make commands whose effect is exactly equivalent to calling make on the target. When there are no recursive calls in the makefile, the -n option does exactly this. It fails however when ther

Re: Taking make out of the execution process

2015-12-03 Thread Ewan Delanoy
>Is there a request that you have? I am looking for a make option/script/program which, when given a makefile and a target, outputs the list of non-make commands who will be executed by the makefile. For example, given the makefile a: echo "A" b: echo "

"main" function in GNU make internals

2015-12-07 Thread Ewan Delanoy
I am a little curious about GNU-make internals, so what I would like to do is the following : invoke make not the usual way, but by viewing the source as a project in my favorite C debugger, and (presumably) call a certain "main" function (or whatever it is called) taking as paramete