On Dec 10, 2005, at 10:47 AM, Marco Gerards wrote:
Can you describe your biarch change and how that affects the AMD64
port? Can I still crosscompile like I was used to?
http://cvs.savannah.gnu.org/viewcvs/grub/grub2/configure.ac.diff?
tr1=1.17&tr2=1.18&r1=text&r2=text
Heh, that's code and
Hollis Blanchard <[EMAIL PROTECTED]> writes:
>> Eight. And when in doubt, better flush too much.
>
> Eight lines?
> http://cvs.savannah.gnu.org/viewcvs/grub/grub2/kern/powerpc/
> cache.S.diff?tr1=1.1&tr2=1.2&r1=text&r2=text says it's two.
s/Eight/Right/ :-)
> My first approach was just to flush
On Dec 10, 2005, at 8:18 AM, Marco Gerards wrote:
Hollis Blanchard <[EMAIL PROTECTED]> writes:
I just fixed an embarassing bug in kern/powerpc/cache.S, where if
`address' is not cacheline-aligned (which is a common and reasonable
thing), it would fail to flush/invalidate the last cacheline. (I
Hollis Blanchard <[EMAIL PROTECTED]> writes:
> I just fixed an embarassing bug in kern/powerpc/cache.S, where if
> `address' is not cacheline-aligned (which is a common and reasonable
> thing), it would fail to flush/invalidate the last cacheline. (It
> takes a little thinking, but draw a picture
